70 lines
2.1 KiB
C++
70 lines
2.1 KiB
C++
//////////////////////////////////////////////////////////////////////////
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// Mapper015 100-in-1 chip //
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//////////////////////////////////////////////////////////////////////////
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void Mapper015::Reset()
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{
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SetPROM_32K_Bank( 0, 1, 2, 3 );
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}
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/*
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void Mapper015::WriteLow(WORD addr, BYTE data)
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{
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DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );
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if(addr>=0x6000) CPU_MEM_BANK[addr>>13][addr&0x1FFF]=data;
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}
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*/
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void Mapper015::Write( WORD addr, BYTE data )
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{
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// DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );
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switch( addr ) {
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case 0x8000:
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if( data&0x80 ) {
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SetPROM_8K_Bank( 4, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 5, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 6, (data&0x3F)*2+3 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+2 );
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} else {
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SetPROM_8K_Bank( 4, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 5, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 6, (data&0x3F)*2+2 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+3 );
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}
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if( data&0x40 ) SetVRAM_Mirror( VRAM_HMIRROR );
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else SetVRAM_Mirror( VRAM_VMIRROR );
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break;
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case 0x8001:
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if( data&0x80 ) {
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SetPROM_8K_Bank( 6, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+0 );
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} else {
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SetPROM_8K_Bank( 6, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+1 );
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}
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break;
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case 0x8002:
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if( data&0x80 ) {
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SetPROM_8K_Bank( 4, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 5, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 6, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+1 );
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} else {
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SetPROM_8K_Bank( 4, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 5, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 6, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+0 );
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}
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break;
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case 0x8003:
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if( data&0x80 ) {
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SetPROM_8K_Bank( 6, (data&0x3F)*2+1 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+0 );
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} else {
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SetPROM_8K_Bank( 6, (data&0x3F)*2+0 );
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SetPROM_8K_Bank( 7, (data&0x3F)*2+1 );
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}
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if( data&0x40 ) SetVRAM_Mirror( VRAM_HMIRROR );
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else SetVRAM_Mirror( VRAM_VMIRROR );
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break;
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}
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}
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