97 lines
2.7 KiB
C++
97 lines
2.7 KiB
C++
//////////////////////////////////////////////////////////////////////////
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// BoardKS7030 //
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//////////////////////////////////////////////////////////////////////////
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//code by CaH4e3 from fceumm
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void BoardKS7030::Reset()
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{
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reg0 = reg1 = 0x1F;
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SetBank();
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}
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void BoardKS7030::ExWrite( WORD addr, BYTE data )
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{
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if(addr==0x4025)
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if(data&0x08) SetVRAM_Mirror( VRAM_HMIRROR );
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else SetVRAM_Mirror( VRAM_VMIRROR );
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}
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BYTE BoardKS7030::ReadLow( WORD addr )
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{
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if((addr>=0x6000)&&(addr<=0x7FFF))
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{
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if ((addr >= 0x6000) && (addr <= 0x6BFF)) {
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return DRAM[addr - 0x6000];
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} else if ((addr >= 0x6C00) && (addr <= 0x6FFF)) {
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return CPU_MEM_BANK[(0xC800+(addr-0x6C00))>>13][(0xC800+(addr-0x6C00))&0x1FFF];
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} else if ((addr >= 0x7000) && (addr <= 0x7FFF)) {
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return CPU_MEM_BANK[(0xB800+(addr-0x7000))>>13][(0xB800+(addr-0x7000))&0x1FFF];
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}
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}
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return Mapper::ReadLow( addr );
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}
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void BoardKS7030::WriteLow( WORD addr, BYTE data )
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{
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if((addr>=0x6000)&&(addr<=0x7FFF))
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{
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if ((addr >= 0x6000) && (addr <= 0x6BFF)) {
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DRAM[addr - 0x6000] = data;
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} else if ((addr >= 0x6C00) && (addr <= 0x6FFF)) {
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CPU_MEM_BANK[(0xC800+(addr-0x6C00))>>13][(0xC800+(addr-0x6C00))&0x1FFF] = data;
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} else if ((addr >= 0x7000) && (addr <= 0x7FFF)) {
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CPU_MEM_BANK[(0xB800+(addr-0x7000))>>13][(0xB800+(addr-0x7000))&0x1FFF] = data;
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}
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}
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}
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BYTE BoardKS7030::Read( WORD addr)
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{
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if((addr>=0xB800)&&(addr<=0xD7FF))
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{
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if ((addr >= 0xB800) && addr <= 0xBFFF) {
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return DRAM[0x0C00 + (addr - 0xB800)];
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} else if ((addr >= 0xC000) && addr <= 0xCBFF) {
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return CPU_MEM_BANK[(0xCC00+(addr-0xC000))>>13][(0xCC00+(addr-0xC000))&0x1FFF];
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} else if ((addr >= 0xCC00) && addr <= 0xD7FF) {
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return DRAM[0x1400 + (addr - 0xCC00)];
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}
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}
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return CPU_MEM_BANK[addr>>13][addr&0x1FFF];
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}
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void BoardKS7030::Write( WORD addr, BYTE data )
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{
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if((addr>=0x8000)&&(addr<=0x8FFF))
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{
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reg0 = addr & 0x07;
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SetBank();
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}
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else if((addr>=0x9000)&&(addr<=0x9FFF))
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{
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reg1 = addr & 0x0F;
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SetBank();
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}
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else if((addr>=0xB800)&&(addr<=0xD7FF))
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{
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if ((addr >= 0xB800) && (addr <= 0xBFFF)) {
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DRAM[0x0C00 + (addr - 0xB800)] = data;
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} else if ((addr >= 0xC000) && (addr <= 0xCBFF)) {
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CPU_MEM_BANK[(0xCC00+(addr-0xC000))>>13][(0xCC00+(addr-0xC000))&0x1FFF] = data;
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} else if ((addr >= 0xCC00) && (addr <= 0xD7FF)) {
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DRAM[0x1400 + (addr - 0xCC00)] = data;
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}
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}
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}
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void BoardKS7030::SetBank()
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{
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SetPROM_32K_Bank(3);
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SetCRAM_8K_Bank(0);
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memcpy( &CPU_MEM_BANK[5][0x1800], PROM+(0x1000*(reg0%0x20))+0x0000, 0x0800);
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memcpy( &CPU_MEM_BANK[6][0x0000], PROM+(0x1000*(reg0%0x20))+0x0800, 0x0800);
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memcpy( &CPU_MEM_BANK[6][0x0800], PROM+(0x1000*((reg1+8)%0x20)), 0x1000);
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}
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