283 lines
9.0 KiB
C#
283 lines
9.0 KiB
C#
//////////////////////////////////////////////////////////////////////////
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// Mapper064 Tengen Rambo-1 //
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//////////////////////////////////////////////////////////////////////////
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using static VirtualNes.Core.CPU;
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using static VirtualNes.MMU;
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using BYTE = System.Byte;
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using INT = System.Int32;
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namespace VirtualNes.Core
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{
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public class Mapper064 : Mapper
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{
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BYTE[] reg = new byte[3];
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BYTE irq_enable;
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BYTE irq_mode;
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INT irq_counter;
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INT irq_counter2;
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BYTE irq_latch;
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BYTE irq_reset;
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public Mapper064(NES parent) : base(parent)
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{
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}
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public override void Reset()
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{
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SetPROM_32K_Bank(PROM_8K_SIZE - 1, PROM_8K_SIZE - 1, PROM_8K_SIZE - 1, PROM_8K_SIZE - 1);
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if (VROM_1K_SIZE != 0)
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{
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SetVROM_8K_Bank(0);
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}
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reg[0] = reg[1] = reg[2] = 0;
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irq_enable = 0;
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irq_mode = 0;
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irq_counter = 0;
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irq_counter2 = 0;
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irq_latch = 0;
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irq_reset = 0;
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}
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//void Mapper064::Write(WORD addr, BYTE data)
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public override void Write(ushort addr, byte data)
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{
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//DEBUGOUT( "$%04X:$%02X\n", addr, data );
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switch (addr & 0xF003)
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{
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case 0x8000:
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reg[0] = (byte)(data & 0x0F);
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reg[1] = (byte)(data & 0x40);
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reg[2] = (byte)(data & 0x80);
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break;
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case 0x8001:
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switch (reg[0])
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{
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case 0x00:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(4, data + 0);
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SetVROM_1K_Bank(5, data + 1);
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}
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else
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{
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SetVROM_1K_Bank(0, data + 0);
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SetVROM_1K_Bank(1, data + 1);
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}
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break;
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case 0x01:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(6, data + 0);
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SetVROM_1K_Bank(7, data + 1);
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}
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else
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{
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SetVROM_1K_Bank(2, data + 0);
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SetVROM_1K_Bank(3, data + 1);
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}
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break;
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case 0x02:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(0, data);
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}
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else
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{
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SetVROM_1K_Bank(4, data);
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}
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break;
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case 0x03:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(1, data);
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}
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else
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{
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SetVROM_1K_Bank(5, data);
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}
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break;
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case 0x04:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(2, data);
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}
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else
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{
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SetVROM_1K_Bank(6, data);
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}
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break;
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case 0x05:
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if (reg[2] != 0)
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{
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SetVROM_1K_Bank(3, data);
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}
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else
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{
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SetVROM_1K_Bank(7, data);
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}
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break;
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case 0x06:
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if (reg[1] != 0)
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{
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SetPROM_8K_Bank(5, data);
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}
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else
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{
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SetPROM_8K_Bank(4, data);
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}
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break;
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case 0x07:
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if (reg[1] != 0)
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{
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SetPROM_8K_Bank(6, data);
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}
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else
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{
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SetPROM_8K_Bank(5, data);
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}
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break;
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case 0x08:
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SetVROM_1K_Bank(1, data);
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break;
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case 0x09:
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SetVROM_1K_Bank(3, data);
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break;
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case 0x0F:
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if (reg[1] != 0)
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{
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SetPROM_8K_Bank(4, data);
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}
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else
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{
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SetPROM_8K_Bank(6, data);
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}
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break;
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}
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break;
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case 0xA000:
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if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
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else SetVRAM_Mirror(VRAM_VMIRROR);
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break;
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case 0xC000:
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irq_latch = data;
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if (irq_reset != 0)
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{
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irq_counter = irq_latch;
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}
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break;
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case 0xC001:
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irq_reset = 0xFF;
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irq_counter = irq_latch;
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irq_mode = (byte)(data & 0x01);
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break;
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case 0xE000:
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irq_enable = 0;
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if (irq_reset != 0)
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{
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irq_counter = irq_latch;
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}
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nes.cpu.ClrIRQ(IRQ_MAPPER);
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break;
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case 0xE001:
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irq_enable = 0xFF;
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if (irq_reset != 0)
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{
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irq_counter = irq_latch;
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}
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break;
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}
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}
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//void Mapper064::Clock(INT cycles)
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public override void Clock(int cycles)
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{
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if (irq_mode == 0)
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return;
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irq_counter2 += cycles;
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while (irq_counter2 >= 4)
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{
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irq_counter2 -= 4;
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if (irq_counter >= 0)
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{
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irq_counter--;
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if (irq_counter < 0)
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{
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if (irq_enable != 0)
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{
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nes.cpu.SetIRQ(IRQ_MAPPER);
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}
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}
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}
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}
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}
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//void Mapper064::HSync(INT scanline)
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public override void HSync(int scanline)
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{
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if (irq_mode != 0)
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return;
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irq_reset = 0;
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if ((scanline >= 0 && scanline <= 239))
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{
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if (nes.ppu.IsDispON())
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{
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if (irq_counter >= 0)
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{
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irq_counter--;
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if (irq_counter < 0)
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{
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if (irq_enable != 0)
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{
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irq_reset = 1;
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nes.cpu.SetIRQ(IRQ_MAPPER);
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}
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}
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}
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}
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}
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}
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//void Mapper064::SaveState(LPBYTE p)
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public override void SaveState(byte[] p)
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{
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//p[0] = reg[0];
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//p[1] = reg[1];
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//p[2] = reg[2];
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//p[3] = irq_enable;
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//p[4] = irq_mode;
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//p[5] = irq_latch;
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//p[6] = irq_reset;
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//*((INT*)&p[8]) = irq_counter;
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//*((INT*)&p[12]) = irq_counter2;
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}
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//void Mapper064::LoadState(LPBYTE p)
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public override void LoadState(byte[] p)
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{
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//reg[0] = p[0];
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//reg[1] = p[1];
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//reg[2] = p[2];
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//irq_enable = p[3];
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//irq_mode = p[4];
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//irq_latch = p[5];
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//irq_reset = p[6];
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//irq_counter = *((INT*)&p[8]);
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//irq_counter2 = *((INT*)&p[12]);
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}
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public override bool IsStateSave()
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{
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return true;
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}
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}
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}
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