274 lines
7.3 KiB
C#
274 lines
7.3 KiB
C#
using System;
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using System.IO;
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namespace MyNes.Core
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{
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[BoardInfo("7-in-1 MMC3 Port 6800h with SRAM", 52, true, true)]
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internal class Mapper052 : Board
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{
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private bool flag_c;
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private bool flag_p;
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private int address_8001;
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private int[] chr_reg;
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private int[] prg_reg;
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private bool irq_enabled;
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private byte irq_counter;
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private int old_irq_counter;
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private byte irq_reload;
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private bool irq_clear;
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private bool mmc3_alt_behavior;
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private int prg_and;
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private int prg_or;
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private int chr_and;
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private int chr_or;
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private bool locked;
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internal override void HardReset()
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{
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base.HardReset();
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flag_c = (flag_p = false);
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locked = false;
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address_8001 = 0;
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prg_and = 31;
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prg_or = 0;
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chr_and = 255;
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chr_or = 0;
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prg_reg = new int[4];
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prg_reg[0] = 0;
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prg_reg[1] = 1;
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prg_reg[2] = PRG_ROM_08KB_Mask - 1;
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prg_reg[3] = PRG_ROM_08KB_Mask;
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SetupPRG();
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chr_reg = new int[6];
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for (int i = 0; i < 6; i++)
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{
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chr_reg[i] = 0;
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}
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irq_enabled = false;
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irq_counter = 0;
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irq_reload = byte.MaxValue;
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old_irq_counter = 0;
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irq_clear = false;
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if (IsGameFoundOnDB)
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{
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switch (GameCartInfo.chip_type[0].ToLower())
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{
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case "mmc3a":
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mmc3_alt_behavior = true;
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Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
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break;
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case "mmc3b":
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mmc3_alt_behavior = false;
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Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
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break;
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case "mmc3c":
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mmc3_alt_behavior = false;
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Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
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break;
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}
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}
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}
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internal override void SoftReset()
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{
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HardReset();
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}
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internal override void WriteSRM(ref ushort address, ref byte data)
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{
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if (!locked)
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{
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if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
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{
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locked = true;
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prg_and = ((data << 1) & 0x10) ^ 0x1F;
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prg_or = ((data & 6) | ((data >> 3) & data & 1)) << 4;
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chr_and = ((data & 0x40) << 1) ^ 0xFF;
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chr_or = (((data >> 3) & 4) | ((data >> 1) & 2) | ((data >> 6) & (data >> 4) & 1)) << 7;
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SetupCHR();
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SetupPRG();
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}
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}
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else
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{
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base.WriteSRM(ref address, ref data);
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}
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}
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internal override void WritePRG(ref ushort address, ref byte data)
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{
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switch (address & 0xE001)
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{
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case 32768:
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address_8001 = data & 7;
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flag_c = (data & 0x80) != 0;
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flag_p = (data & 0x40) != 0;
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SetupCHR();
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SetupPRG();
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break;
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case 32769:
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switch (address_8001)
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{
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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chr_reg[address_8001] = data;
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SetupCHR();
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break;
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case 6:
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case 7:
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prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
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SetupPRG();
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break;
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}
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break;
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case 40960:
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if (NMT_DEFAULT_MIRROR != Mirroring.Full)
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{
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Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
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}
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break;
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case 40961:
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TogglePRGRAMEnable((data & 0x80) != 0);
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TogglePRGRAMWritableEnable((data & 0x40) == 0);
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break;
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case 49152:
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irq_reload = data;
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break;
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case 49153:
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if (mmc3_alt_behavior)
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{
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irq_clear = true;
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}
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irq_counter = 0;
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break;
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case 57344:
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irq_enabled = false;
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NesEmu.IRQFlags &= -9;
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break;
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case 57345:
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irq_enabled = true;
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break;
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}
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}
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private void SetupCHR()
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{
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if (!flag_c)
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{
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Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
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Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
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Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
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Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
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Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
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Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
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}
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else
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{
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Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
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Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
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Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
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Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
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Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
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Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
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}
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}
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private void SetupPRG()
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{
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Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
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Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
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Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
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Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
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}
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internal override void OnPPUA12RaisingEdge()
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{
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old_irq_counter = irq_counter;
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if (irq_counter == 0 || irq_clear)
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{
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irq_counter = irq_reload;
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}
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else
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{
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irq_counter--;
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}
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if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
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{
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NesEmu.IRQFlags |= 8;
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}
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irq_clear = false;
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}
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internal override void WriteStateData(ref BinaryWriter stream)
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{
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base.WriteStateData(ref stream);
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stream.Write(flag_c);
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stream.Write(flag_p);
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stream.Write(address_8001);
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for (int i = 0; i < chr_reg.Length; i++)
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{
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stream.Write(chr_reg[i]);
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}
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for (int j = 0; j < prg_reg.Length; j++)
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{
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stream.Write(prg_reg[j]);
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}
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stream.Write(irq_enabled);
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stream.Write(irq_counter);
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stream.Write(old_irq_counter);
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stream.Write(irq_reload);
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stream.Write(irq_clear);
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stream.Write(prg_and);
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stream.Write(prg_or);
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stream.Write(chr_and);
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stream.Write(chr_or);
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stream.Write(locked);
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}
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internal override void ReadStateData(ref BinaryReader stream)
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{
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base.ReadStateData(ref stream);
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flag_c = stream.ReadBoolean();
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flag_p = stream.ReadBoolean();
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address_8001 = stream.ReadInt32();
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for (int i = 0; i < chr_reg.Length; i++)
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{
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chr_reg[i] = stream.ReadInt32();
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}
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for (int j = 0; j < prg_reg.Length; j++)
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{
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prg_reg[j] = stream.ReadInt32();
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}
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irq_enabled = stream.ReadBoolean();
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irq_counter = stream.ReadByte();
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old_irq_counter = stream.ReadInt32();
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irq_reload = stream.ReadByte();
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irq_clear = stream.ReadBoolean();
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prg_and = stream.ReadInt32();
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prg_or = stream.ReadInt32();
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chr_and = stream.ReadInt32();
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chr_or = stream.ReadInt32();
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locked = stream.ReadBoolean();
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}
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}
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}
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