220 lines
6.0 KiB
C#
220 lines
6.0 KiB
C#
using System.IO;
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namespace MyNes.Core
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{
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[BoardInfo("Jaleco SS8806", 18)]
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internal class Mapper018 : Board
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{
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private int[] prg_reg;
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private int[] chr_reg;
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private int irqRelaod;
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private int irqCounter;
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private bool irqEnable;
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private int irqMask;
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internal override void HardReset()
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{
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base.HardReset();
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Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
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prg_reg = new int[3];
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chr_reg = new int[8];
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}
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internal override void WritePRG(ref ushort address, ref byte data)
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{
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switch (address & 0xF003)
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{
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case 32768:
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prg_reg[0] = (prg_reg[0] & 0xF0) | (data & 0xF);
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Switch08KPRG(prg_reg[0], PRGArea.Area8000);
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break;
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case 32769:
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prg_reg[0] = (prg_reg[0] & 0xF) | ((data & 0xF) << 4);
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Switch08KPRG(prg_reg[0], PRGArea.Area8000);
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break;
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case 32770:
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prg_reg[1] = (prg_reg[1] & 0xF0) | (data & 0xF);
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Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
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break;
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case 32771:
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prg_reg[1] = (prg_reg[1] & 0xF) | ((data & 0xF) << 4);
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Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
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break;
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case 36864:
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prg_reg[2] = (prg_reg[2] & 0xF0) | (data & 0xF);
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Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
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break;
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case 36865:
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prg_reg[2] = (prg_reg[2] & 0xF) | ((data & 0xF) << 4);
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Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
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break;
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case 40960:
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chr_reg[0] = (chr_reg[0] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[0], CHRArea.Area0000);
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break;
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case 40961:
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chr_reg[0] = (chr_reg[0] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[0], CHRArea.Area0000);
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break;
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case 40962:
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chr_reg[1] = (chr_reg[1] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[1], CHRArea.Area0400);
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break;
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case 40963:
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chr_reg[1] = (chr_reg[1] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[1], CHRArea.Area0400);
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break;
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case 45056:
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chr_reg[2] = (chr_reg[2] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[2], CHRArea.Area0800);
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break;
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case 45057:
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chr_reg[2] = (chr_reg[2] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[2], CHRArea.Area0800);
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break;
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case 45058:
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chr_reg[3] = (chr_reg[3] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
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break;
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case 45059:
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chr_reg[3] = (chr_reg[3] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
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break;
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case 49152:
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chr_reg[4] = (chr_reg[4] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[4], CHRArea.Area1000);
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break;
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case 49153:
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chr_reg[4] = (chr_reg[4] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[4], CHRArea.Area1000);
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break;
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case 49154:
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chr_reg[5] = (chr_reg[5] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[5], CHRArea.Area1400);
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break;
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case 49155:
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chr_reg[5] = (chr_reg[5] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[5], CHRArea.Area1400);
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break;
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case 53248:
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chr_reg[6] = (chr_reg[6] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[6], CHRArea.Area1800);
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break;
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case 53249:
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chr_reg[6] = (chr_reg[6] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[6], CHRArea.Area1800);
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break;
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case 53250:
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chr_reg[7] = (chr_reg[7] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
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break;
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case 53251:
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chr_reg[7] = (chr_reg[7] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
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break;
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case 57344:
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irqRelaod = (irqRelaod & 0xFFF0) | (data & 0xF);
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break;
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case 57345:
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irqRelaod = (irqRelaod & 0xFF0F) | ((data & 0xF) << 4);
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break;
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case 57346:
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irqRelaod = (irqRelaod & 0xF0FF) | ((data & 0xF) << 8);
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break;
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case 57347:
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irqRelaod = (irqRelaod & 0xFFF) | ((data & 0xF) << 12);
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break;
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case 61440:
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irqCounter = irqRelaod;
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NesEmu.IRQFlags &= -9;
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break;
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case 61441:
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irqEnable = (data & 1) == 1;
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if ((data & 8) == 8)
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{
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irqMask = 15;
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}
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else if ((data & 4) == 4)
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{
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irqMask = 255;
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}
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else if ((data & 2) == 2)
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{
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irqMask = 4095;
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}
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else
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{
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irqMask = 65535;
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}
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NesEmu.IRQFlags &= -9;
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break;
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case 61442:
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switch (data & 3)
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{
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case 0:
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Switch01KNMTFromMirroring(Mirroring.Horz);
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break;
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case 1:
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Switch01KNMTFromMirroring(Mirroring.Vert);
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break;
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case 2:
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Switch01KNMTFromMirroring(Mirroring.OneScA);
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break;
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case 3:
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Switch01KNMTFromMirroring(Mirroring.OneScB);
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break;
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}
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break;
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}
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}
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internal override void OnCPUClock()
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{
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if (irqEnable && (irqCounter & irqMask) > 0 && (--irqCounter & irqMask) == 0)
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{
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irqEnable = false;
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NesEmu.IRQFlags |= 8;
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}
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}
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internal override void WriteStateData(ref BinaryWriter stream)
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{
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base.WriteStateData(ref stream);
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for (int i = 0; i < prg_reg.Length; i++)
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{
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stream.Write(prg_reg[i]);
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}
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for (int j = 0; j < chr_reg.Length; j++)
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{
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stream.Write(chr_reg[j]);
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}
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stream.Write(irqRelaod);
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stream.Write(irqCounter);
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stream.Write(irqEnable);
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stream.Write(irqMask);
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}
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internal override void ReadStateData(ref BinaryReader stream)
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{
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base.ReadStateData(ref stream);
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for (int i = 0; i < prg_reg.Length; i++)
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{
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prg_reg[i] = stream.ReadInt32();
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}
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for (int j = 0; j < chr_reg.Length; j++)
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{
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chr_reg[j] = stream.ReadInt32();
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}
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irqRelaod = stream.ReadInt32();
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irqCounter = stream.ReadInt32();
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irqEnable = stream.ReadBoolean();
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irqMask = stream.ReadInt32();
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}
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}
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}
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