237 lines
9.4 KiB
C#
237 lines
9.4 KiB
C#
using System;
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namespace VirtualNes
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{
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public static class MMU
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{
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// CPU 儊儌儕僶儞僋
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public static Memory<byte>[] CPU_MEM_BANK = new Memory<byte>[8]; // 8K扨埵
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public static byte[] CPU_MEM_TYPE = new byte[8];
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public static int[] CPU_MEM_PAGE = new int[8]; // 僗僥乕僩僙乕僽梡
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// PPU 儊儌儕僶儞僋
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public static Memory<byte>[] PPU_MEM_BANK = new Memory<byte>[12]; // 1K扨埵
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public static byte[] PPU_MEM_TYPE = new byte[12];
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public static int[] PPU_MEM_PAGE = new int[12]; // 僗僥乕僩僙乕僽梡
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public static byte[] CRAM_USED = new byte[16]; // 僗僥乕僩僙乕僽梡
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// NES儊儌儕
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public static byte[] RAM = new byte[8 * 1024]; // NES撪憻RAM
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public static byte[] WRAM = new byte[128 * 1024]; // 儚乕僋/僶僢僋傾僢僾RAM
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public static byte[] DRAM = new byte[40 * 1024]; // 僨傿僗僋僔僗僥儉RAM
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public static byte[] XRAM = new byte[8 * 1024]; // 僟儈乕僶儞僋
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public static byte[] ERAM = new byte[32 * 1024]; // 奼挘婡婍梡RAM
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public static byte[] CRAM = new byte[32 * 1024]; // 僉儍儔僋僞僷僞乕儞RAM
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public static byte[] VRAM = new byte[4 * 1024]; // 僱乕儉僥乕僽儖/傾僩儕價儏乕僩RAM
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public static byte[] SPRAM = new byte[0x100]; // 僗僾儔僀僩RAM
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public static byte[] BGPAL = new byte[0x10]; // BG僷儗僢僩
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public static byte[] SPPAL = new byte[0x10]; // SP僷儗僢僩
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// 儗僕僗僞
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public static byte[] CPUREG = new byte[0x18]; // Nes $4000-$4017
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public static byte[] PPUREG = new byte[0x04]; // Nes $2000-$2003
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// PPU撪晹儗僕僗僞
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public static byte PPU56Toggle; // $2005-$2006 Toggle
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public static byte PPU7_Temp; // $2007 read buffer
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public static ushort loopy_t; // same as $2005/$2006
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public static ushort loopy_v; // same as $2005/$2006
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public static ushort loopy_x; // tile x offset
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// ROM僨乕僞億僀儞僞
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public static byte[] PROM; // PROM ptr
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public static byte[] VROM; // VROM ptr
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// For dis...
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public static byte PROM_ACCESS;
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// ROM 僶儞僋僒僀僘
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public static int PROM_8K_SIZE, PROM_16K_SIZE, PROM_32K_SIZE;
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public static int VROM_1K_SIZE, VROM_2K_SIZE, VROM_4K_SIZE, VROM_8K_SIZE;
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// 儊儌儕僞僀僾
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// For PROM (CPU)
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public const byte BANKTYPE_ROM = 0x00;
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public const byte BANKTYPE_RAM = 0xFF;
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public const byte BANKTYPE_DRAM = 0x01;
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public const byte BANKTYPE_MAPPER = 0x80;
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// For VROM/VRAM=/CRAM (PPU)
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public const byte BANKTYPE_VROM = 0x00;
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public const byte BANKTYPE_CRAM = 0x01;
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public const byte BANKTYPE_VRAM = 0x80;
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// 儈儔乕僞僀僾
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public const byte VRAM_HMIRROR = 0x00; // Horizontal
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public const byte VRAM_VMIRROR = 0x01; // Virtical
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public const byte VRAM_MIRROR4 = 0x02; // All screen
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public const byte VRAM_MIRROR4L = 0x03; // PA10 L屌掕 $2000-$23FF偺儈儔乕
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public const byte VRAM_MIRROR4H = 0x04; // PA10 H屌掕 $2400-$27FF偺儈儔乕
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internal static void SetPROM_Bank(byte page, Memory<byte> ptr, byte type)
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{
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CPU_MEM_BANK[page] = ptr;
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CPU_MEM_TYPE[page] = type;
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CPU_MEM_PAGE[page] = 0;
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}
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internal static void SetPROM_8K_Bank(byte page, int bank)
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{
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bank %= PROM_8K_SIZE;
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CPU_MEM_BANK[page] = new Memory<byte>(MMU.PROM, 0x2000 * bank, MMU.PROM.Length - 0x2000 * bank);
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CPU_MEM_TYPE[page] = BANKTYPE_ROM;
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CPU_MEM_PAGE[page] = bank;
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}
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internal static void SetPROM_16K_Bank(byte page, int bank)
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{
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SetPROM_8K_Bank((byte)(page + 0), bank * 2 + 0);
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SetPROM_8K_Bank((byte)(page + 1), bank * 2 + 1);
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}
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internal static void SetPROM_32K_Bank(int bank)
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{
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SetPROM_8K_Bank(4, bank * 4 + 0);
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SetPROM_8K_Bank(5, bank * 4 + 1);
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SetPROM_8K_Bank(6, bank * 4 + 2);
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SetPROM_8K_Bank(7, bank * 4 + 3);
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}
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internal static void SetPROM_32K_Bank(int bank0, int bank1, int bank2, int bank3)
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{
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SetPROM_8K_Bank(4, bank0);
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SetPROM_8K_Bank(5, bank1);
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SetPROM_8K_Bank(6, bank2);
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SetPROM_8K_Bank(7, bank3);
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}
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// PPU VROM bank
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internal static void SetVROM_Bank(byte page, Memory<byte> ptr, byte type)
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{
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PPU_MEM_BANK[page] = ptr;
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PPU_MEM_TYPE[page] = type;
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PPU_MEM_PAGE[page] = 0;
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}
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internal static void SetVROM_1K_Bank(byte page, int bank)
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{
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bank %= VROM_1K_SIZE;
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PPU_MEM_BANK[page] = new Memory<byte>(VROM, 0x0400 * bank, VROM.Length - (0x0400 * bank));
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PPU_MEM_TYPE[page] = BANKTYPE_VROM;
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PPU_MEM_PAGE[page] = bank;
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}
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internal static void SetVROM_2K_Bank(byte page, int bank)
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{
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SetVROM_1K_Bank((byte)(page + 0), bank * 2 + 0);
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SetVROM_1K_Bank((byte)(page + 1), bank * 2 + 1);
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}
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internal static void SetVROM_4K_Bank(byte page, int bank)
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{
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SetVROM_1K_Bank((byte)(page + 0), bank * 4 + 0);
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SetVROM_1K_Bank((byte)(page + 1), bank * 4 + 1);
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SetVROM_1K_Bank((byte)(page + 2), bank * 4 + 2);
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SetVROM_1K_Bank((byte)(page + 3), bank * 4 + 3);
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}
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internal static void SetVROM_8K_Bank(int bank)
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{
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for (byte i = 0; i < 8; i++)
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{
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SetVROM_1K_Bank(i, bank * 8 + i);
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}
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}
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internal static void SetVROM_8K_Bank(int bank0, int bank1, int bank2, int bank3,
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int bank4, int bank5, int bank6, int bank7)
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{
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SetVROM_1K_Bank(0, bank0);
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SetVROM_1K_Bank(1, bank1);
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SetVROM_1K_Bank(2, bank2);
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SetVROM_1K_Bank(3, bank3);
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SetVROM_1K_Bank(4, bank4);
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SetVROM_1K_Bank(5, bank5);
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SetVROM_1K_Bank(6, bank6);
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SetVROM_1K_Bank(7, bank7);
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}
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internal static void SetCRAM_1K_Bank(byte page, int bank)
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{
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bank &= 0x1F;
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PPU_MEM_BANK[page] = new Memory<byte>(MMU.CRAM, 0x0400 * bank, MMU.CRAM.Length - 0x0400 * bank);
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PPU_MEM_TYPE[page] = BANKTYPE_CRAM;
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PPU_MEM_PAGE[page] = bank;
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CRAM_USED[bank >> 2] = 0xFF; // CRAM巊梡僼儔僌
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}
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internal static void SetCRAM_2K_Bank(byte page, int bank)
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{
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SetCRAM_1K_Bank((byte)(page + 0), bank * 2 + 0);
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SetCRAM_1K_Bank((byte)(page + 1), bank * 2 + 1);
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}
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internal static void SetCRAM_4K_Bank(byte page, int bank)
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{
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SetCRAM_1K_Bank((byte)(page + 0), bank * 4 + 0);
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SetCRAM_1K_Bank((byte)(page + 1), bank * 4 + 1);
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SetCRAM_1K_Bank((byte)(page + 2), bank * 4 + 2);
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SetCRAM_1K_Bank((byte)(page + 3), bank * 4 + 3);
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}
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internal static void SetCRAM_8K_Bank(int bank)
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{
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for (byte i = 0; i < 8; i++)
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{
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SetCRAM_1K_Bank(i, bank * 8 + 1);
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}
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}
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internal static void SetVRAM_1K_Bank(byte page, int bank)
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{
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bank &= 3;
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PPU_MEM_BANK[page] = new Memory<byte>(VRAM, 0x0400 * bank, VRAM.Length - 0x0400 * bank);
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PPU_MEM_TYPE[page] = BANKTYPE_VRAM;
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PPU_MEM_PAGE[page] = bank;
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}
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internal static void SetVRAM_Bank(int bank0, int bank1, int bank2, int bank3)
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{
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SetVRAM_1K_Bank(8, bank0);
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SetVRAM_1K_Bank(9, bank1);
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SetVRAM_1K_Bank(10, bank2);
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SetVRAM_1K_Bank(11, bank3);
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}
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internal static void SetVRAM_Mirror(int type)
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{
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switch (type)
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{
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case VRAM_HMIRROR:
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SetVRAM_Bank(0, 0, 1, 1);
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break;
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case VRAM_VMIRROR:
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SetVRAM_Bank(0, 1, 0, 1);
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break;
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case VRAM_MIRROR4L:
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SetVRAM_Bank(0, 0, 0, 0);
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break;
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case VRAM_MIRROR4H:
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SetVRAM_Bank(1, 1, 1, 1);
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break;
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case VRAM_MIRROR4:
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SetVRAM_Bank(0, 1, 2, 3);
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break;
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}
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}
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internal static void SetVRAM_Mirror(int bank0, int bank1, int bank2, int bank3)
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{
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SetVRAM_1K_Bank(8, bank0);
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SetVRAM_1K_Bank(9, bank1);
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SetVRAM_1K_Bank(10, bank2);
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SetVRAM_1K_Bank(11, bank3);
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}
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}
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}
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