284 lines
9.6 KiB
C#
284 lines
9.6 KiB
C#
//////////////////////////////////////////////////////////////////////////
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// Mapper018 Jaleco SS8806 //
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//////////////////////////////////////////////////////////////////////////
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using System;
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using static VirtualNes.Core.CPU;
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using static VirtualNes.MMU;
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using BYTE = System.Byte;
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using INT = System.Int32;
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namespace VirtualNes.Core
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{
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public class Mapper018 : Mapper
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{
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BYTE[] reg = new byte[11];
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BYTE irq_enable;
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BYTE irq_mode;
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INT irq_latch;
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INT irq_counter;
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public Mapper018(NES parent) : base(parent)
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{
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}
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public override void Reset()
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{
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for (INT i = 0; i < 11; i++)
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{
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reg[i] = 0;
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}
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reg[2] = (byte)(PROM_8K_SIZE - 2);
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reg[3] = (byte)(PROM_8K_SIZE - 1);
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SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
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irq_enable = 0;
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irq_mode = 0;
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irq_counter = 0xFFFF;
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irq_latch = 0xFFFF;
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uint crc = nes.rom.GetPROM_CRC();
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if (crc == 0xefb1df9e)
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{ // The Lord of King(J)
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nes.SetRenderMethod(EnumRenderMethod.PRE_ALL_RENDER);
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}
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if (crc == 0x3746f951)
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{ // Pizza Pop!(J)
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nes.SetRenderMethod(EnumRenderMethod.PRE_ALL_RENDER);
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}
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// nes.SetRenderMethod( NES::PRE_ALL_RENDER );
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// nes.SetRenderMethod( NES::POST_ALL_RENDER );
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}
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//void Mapper018::Write(WORD addr, BYTE data)
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public override void Write(ushort addr, byte data)
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{
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switch (addr)
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{
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case 0x8000:
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reg[0] = (byte)((reg[0] & 0xF0) | (data & 0x0F));
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SetPROM_8K_Bank(4, reg[0]);
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break;
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case 0x8001:
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reg[0] = (byte)((reg[0] & 0x0F) | ((data & 0x0F) << 4));
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SetPROM_8K_Bank(4, reg[0]);
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break;
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case 0x8002:
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reg[1] = (byte)((reg[1] & 0xF0) | (data & 0x0F));
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SetPROM_8K_Bank(5, reg[1]);
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break;
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case 0x8003:
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reg[1] = (byte)((reg[1] & 0x0F) | ((data & 0x0F) << 4));
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SetPROM_8K_Bank(5, reg[1]);
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break;
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case 0x9000:
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reg[2] = (byte)((reg[2] & 0xF0) | (data & 0x0F));
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SetPROM_8K_Bank(6, reg[2]);
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break;
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case 0x9001:
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reg[2] = (byte)((reg[2] & 0x0F) | ((data & 0x0F) << 4));
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SetPROM_8K_Bank(6, reg[2]);
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break;
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case 0xA000:
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reg[3] = (byte)((reg[3] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(0, reg[3]);
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break;
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case 0xA001:
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reg[3] = (byte)((reg[3] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(0, reg[3]);
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break;
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case 0xA002:
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reg[4] = (byte)((reg[4] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(1, reg[4]);
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break;
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case 0xA003:
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reg[4] = (byte)((reg[4] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(1, reg[4]);
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break;
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case 0xB000:
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reg[5] = (byte)((reg[5] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(2, reg[5]);
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break;
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case 0xB001:
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reg[5] = (byte)((reg[5] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(2, reg[5]);
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break;
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case 0xB002:
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reg[6] = (byte)((reg[6] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(3, reg[6]);
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break;
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case 0xB003:
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reg[6] = (byte)((reg[6] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(3, reg[6]);
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break;
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case 0xC000:
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reg[7] = (byte)((reg[7] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(4, reg[7]);
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break;
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case 0xC001:
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reg[7] = (byte)((reg[7] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(4, reg[7]);
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break;
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case 0xC002:
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reg[8] = (byte)((reg[8] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(5, reg[8]);
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break;
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case 0xC003:
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reg[8] = (byte)((reg[8] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(5, reg[8]);
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break;
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case 0xD000:
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reg[9] = (byte)((reg[9] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(6, reg[9]);
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break;
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case 0xD001:
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reg[9] = (byte)((reg[9] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(6, reg[9]);
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break;
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case 0xD002:
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reg[10] = (byte)((reg[10] & 0xF0) | (data & 0x0F));
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SetVROM_1K_Bank(7, reg[10]);
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break;
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case 0xD003:
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reg[10] = (byte)((reg[10] & 0x0F) | ((data & 0x0F) << 4));
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SetVROM_1K_Bank(7, reg[10]);
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break;
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case 0xE000:
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irq_latch = (irq_latch & 0xFFF0) | (data & 0x0F);
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break;
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case 0xE001:
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irq_latch = (irq_latch & 0xFF0F) | ((data & 0x0F) << 4);
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break;
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case 0xE002:
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irq_latch = (irq_latch & 0xF0FF) | ((data & 0x0F) << 8);
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break;
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case 0xE003:
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irq_latch = (irq_latch & 0x0FFF) | ((data & 0x0F) << 12);
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break;
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case 0xF000:
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// if( data & 0x01 ) {
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irq_counter = irq_latch;
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// } else {
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// irq_counter = 0;
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// }
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break;
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case 0xF001:
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irq_mode = (byte)((data >> 1) & 0x07);
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irq_enable = ((byte)(data & 0x01));
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// if( !irq_enable ) {
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nes.cpu.ClrIRQ(IRQ_MAPPER);
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// }
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break;
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case 0xF002:
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data &= 0x03;
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if (data == 0) SetVRAM_Mirror(VRAM_HMIRROR);
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else if (data == 1) SetVRAM_Mirror(VRAM_VMIRROR);
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else SetVRAM_Mirror(VRAM_MIRROR4L);
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break;
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}
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}
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//void Mapper018::Clock(INT cycles)
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public override void Clock(int cycles)
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{
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bool bIRQ = false;
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INT irq_counter_old = irq_counter;
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if (irq_enable != 0 && irq_counter != 0)
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{
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irq_counter -= cycles;
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switch (irq_mode)
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{
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case 0:
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if (irq_counter <= 0)
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{
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bIRQ = true;
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}
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break;
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case 1:
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if ((irq_counter & 0xF000) != (irq_counter_old & 0xF000))
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{
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bIRQ = true;
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}
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break;
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case 2:
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case 3:
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if ((irq_counter & 0xFF00) != (irq_counter_old & 0xFF00))
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{
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bIRQ = true;
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}
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break;
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case 4:
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case 5:
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case 6:
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case 7:
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if ((irq_counter & 0xFFF0) != (irq_counter_old & 0xFFF0))
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{
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bIRQ = true;
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}
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break;
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}
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if (bIRQ)
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{
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//// irq_enable = 0;
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// irq_counter = irq_latch;
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irq_counter = 0;
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irq_enable = 0;
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// nes.cpu.IRQ_NotPending();
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nes.cpu.SetIRQ(IRQ_MAPPER);
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}
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}
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}
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//void Mapper018::SaveState(LPBYTE p)
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public override void SaveState(byte[] p)
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{
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for (INT i = 0; i < 11; i++)
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{
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p[i] = reg[i];
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}
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p[11] = irq_enable;
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p[12] = irq_mode;
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//*(INT*)&p[13] = irq_counter;
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BitConverter.GetBytes(irq_counter).CopyTo(p, 13);
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//*(INT*)&p[17] = irq_latch;
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BitConverter.GetBytes(irq_latch).CopyTo(p, 17);
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}
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//void Mapper018::LoadState(LPBYTE p)
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public override void LoadState(byte[] p)
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{
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for (INT i = 0; i < 11; i++)
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{
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p[i] = reg[i];
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}
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irq_enable = p[11];
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irq_mode = p[12];
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//irq_counter = *(INT*)&p[13];
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irq_counter = BitConverter.ToInt32(p, 13);
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//irq_latch = *(INT*)&p[17];
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irq_latch = BitConverter.ToInt32(p, 17);
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}
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public override bool IsStateSave()
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{
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return true;
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}
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}
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}
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