244 lines
4.8 KiB
C#
244 lines
4.8 KiB
C#
/////////////////////////////
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// Mapper083 Cony //
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//////////////////////////////////////////////////////////////////////////
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using static VirtualNes.MMU;
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using static VirtualNes.Core.CPU;
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using INT = System.Int32;
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using BYTE = System.Byte;
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using System;
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using Codice.CM.Client.Differences;
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namespace VirtualNes.Core
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{
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public class Mapper083 : Mapper
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{
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BYTE[] reg = new byte[3];
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INT chr_bank;
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BYTE irq_enable;
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INT irq_counter;
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BYTE patch;
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public Mapper083(NES parent) : base(parent)
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{
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}
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public override void Reset()
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{
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for (INT i = 0; i < 3; i++)
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{
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reg[i] = 0x00;
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}
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if (PROM_8K_SIZE >= 32)
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{
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SetPROM_32K_Bank(0, 1, 30, 31);
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reg[1] = 0x30;
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}
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else
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{
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SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
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}
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if (VROM_1K_SIZE != 0)
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{
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SetVROM_8K_Bank(0);
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}
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chr_bank = 0;
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irq_enable = 0; // Disable
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irq_counter = 0;
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patch = 0;
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if (nes.rom.GetPROM_CRC() == 0x1461D1F8)
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{
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patch = 1;
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}
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}
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//BYTE Mapper083::ReadLow(WORD addr)
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public override byte ReadLow(ushort addr)
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{
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if ((addr & 0x5100) == 0x5100)
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{
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return reg[2];
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}
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else if (addr >= 0x6000)
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{
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return base.ReadLow(addr);
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}
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return (BYTE)(addr >> 8);
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}
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//void Mapper083::WriteLow(WORD addr, BYTE data)
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public override void WriteLow(ushort addr, byte data)
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{
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//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes.GetScanline(), nes.cpu.GetTotalCycles() );
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switch (addr)
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{
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case 0x5101:
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case 0x5102:
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case 0x5103:
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reg[2] = data;
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break;
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}
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if (addr >= 0x6000)
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{
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base.WriteLow(addr, data);
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}
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}
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//void Mapper083::Write(WORD addr, BYTE data)
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public override void Write(ushort addr, byte data)
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{
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//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes.GetScanline(), nes.cpu.GetTotalCycles() );
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switch (addr)
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{
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case 0x8000:
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case 0xB000:
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case 0xB0FF:
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case 0xB1FF:
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reg[0] = data;
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chr_bank = (data & 0x30) << 4;
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SetPROM_16K_Bank(4, data);
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SetPROM_16K_Bank(6, (data & 0x30) | 0x0F);
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break;
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case 0x8100:
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reg[1] = (byte)(data & 0x80);
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data &= 0x03;
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if (data == 0) SetVRAM_Mirror(VRAM_VMIRROR);
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else if (data == 1) SetVRAM_Mirror(VRAM_HMIRROR);
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else if (data == 2) SetVRAM_Mirror(VRAM_MIRROR4L);
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else SetVRAM_Mirror(VRAM_MIRROR4H);
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break;
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case 0x8200:
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irq_counter = (irq_counter & 0xFF00) | (INT)data;
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// nes.cpu.ClrIRQ( IRQ_MAPPER );
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break;
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case 0x8201:
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irq_counter = (irq_counter & 0x00FF) | ((INT)data << 8);
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irq_enable = reg[1];
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// nes.cpu.ClrIRQ( IRQ_MAPPER );
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break;
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case 0x8300:
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SetPROM_8K_Bank(4, data);
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break;
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case 0x8301:
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SetPROM_8K_Bank(5, data);
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break;
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case 0x8302:
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SetPROM_8K_Bank(6, data);
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break;
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case 0x8310:
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if (patch != 0)
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{
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SetVROM_2K_Bank(0, chr_bank | data);
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}
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else
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{
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SetVROM_1K_Bank(0, chr_bank | data);
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}
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break;
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case 0x8311:
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if (patch != 0)
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{
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SetVROM_2K_Bank(2, chr_bank | data);
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}
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else
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{
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SetVROM_1K_Bank(1, chr_bank | data);
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}
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break;
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case 0x8312:
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SetVROM_1K_Bank(2, chr_bank | data);
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break;
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case 0x8313:
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SetVROM_1K_Bank(3, chr_bank | data);
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break;
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case 0x8314:
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SetVROM_1K_Bank(4, chr_bank | data);
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break;
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case 0x8315:
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SetVROM_1K_Bank(5, chr_bank | data);
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break;
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case 0x8316:
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if (patch != 0)
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{
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SetVROM_2K_Bank(4, chr_bank | data);
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}
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else
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{
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SetVROM_1K_Bank(6, chr_bank | data);
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}
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break;
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case 0x8317:
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if (patch != 0)
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{
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SetVROM_2K_Bank(6, chr_bank | data);
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}
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else
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{
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SetVROM_1K_Bank(7, chr_bank | data);
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}
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break;
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case 0x8318:
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SetPROM_16K_Bank(4, (reg[0] & 0x30) | data);
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break;
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}
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}
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//void Mapper083::HSync(INT scanline)
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public override void HSync(int scanline)
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{
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if (irq_enable != 0)
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{
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if (irq_counter <= 113)
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{
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// nes.cpu.IRQ();
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irq_enable = 0;
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// nes.cpu.SetIRQ( IRQ_MAPPER );
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nes.cpu.SetIRQ(IRQ_TRIGGER);
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}
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else
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{
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irq_counter -= 113;
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}
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}
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}
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//void Mapper083::SaveState(LPBYTE p)
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public override void SaveState(byte[] p)
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{
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//p[0] = reg[0];
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//p[1] = reg[1];
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//p[2] = reg[2];
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//*(INT*)&p[3] = chr_bank;
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//p[7] = irq_enable;
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//*(INT*)&p[8] = irq_counter;
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}
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//void Mapper083::LoadState(LPBYTE p)
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public override void LoadState(byte[] p)
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{
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//reg[0] = p[0];
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//reg[1] = p[1];
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//reg[2] = p[2];
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//chr_bank = *(INT*)&p[3];
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//irq_enable = p[7];
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//irq_counter = *(INT*)&p[8];
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}
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public override bool IsStateSave()
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{
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return true;
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}
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}
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}
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