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sin365 merged 35 commits from dev_4VirtualNes into master 2024-08-05 17:49:44 +08:00
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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper114.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper114 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using System.Text.RegularExpressions;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper114 : Mapper
{
BYTE reg_m, reg_a;
BYTE[] reg_b = new BYTE[8];
BYTE reg_c;
BYTE irq_counter;
BYTE irq_occur;
public Mapper114(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
if (VROM_1K_SIZE != 0)
{
SetVROM_8K_Bank(0);
}
reg_a = reg_c = reg_m = 0;
for (INT i = 0; i < 8; i++)
{
reg_b[i] = 0;
}
irq_counter = 0;
irq_occur = 0;
nes.SetRenderMethod(EnumRenderMethod.POST_RENDER);
}
//void Mapper114::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
reg_m = data;
SetBank_CPU();
}
//void Mapper114::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
if (addr == 0xE003)
{
irq_counter = data;
}
else
if (addr == 0xE002)
{
irq_occur = 0;
nes.cpu.ClrIRQ(IRQ_MAPPER);
}
else
{
switch (addr & 0xE000)
{
case 0x8000:
if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
else SetVRAM_Mirror(VRAM_VMIRROR);
break;
case 0xA000:
reg_c = 1;
reg_a = data;
break;
case 0xC000:
if (reg_c == 0)
{
break;
}
reg_b[reg_a & 0x07] = data;
switch (reg_a & 0x07)
{
case 0:
case 1:
case 2:
case 3:
case 6:
case 7:
SetBank_PPU();
break;
case 4:
case 5:
SetBank_CPU();
break;
}
reg_c = 0;
break;
}
}
}
//void Mapper114::Clock(INT scanline)
public override void Clock(int cycles)
{
// if( irq_occur ) {
// nes.cpu.IRQ_NotPending();
// }
}
//void Mapper114::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239) && nes.ppu.IsDispON())
{
if (irq_counter != 0)
{
irq_counter--;
if (irq_counter == 0)
{
irq_occur = 0xFF;
nes.cpu.SetIRQ(IRQ_MAPPER);
}
}
}
}
void SetBank_CPU()
{
if ((reg_m & 0x80) != 0)
{
SetPROM_16K_Bank(4, reg_m & 0x1F);
}
else
{
SetPROM_8K_Bank(4, reg_b[4]);
SetPROM_8K_Bank(5, reg_b[5]);
}
}
void SetBank_PPU()
{
SetVROM_2K_Bank(0, reg_b[0] >> 1);
SetVROM_2K_Bank(2, reg_b[2] >> 1);
SetVROM_1K_Bank(4, reg_b[6]);
SetVROM_1K_Bank(5, reg_b[1]);
SetVROM_1K_Bank(6, reg_b[7]);
SetVROM_1K_Bank(7, reg_b[3]);
}
//void Mapper114::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (int i = 0; i < 8; i++)
{
p[i] = reg_b[i];
}
p[8] = reg_m;
p[9] = reg_a;
p[10] = reg_c;
p[11] = irq_counter;
p[12] = irq_occur;
}
//void Mapper114::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (int i = 0; i < 8; i++)
{
reg_b[i] = p[i];
}
reg_m = p[8];
reg_a = p[9];
reg_c = p[10];
irq_counter = p[11];
irq_occur = p[12];
}
public override bool IsStateSave()
{
return true;
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper115.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper115 CartSaint : Yuu Yuu Hakusho Final //
// JusticePao(?) //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper115 : Mapper
{
BYTE[] reg = new byte[8];
BYTE prg0, prg1, prg2, prg3;
BYTE prg0L, prg1L;
BYTE chr0, chr1, chr2, chr3, chr4, chr5, chr6, chr7;
BYTE irq_enable;
BYTE irq_counter;
BYTE irq_latch;
BYTE ExPrgSwitch;
BYTE ExChrSwitch;
public Mapper115(NES parent) : base(parent)
{
}
public override void Reset()
{
for (INT i = 0; i < 8; i++)
{
reg[i] = 0x00;
}
prg0 = prg0L = 0;
prg1 = prg1L = 1;
prg2 = (byte)(PROM_8K_SIZE - 2);
prg3 = (byte)(PROM_8K_SIZE - 1);
ExPrgSwitch = 0;
ExChrSwitch = 0;
SetBank_CPU();
if (VROM_1K_SIZE!=0)
{
chr0 = 0;
chr1 = 1;
chr2 = 2;
chr3 = 3;
chr4 = 4;
chr5 = 5;
chr6 = 6;
chr7 = 7;
SetBank_PPU();
}
else
{
chr0 = chr2 = chr4 = chr5 = chr6 = chr7 = 0;
chr1 = chr3 = 1;
}
irq_enable = 0; // Disable
irq_counter = 0;
irq_latch = 0;
}
//void Mapper115::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
switch (addr)
{
case 0x6000:
ExPrgSwitch = data; //data
SetBank_CPU();
break;
case 0x6001:
ExChrSwitch = (byte)(data & 0x1);
SetBank_PPU();
break;
}
//Mapper::WriteLow(addr, data);
base.WriteLow(addr, data);
}
//void Mapper115::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr & 0xE001)
{
case 0x8000:
reg[0] = data;
SetBank_CPU();
SetBank_PPU();
break;
case 0x8001:
reg[1] = data;
switch (reg[0] & 0x07)
{
case 0x00:
chr0 = (byte)(data & 0xFE);
chr1 = (byte)(chr0 + 1);
SetBank_PPU();
break;
case 0x01:
chr2 = (byte)(data & 0xFE);
chr3 = (byte)(chr2 + 1);
SetBank_PPU();
break;
case 0x02:
chr4 = data;
SetBank_PPU();
break;
case 0x03:
chr5 = data;
SetBank_PPU();
break;
case 0x04:
chr6 = data;
SetBank_PPU();
break;
case 0x05:
chr7 = data;
SetBank_PPU();
break;
case 0x06:
prg0 = prg0L = data;
SetBank_CPU();
break;
case 0x07:
prg1 = prg1L = data;
SetBank_CPU();
break;
}
break;
case 0xA000:
reg[2] = data;
if (!nes.rom.Is4SCREEN())
{
if ((data & 0x01)!=0) SetVRAM_Mirror(VRAM_HMIRROR);
else SetVRAM_Mirror(VRAM_VMIRROR);
}
break;
case 0xA001:
reg[3] = data;
break;
case 0xC000:
reg[4] = data;
irq_counter = data;
irq_enable = 0xFF;
break;
case 0xC001:
reg[5] = data;
irq_latch = data;
break;
case 0xE000:
reg[6] = data;
irq_enable = 0;
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xE001:
reg[7] = data;
irq_enable = 0xFF;
break;
}
}
//void Mapper115::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239))
{
if (nes.ppu.IsDispON())
{
if (irq_enable!=0)
{
if ((irq_counter--)==0)
{
irq_counter = irq_latch;
// nes.cpu.IRQ_NotPending();
nes.cpu.SetIRQ(IRQ_MAPPER);
}
}
}
}
}
void SetBank_CPU()
{
if ((ExPrgSwitch & 0x80)!=0)
{
prg0 = (byte)(((ExPrgSwitch << 1) & 0x1e));
prg1 = (byte)(prg0 + 1);
SetPROM_32K_Bank(prg0, prg1, prg0 + 2, prg1 + 2);
}
else
{
prg0 = prg0L;
prg1 = prg1L;
if ((reg[0] & 0x40)!=0)
{
SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
}
else
{
SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
}
}
}
void SetBank_PPU()
{
if (VROM_1K_SIZE!=0)
{
if ((reg[0] & 0x80)!=0)
{
SetVROM_8K_Bank((ExChrSwitch << 8) + chr4, (ExChrSwitch << 8) + chr5,
(ExChrSwitch << 8) + chr6, (ExChrSwitch << 8) + chr7,
(ExChrSwitch << 8) + chr0, (ExChrSwitch << 8) + chr1,
(ExChrSwitch << 8) + chr2, (ExChrSwitch << 8) + chr3);
}
else
{
SetVROM_8K_Bank((ExChrSwitch << 8) + chr0, (ExChrSwitch << 8) + chr1,
(ExChrSwitch << 8) + chr2, (ExChrSwitch << 8) + chr3,
(ExChrSwitch << 8) + chr4, (ExChrSwitch << 8) + chr5,
(ExChrSwitch << 8) + chr6, (ExChrSwitch << 8) + chr7);
}
}
}
//void Mapper115::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (byte i = 0; i < 8; i++)
{
p[i] = reg[i];
}
p[8] = prg0;
p[9] = prg1;
p[10] = prg2;
p[11] = prg3;
p[12] = chr0;
p[13] = chr1;
p[14] = chr2;
p[15] = chr3;
p[16] = chr4;
p[17] = chr5;
p[18] = chr6;
p[19] = chr7;
p[20] = irq_enable;
p[21] = irq_counter;
p[22] = irq_latch;
p[23] = ExPrgSwitch;
p[24] = prg0L;
p[25] = prg1L;
p[26] = ExChrSwitch;
}
//void Mapper115::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (byte i = 0; i < 8; i++)
{
reg[i] = p[i];
}
prg0 = p[8];
prg1 = p[9];
prg2 = p[10];
prg3 = p[11];
chr0 = p[12];
chr1 = p[13];
chr2 = p[14];
chr3 = p[15];
chr4 = p[16];
chr5 = p[17];
chr6 = p[18];
chr7 = p[19];
irq_enable = p[20];
irq_counter = p[21];
irq_latch = p[22];
ExPrgSwitch = p[23];
prg0L = p[24];
prg1L = p[25];
ExChrSwitch = p[26];
}
public override bool IsStateSave()
{
return true;
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper116.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper116 CartSaint : 幽遊AV強列伝 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper116 : Mapper
{
BYTE[] reg = new byte[8];
BYTE prg0, prg1, prg2, prg3;
BYTE prg0L, prg1L;
BYTE chr0, chr1, chr2, chr3, chr4, chr5, chr6, chr7;
BYTE irq_enable;
INT irq_counter;
BYTE irq_latch;
BYTE ExPrgSwitch;
BYTE ExChrSwitch;
public Mapper116(NES parent) : base(parent)
{
}
public override void Reset()
{
for (INT i = 0; i < 8; i++)
{
reg[i] = 0x00;
}
prg0 = prg0L = 0;
prg1 = prg1L = 1;
prg2 = (byte)(PROM_8K_SIZE - 2);
prg3 = (byte)(PROM_8K_SIZE - 1);
ExPrgSwitch = 0;
ExChrSwitch = 0;
SetBank_CPU();
if (VROM_1K_SIZE != 0)
{
chr0 = 0;
chr1 = 1;
chr2 = 2;
chr3 = 3;
chr4 = 4;
chr5 = 5;
chr6 = 6;
chr7 = 7;
SetBank_PPU();
}
else
{
chr0 = chr2 = chr4 = chr5 = chr6 = chr7 = 0;
chr1 = chr3 = 1;
}
irq_enable = 0; // Disable
irq_counter = 0;
irq_latch = 0;
// nes.SetFrameIRQmode( FALSE );
}
//void Mapper116::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
DEBUGOUT("MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr & 0xFFFF, data & 0xFF, nes.GetScanline(), nes.cpu.GetTotalCycles());
if ((addr & 0x4100) == 0x4100)
{
ExChrSwitch = data;
SetBank_PPU();
}
}
//void Mapper116::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
DEBUGOUT("MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr & 0xFFFF, data & 0xFF, nes.GetScanline(), nes.cpu.GetTotalCycles());
switch (addr & 0xE001)
{
case 0x8000:
reg[0] = data;
SetBank_CPU();
SetBank_PPU();
break;
case 0x8001:
reg[1] = data;
switch (reg[0] & 0x07)
{
case 0x00:
chr0 = (byte)(data & 0xFE);
chr1 = (byte)(chr0 + 1);
SetBank_PPU();
break;
case 0x01:
chr2 = (byte)(data & 0xFE);
chr3 = (byte)(chr2 + 1);
SetBank_PPU();
break;
case 0x02:
chr4 = data;
SetBank_PPU();
break;
case 0x03:
chr5 = data;
SetBank_PPU();
break;
case 0x04:
chr6 = data;
SetBank_PPU();
break;
case 0x05:
chr7 = data;
SetBank_PPU();
break;
case 0x06:
prg0 = data;
SetBank_CPU();
break;
case 0x07:
prg1 = data;
SetBank_CPU();
break;
}
break;
case 0xA000:
reg[2] = data;
if (!nes.rom.Is4SCREEN())
{
if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
else SetVRAM_Mirror(VRAM_VMIRROR);
}
break;
case 0xA001:
reg[3] = data;
break;
case 0xC000:
reg[4] = data;
irq_counter = data;
// irq_enable = 0xFF;
break;
case 0xC001:
reg[5] = data;
irq_latch = data;
break;
case 0xE000:
reg[6] = data;
irq_counter = irq_latch;
irq_enable = 0;
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xE001:
reg[7] = data;
irq_enable = 0xFF;
break;
}
}
//void Mapper116::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239))
{
if (irq_counter <= 0)
{
if (irq_enable != 0)
{
// nes.cpu.IRQ_NotPending();
nes.cpu.SetIRQ(IRQ_MAPPER);
#if FALSE //0
DEBUGOUT( "IRQ L=%3d\n", scanline );
{
LPBYTE lpScn = nes.ppu.GetScreenPtr();
lpScn = lpScn+(256+16)*scanline;
for( INT i = 0; i < 64; i++ ) {
lpScn[i] = 22;
}
}
#endif
return;
}
}
if (nes.ppu.IsDispON())
{
irq_counter--;
}
}
#if FALSE //0
if( (scanline >= 0 && scanline <= 239) ) {
if( nes.ppu.IsDispON() ) {
if( irq_enable ) {
if( !(irq_counter--) ) {
// irq_counter = irq_latch;
nes.cpu.IRQ_NotPending();
}
}
}
}
#endif
}
void SetBank_CPU()
{
if ((reg[0] & 0x40) != 0)
{
SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
}
else
{
SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
}
}
void SetBank_PPU()
{
if (VROM_1K_SIZE != 0)
{
if ((ExChrSwitch & 0x04) != 0)
{
INT chrbank = 256;
SetVROM_8K_Bank(chrbank + chr4, chrbank + chr5,
chrbank + chr6, chrbank + chr7,
chr0, chr1,
chr2, chr3);
}
else
{
INT chrbank = 0;
SetVROM_8K_Bank(chrbank + chr4, chrbank + chr5,
chrbank + chr6, chrbank + chr7,
chr0, chr1,
chr2, chr3);
}
#if FALSE //0
if( reg[0] & 0x80 ) {
// SetVROM_8K_Bank( chrbank+chr4, chrbank+chr5,
// chrbank+chr6, chrbank+chr7,
// chrbank+chr0, chrbank+chr1,
// chrbank+chr2, chrbank+chr3 );
SetVROM_8K_Bank( chrbank+chr4, chrbank+chr5,
chrbank+chr6, chrbank+chr7,
chr0, chr1,
chr2, chr3 );
} else {
SetVROM_8K_Bank( chr0, chr1,
chr2, chr3,
chrbank+chr4, chrbank+chr5,
chrbank+chr6, chrbank+chr7 );
}
#endif
}
}
//void Mapper116::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
p[i] = reg[i];
}
p[8] = prg0;
p[9] = prg1;
p[10] = prg2;
p[11] = prg3;
p[12] = chr0;
p[13] = chr1;
p[14] = chr2;
p[15] = chr3;
p[16] = chr4;
p[17] = chr5;
p[18] = chr6;
p[19] = chr7;
p[20] = irq_enable;
p[21] = (byte)irq_counter;
p[22] = irq_latch;
p[23] = ExPrgSwitch;
p[24] = prg0L;
p[25] = prg1L;
p[26] = ExChrSwitch;
}
//void Mapper116::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
reg[i] = p[i];
}
prg0 = p[8];
prg1 = p[9];
prg2 = p[10];
prg3 = p[11];
chr0 = p[12];
chr1 = p[13];
chr2 = p[14];
chr3 = p[15];
chr4 = p[16];
chr5 = p[17];
chr6 = p[18];
chr7 = p[19];
irq_enable = p[20];
irq_counter = p[21];
irq_latch = p[22];
ExPrgSwitch = p[23];
prg0L = p[24];
prg1L = p[25];
ExChrSwitch = p[26];
}
public override bool IsStateSave()
{
return true;
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper117.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper117 Sanko Gu(Tw) //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper117 : Mapper
{
BYTE irq_enable;
BYTE irq_counter;
public Mapper117(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
if (VROM_1K_SIZE != 0)
{
SetVROM_8K_Bank(0);
}
}
//void Mapper117::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr)
{
case 0x8000:
SetPROM_8K_Bank(4, data);
break;
case 0x8001:
SetPROM_8K_Bank(5, data);
break;
case 0x8002:
SetPROM_8K_Bank(6, data);
break;
case 0xA000:
SetVROM_1K_Bank(0, data);
break;
case 0xA001:
SetVROM_1K_Bank(1, data);
break;
case 0xA002:
SetVROM_1K_Bank(2, data);
break;
case 0xA003:
SetVROM_1K_Bank(3, data);
break;
case 0xA004:
SetVROM_1K_Bank(4, data);
break;
case 0xA005:
SetVROM_1K_Bank(5, data);
break;
case 0xA006:
SetVROM_1K_Bank(6, data);
break;
case 0xA007:
SetVROM_1K_Bank(7, data);
break;
case 0xC001:
case 0xC002:
case 0xC003:
irq_counter = data;
break;
case 0xE000:
irq_enable = (byte)(data & 1);
// nes.cpu.ClrIRQ( IRQ_MAPPER );
break;
}
}
//void Mapper117::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239))
{
if (nes.ppu.IsDispON())
{
if (irq_enable != 0)
{
if (irq_counter == scanline)
{
irq_counter = 0;
// nes.cpu.IRQ();
// nes.cpu.SetIRQ( IRQ_MAPPER );
nes.cpu.SetIRQ(IRQ_TRIGGER);
}
}
}
}
}
//void Mapper117::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
p[0] = irq_counter;
p[1] = irq_enable;
}
//void Mapper117::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
irq_counter = p[0];
irq_enable = p[1];
}
public override bool IsStateSave()
{
return true;
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper118 IQS MMC3 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper118 : Mapper
{
BYTE[] reg = new byte[8];
BYTE prg0, prg1;
BYTE chr01, chr23, chr4, chr5, chr6, chr7;
BYTE we_sram;
BYTE irq_enable;
BYTE irq_counter;
BYTE irq_latch;
public Mapper118(NES parent) : base(parent)
{
}
public override void Reset()
{
INT i;
for (i = 0; i < 8; i++)
{
reg[i] = 0x00;
}
prg0 = 0;
prg1 = 1;
SetBank_CPU();
if (VROM_1K_SIZE != 0)
{
chr01 = 0;
chr23 = 2;
chr4 = 4;
chr5 = 5;
chr6 = 6;
chr7 = 7;
SetBank_PPU();
}
else
{
chr01 = 0;
chr23 = 0;
chr4 = 0;
chr5 = 0;
chr6 = 0;
chr7 = 0;
}
we_sram = 0; // Disable
irq_enable = 0; // Disable
irq_counter = 0;
irq_latch = 0;
}
//void Mapper118::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr & 0xE001)
{
case 0x8000:
reg[0] = data;
SetBank_CPU();
SetBank_PPU();
break;
case 0x8001:
reg[1] = data;
if ((reg[0] & 0x80) != 0)
{
if ((reg[0] & 0x07) == 2)
{
if ((data & 0x80) != 0) SetVRAM_Mirror(VRAM_MIRROR4L);
else SetVRAM_Mirror(VRAM_MIRROR4H);
}
}
else
{
if ((reg[0] & 0x07) == 0)
{
if ((data & 0x80) != 0) SetVRAM_Mirror(VRAM_MIRROR4L);
else SetVRAM_Mirror(VRAM_MIRROR4H);
}
}
switch (reg[0] & 0x07)
{
case 0x00:
if (VROM_1K_SIZE != 0)
{
chr01 = (byte)(data & 0xFE);
SetBank_PPU();
}
break;
case 0x01:
if (VROM_1K_SIZE != 0)
{
chr23 = (byte)(data & 0xFE);
SetBank_PPU();
}
break;
case 0x02:
if (VROM_1K_SIZE != 0)
{
chr4 = data;
SetBank_PPU();
}
break;
case 0x03:
if (VROM_1K_SIZE != 0)
{
chr5 = data;
SetBank_PPU();
}
break;
case 0x04:
if (VROM_1K_SIZE != 0)
{
chr6 = data;
SetBank_PPU();
}
break;
case 0x05:
if (VROM_1K_SIZE != 0)
{
chr7 = data;
SetBank_PPU();
}
break;
case 0x06:
prg0 = data;
SetBank_CPU();
break;
case 0x07:
prg1 = data;
SetBank_CPU();
break;
}
break;
case 0xC000:
reg[4] = data;
irq_counter = data;
break;
case 0xC001:
reg[5] = data;
irq_latch = data;
break;
case 0xE000:
reg[6] = data;
irq_enable = 0;
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xE001:
reg[7] = data;
irq_enable = 1;
break;
}
}
//void Mapper118::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239))
{
if (nes.ppu.IsDispON())
{
if (irq_enable != 0)
{
if ((irq_counter--) == 0)
{
irq_counter = irq_latch;
// nes.cpu.IRQ();
nes.cpu.SetIRQ(IRQ_MAPPER);
}
}
}
}
}
void SetBank_CPU()
{
if ((reg[0] & 0x40) != 0)
{
SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
}
else
{
SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
}
}
void SetBank_PPU()
{
if (VROM_1K_SIZE != 0)
{
if ((reg[0] & 0x80) != 0)
{
SetVROM_8K_Bank(chr4, chr5, chr6, chr7,
chr01, chr01 + 1, chr23, chr23 + 1);
}
else
{
SetVROM_8K_Bank(chr01, chr01 + 1, chr23, chr23 + 1,
chr4, chr5, chr6, chr7);
}
}
}
//void Mapper118::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
p[i] = reg[i];
}
p[8] = prg0;
p[9] = prg1;
p[10] = chr01;
p[11] = chr23;
p[12] = chr4;
p[13] = chr5;
p[14] = chr6;
p[15] = chr7;
p[16] = irq_enable;
p[17] = irq_counter;
p[18] = irq_latch;
}
//void Mapper118::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
reg[i] = p[i];
}
prg0 = p[8];
prg1 = p[9];
chr01 = p[10];
chr23 = p[11];
chr4 = p[12];
chr5 = p[13];
chr6 = p[14];
chr7 = p[15];
irq_enable = p[16];
irq_counter = p[17];
irq_latch = p[18];
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper119 Nintendo MMC3 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper119 : Mapper
{
BYTE patch;
BYTE[] reg = new byte[8];
BYTE prg0, prg1;
BYTE chr01, chr23, chr4, chr5, chr6, chr7;
BYTE we_sram;
BYTE irq_enable;
BYTE irq_counter;
BYTE irq_latch;
public Mapper119(NES parent) : base(parent)
{
}
public override void Reset()
{
patch = 0;
for (INT i = 0; i < 8; i++)
{
reg[i] = 0x00;
}
prg0 = 0;
prg1 = 1;
SetBank_CPU();
chr01 = 0;
chr23 = 2;
chr4 = 4;
chr5 = 5;
chr6 = 6;
chr7 = 7;
SetBank_PPU();
we_sram = 0; // Disable
irq_enable = 0; // Disable
irq_counter = 0;
irq_latch = 0;
}
//void Mapper119::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr & 0xE001)
{
case 0x8000:
reg[0] = data;
SetBank_CPU();
SetBank_PPU();
break;
case 0x8001:
reg[1] = data;
switch (reg[0] & 0x07)
{
case 0x00:
if (VROM_1K_SIZE != 0)
{
chr01 = (byte)(data & 0xFE);
SetBank_PPU();
}
break;
case 0x01:
if (VROM_1K_SIZE != 0)
{
chr23 = (byte)(data & 0xFE);
SetBank_PPU();
}
break;
case 0x02:
if (VROM_1K_SIZE != 0)
{
chr4 = data;
SetBank_PPU();
}
break;
case 0x03:
if (VROM_1K_SIZE != 0)
{
chr5 = data;
SetBank_PPU();
}
break;
case 0x04:
if (VROM_1K_SIZE != 0)
{
chr6 = data;
SetBank_PPU();
}
break;
case 0x05:
if (VROM_1K_SIZE != 0)
{
chr7 = data;
SetBank_PPU();
}
break;
case 0x06:
prg0 = data;
SetBank_CPU();
break;
case 0x07:
prg1 = data;
SetBank_CPU();
break;
}
break;
case 0xA000:
reg[2] = data;
if (!nes.rom.Is4SCREEN())
{
if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
else SetVRAM_Mirror(VRAM_VMIRROR);
}
break;
case 0xA001:
reg[3] = data;
break;
case 0xC000:
reg[4] = data;
irq_counter = data;
break;
case 0xC001:
reg[5] = data;
irq_latch = data;
break;
case 0xE000:
reg[6] = data;
irq_enable = 0;
irq_counter = irq_latch;
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xE001:
reg[7] = data;
irq_enable = 1;
break;
}
}
//void Mapper119::HSync(INT scanline)
public override void HSync(int scanline)
{
if ((scanline >= 0 && scanline <= 239))
{
if (nes.ppu.IsDispON())
{
if (irq_enable != 0)
{
if ((irq_counter--) == 0)
{
irq_counter = irq_latch;
// nes.cpu.IRQ();
nes.cpu.SetIRQ(IRQ_MAPPER);
}
}
}
}
}
void SetBank_CPU()
{
if ((reg[0] & 0x40) != 0)
{
SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
}
else
{
SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
}
}
void SetBank_PPU()
{
if ((reg[0] & 0x80) != 0)
{
if ((chr4 & 0x40) != 0) SetCRAM_1K_Bank(0, chr4 & 0x07); else SetVROM_1K_Bank(0, chr4);
if ((chr5 & 0x40) != 0) SetCRAM_1K_Bank(1, chr5 & 0x07); else SetVROM_1K_Bank(1, chr5);
if ((chr6 & 0x40) != 0) SetCRAM_1K_Bank(2, chr6 & 0x07); else SetVROM_1K_Bank(2, chr6);
if ((chr7 & 0x40) != 0) SetCRAM_1K_Bank(3, chr7 & 0x07); else SetVROM_1K_Bank(3, chr7);
if (((chr01 + 0) & 0x40) != 0) SetCRAM_1K_Bank(4, (chr01 + 0) & 0x07); else SetVROM_1K_Bank(4, (chr01 + 0));
if (((chr01 + 1) & 0x40) != 0) SetCRAM_1K_Bank(5, (chr01 + 1) & 0x07); else SetVROM_1K_Bank(5, (chr01 + 1));
if (((chr23 + 0) & 0x40) != 0) SetCRAM_1K_Bank(6, (chr23 + 0) & 0x07); else SetVROM_1K_Bank(6, (chr23 + 0));
if (((chr23 + 1) & 0x40) != 0) SetCRAM_1K_Bank(7, (chr23 + 1) & 0x07); else SetVROM_1K_Bank(7, (chr23 + 1));
}
else
{
if (((chr01 + 0) & 0x40) != 0) SetCRAM_1K_Bank(0, (chr01 + 0) & 0x07); else SetVROM_1K_Bank(0, (chr01 + 0));
if (((chr01 + 1) & 0x40) != 0) SetCRAM_1K_Bank(1, (chr01 + 1) & 0x07); else SetVROM_1K_Bank(1, (chr01 + 1));
if (((chr23 + 0) & 0x40) != 0) SetCRAM_1K_Bank(2, (chr23 + 0) & 0x07); else SetVROM_1K_Bank(2, (chr23 + 0));
if (((chr23 + 1) & 0x40) != 0) SetCRAM_1K_Bank(3, (chr23 + 1) & 0x07); else SetVROM_1K_Bank(3, (chr23 + 1));
if ((chr4 & 0x40) != 0) SetCRAM_1K_Bank(4, chr4 & 0x07); else SetVROM_1K_Bank(4, chr4);
if ((chr5 & 0x40) != 0) SetCRAM_1K_Bank(5, chr5 & 0x07); else SetVROM_1K_Bank(5, chr5);
if ((chr6 & 0x40) != 0) SetCRAM_1K_Bank(6, chr6 & 0x07); else SetVROM_1K_Bank(6, chr6);
if ((chr7 & 0x40) != 0) SetCRAM_1K_Bank(7, chr7 & 0x07); else SetVROM_1K_Bank(7, chr7);
}
}
///void Mapper119::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
p[i] = reg[i];
}
p[8] = prg0;
p[9] = prg1;
p[10] = chr01;
p[11] = chr23;
p[12] = chr4;
p[13] = chr5;
p[14] = chr6;
p[15] = chr7;
p[16] = irq_enable;
p[17] = irq_counter;
p[18] = irq_latch;
}
//void Mapper119::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
reg[i] = p[i];
}
prg0 = p[8];
prg1 = p[9];
chr01 = p[10];
chr23 = p[11];
chr4 = p[12];
chr5 = p[13];
chr6 = p[14];
chr7 = p[15];
irq_enable = p[16];
irq_counter = p[17];
irq_latch = p[18];
}
public override bool IsStateSave()
{
return true;
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper122/184 SunSoft-1 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper122 : Mapper
{
public Mapper122(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0, 1, 2, 3);
}
//void Mapper122::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
if (addr == 0x6000)
{
SetVROM_4K_Bank(0, data & 0x07);
SetVROM_4K_Bank(4, (data & 0x70) >> 4);
}
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper133 SACHEN CHEN //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper133 : Mapper
{
public Mapper133(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0);
SetVROM_8K_Bank(0);
}
//void Mapper133::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
if (addr == 0x4120)
{
SetPROM_32K_Bank((data & 0x04) >> 2);
SetVROM_8K_Bank(data & 0x03);
}
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper133 SACHEN CHEN //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper134 : Mapper
{
BYTE cmd, prg, chr;
public Mapper134(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0);
// SetPROM_16K_Bank( 6, 0 );
// SetPROM_16K_Bank( 6, 1 );
SetVROM_8K_Bank(0);
}
//void Mapper134::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
switch (addr & 0x4101)
{
case 0x4100:
cmd = (byte)(data & 0x07);
break;
case 0x4101:
switch (cmd)
{
case 0:
prg = 0;
chr = 3;
break;
case 4:
chr &= 0x3;
chr |= (byte)((data & 0x07) << 2);
break;
case 5:
prg = (byte)(data & 0x07);
break;
case 6:
chr &= 0x1C;
chr |= (byte)(data & 0x3);
break;
case 7:
if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
else SetVRAM_Mirror(VRAM_VMIRROR);
break;
}
break;
}
SetPROM_32K_Bank(prg);
// SetPROM_16K_Bank( 4, (prg<<1)|0 );
// SetPROM_16K_Bank( 6, (prg<<1)|1 );
SetVROM_8K_Bank(chr);
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
}
//void Mapper134::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
p[0] = cmd;
p[1] = prg;
p[2] = chr;
}
//void Mapper134::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
cmd = p[0];
prg = p[1];
chr = p[2];
}
}
}

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//////////////////////////////////////////////////////////////////////////
// Mapper135 SACHEN CHEN //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper135 : Mapper
{
BYTE cmd;
BYTE chr0l, chr1l, chr0h, chr1h, chrch;
public Mapper135(NES parent) : base(parent)
{
}
public override void Reset()
{
cmd = 0;
chr0l = chr1l = chr0h = chr1h = chrch = 0;
SetPROM_32K_Bank(0);
SetBank_PPU();
}
//void Mapper135::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
switch (addr & 0x4101)
{
case 0x4100:
cmd = (byte)(data & 0x07);
break;
case 0x4101:
switch (cmd)
{
case 0:
chr0l = (byte)(data & 0x07);
SetBank_PPU();
break;
case 1:
chr0h = (byte)(data & 0x07);
SetBank_PPU();
break;
case 2:
chr1l = (byte)(data & 0x07);
SetBank_PPU();
break;
case 3:
chr1h = (byte)(data & 0x07);
SetBank_PPU();
break;
case 4:
chrch = (byte)(data & 0x07);
SetBank_PPU();
break;
case 5:
SetPROM_32K_Bank((byte)(data & 0x07));
break;
case 6:
break;
case 7:
switch ((data >> 1) & 0x03)
{
case 0: SetVRAM_Mirror(VRAM_MIRROR4L); break;
case 1: SetVRAM_Mirror(VRAM_HMIRROR); break;
case 2: SetVRAM_Mirror(VRAM_VMIRROR); break;
case 3: SetVRAM_Mirror(VRAM_MIRROR4L); break;
}
break;
}
break;
}
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
}
void SetBank_PPU()
{
SetVROM_2K_Bank(0, 0 | (chr0l << 1) | (chrch << 4));
SetVROM_2K_Bank(2, 1 | (chr0h << 1) | (chrch << 4));
SetVROM_2K_Bank(4, 0 | (chr1l << 1) | (chrch << 4));
SetVROM_2K_Bank(6, 1 | (chr1h << 1) | (chrch << 4));
}
//void Mapper135::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
p[0] = cmd;
p[1] = chr0l;
p[2] = chr0h;
p[3] = chr1l;
p[4] = chr1h;
p[5] = chrch;
}
//void Mapper135::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
cmd = p[0];
chr0l = p[1];
chr0h = p[2];
chr0l = p[3];
chr0h = p[4];
chrch = p[5];
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper135.cs.meta Normal file
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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper140.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper140 //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper140 : Mapper
{
public Mapper140(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0);
if (VROM_1K_SIZE != 0)
{
SetVROM_8K_Bank(0);
}
}
//void Mapper140::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
SetPROM_32K_Bank((data & 0xF0) >> 4);
SetVROM_8K_Bank(data & 0x0F);
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper142.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper142 SMB2J //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper142 : Mapper
{
BYTE prg_sel;
BYTE irq_enable;
INT irq_counter;
public Mapper142(NES parent) : base(parent)
{
}
public override void Reset()
{
prg_sel = 0;
irq_enable = 0;
irq_counter = 0;
SetPROM_8K_Bank(3, 0);
SetPROM_8K_Bank(7, 0x0F);
if (VROM_1K_SIZE != 0)
{
SetVROM_8K_Bank(0);
}
}
//void Mapper142::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr & 0xF000)
{
case 0x8000:
irq_counter = (irq_counter & 0xFFF0) | ((data & 0x0F) << 0);
break;
case 0x9000:
irq_counter = (irq_counter & 0xFF0F) | ((data & 0x0F) << 4);
break;
case 0xA000:
irq_counter = (irq_counter & 0xF0FF) | ((data & 0x0F) << 8);
break;
case 0xB000:
irq_counter = (irq_counter & 0x0FFF) | ((data & 0x0F) << 12);
break;
case 0xC000:
irq_enable = (byte)(data & 0x0F);
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xE000:
prg_sel = (byte)(data & 0x0F);
break;
case 0xF000:
switch (prg_sel)
{
case 1: SetPROM_8K_Bank(4, data & 0x0F); break;
case 2: SetPROM_8K_Bank(5, data & 0x0F); break;
case 3: SetPROM_8K_Bank(6, data & 0x0F); break;
case 4: SetPROM_8K_Bank(3, data & 0x0F); break;
}
break;
}
}
//void Mapper142::HSync(INT scanline)
public override void HSync(int scanline)
{
if (irq_enable != 0)
{
if (irq_counter > (0xFFFF - 113))
{
irq_counter = 0;
nes.cpu.SetIRQ(IRQ_MAPPER);
}
else
{
irq_counter += 113;
}
}
}
//void Mapper142::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
//p[0] = prg_sel;
//p[0] = irq_enable;
//*(INT*)&p[2] = irq_counter;
}
//void Mapper142::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
//prg_sel = p[0];
//irq_enable = p[1];
//irq_counter = *(INT*)&p[2];
}
public override bool IsStateSave()
{
return true;
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper151.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper151 VS-Unisystem //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper151 : Mapper
{
public Mapper151(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
#if FALSE//0 //hum
uint crc = nes.rom.GetPROM_CRC();
if (crc == 0x1E438D52)
{
DirectDraw.SetVsPalette(7); //VS_Goonies
}
if (crc == 0xD99A2087)
{
DirectDraw.SetVsPalette(6); //VS_Gradius
}
#endif
}
//void Mapper151::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr)
{
case 0x8000:
SetPROM_8K_Bank(4, data);
break;
case 0xA000:
SetPROM_8K_Bank(5, data);
break;
case 0xC000:
SetPROM_8K_Bank(6, data);
break;
case 0xE000:
SetVROM_4K_Bank(0, data);
break;
case 0xF000:
SetVROM_4K_Bank(4, data);
break;
}
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper160.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper160 PC-Aladdin //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper160 : Mapper
{
BYTE irq_enable;
BYTE irq_counter;
BYTE irq_latch;
BYTE refresh_type;
public Mapper160(NES parent) : base(parent)
{
}
public override void Reset()
{
SetPROM_32K_Bank(0, 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
irq_enable = 0;
irq_counter = 0;
irq_latch = 0;
refresh_type = 0;
}
//void Mapper160::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
switch (addr)
{
case 0x8000:
SetPROM_8K_Bank(4, data);
break;
case 0x8001:
SetPROM_8K_Bank(5, data);
break;
case 0x8002:
SetPROM_8K_Bank(6, data);
break;
case 0x9000:
if (data == 0x2B)
{
refresh_type = 1;
}
else if (data == 0xA8)
{
refresh_type = 2;
}
else if (data == 0x1F)
{
refresh_type = 3;
}
else if (data == 0x7C)
{
refresh_type = 4;
}
else if (data == 0x18)
{
refresh_type = 5;
}
else if (data == 0x60)
{
refresh_type = 6;
}
else
{
refresh_type = 0;
}
SetVROM_1K_Bank(0, data);
break;
case 0x9001:
SetVROM_1K_Bank(1, data);
break;
case 0x9002:
if (refresh_type == 2 && data != 0xE8)
{
refresh_type = 0;
}
SetVROM_1K_Bank(2, data);
break;
case 0x9003:
SetVROM_1K_Bank(3, data);
break;
case 0x9004:
SetVROM_1K_Bank(4, data);
break;
case 0x9005:
SetVROM_1K_Bank(5, data);
break;
case 0x9006:
SetVROM_1K_Bank(6, data);
break;
case 0x9007:
SetVROM_1K_Bank(7, data);
break;
case 0xC000:
irq_counter = irq_latch;
irq_enable = irq_latch;
break;
case 0xC001:
irq_latch = data;
break;
case 0xC002:
irq_enable = 0;
nes.cpu.ClrIRQ(IRQ_MAPPER);
break;
case 0xC003:
irq_counter = data;
break;
}
}
//void Mapper160::HSync(INT scanline)
public override void HSync(int scanline)
{
if (scanline == 0 || scanline == 239)
{
switch (refresh_type)
{
case 1:
SetVROM_8K_Bank(0x58, 0x59, 0x5A, 0x5B, 0x58, 0x59, 0x5A, 0x5B);
break;
case 2:
SetVROM_8K_Bank(0x78, 0x79, 0x7A, 0x7B, 0x78, 0x79, 0x7A, 0x7B);
break;
case 3:
SetVROM_8K_Bank(0x7C, 0x7D, 0x7E, 0x7F, 0x7C, 0x7D, 0x7E, 0x7F);
break;
case 5:
SetVROM_8K_Bank(0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77);
break;
case 6:
SetVROM_8K_Bank(0x5C, 0x5D, 0x5E, 0x5F, 0x7C, 0x7D, 0x7E, 0x7F);
break;
}
}
if (scanline == 64)
{
if (refresh_type == 4)
{
if (PPU_MEM_BANK[8][32 * 10 + 16] == 0x0A)
{
SetVROM_1K_Bank(0, 0x68);
SetVROM_1K_Bank(1, 0x69);
SetVROM_1K_Bank(2, 0x6A);
SetVROM_1K_Bank(3, 0x6B);
}
else
{
SetVROM_1K_Bank(0, 0x6C);
SetVROM_1K_Bank(1, 0x6D);
SetVROM_1K_Bank(2, 0x6E);
SetVROM_1K_Bank(3, 0x6F);
}
}
}
if (scanline == 128)
{
if (refresh_type == 4)
{
SetVROM_1K_Bank(0, 0x68);
SetVROM_1K_Bank(1, 0x69);
SetVROM_1K_Bank(2, 0x6A);
SetVROM_1K_Bank(3, 0x6B);
}
else if (refresh_type == 5)
{
SetVROM_8K_Bank(0x74, 0x75, 0x76, 0x77, 0x74, 0x75, 0x76, 0x77);
}
}
if (scanline == 160)
{
if (refresh_type == 6)
{
SetVROM_8K_Bank(0x60, 0x61, 0x5E, 0x5F, 0x7C, 0x7D, 0x7E, 0x7F);
}
}
if (irq_enable != 0)
{
if (irq_counter == 0xFF)
{
// nes.cpu.IRQ_NotPending();
irq_enable = 0;
irq_counter = 0;
nes.cpu.SetIRQ(IRQ_MAPPER);
}
else
{
irq_counter++;
}
}
}
//void Mapper160::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
p[0] = irq_enable;
p[1] = irq_counter;
p[2] = irq_latch;
p[3] = refresh_type;
}
//
//void Mapper160::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
irq_enable = p[0];
irq_counter = p[1];
irq_latch = p[2];
refresh_type = p[3];
}
public override bool IsStateSave()
{
return true;
}
}
}

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AxibugEmuOnline.Client/Assets/VirtualNes.Core/Mapper/Mapper164.cs Normal file
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//////////////////////////////////////////////////////////////////////////
// Mapper164 Pocket Monster Gold //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
namespace VirtualNes.Core
{
public class Mapper164 : Mapper
{
BYTE reg5000;
BYTE reg5100;
BYTE a3, p_mode;
public Mapper164(NES parent) : base(parent)
{
}
public override void Reset()
{
reg5000 = 0;
reg5100 = 0;
SetBank_CPU();
SetBank_PPU();
nes.ppu.SetExtLatchMode(TRUE);
}
//void Mapper164::WriteLow(WORD addr, BYTE data)
public override void WriteLow(ushort addr, byte data)
{
if (addr == 0x5000)
{
p_mode = (byte)(data >> 7);
reg5000 = data;
SetBank_CPU();
SetBank_PPU();
}
else if (addr == 0x5100)
{
reg5100 = data;
SetBank_CPU();
SetBank_PPU();
}
else if (addr >= 0x6000)
{
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
}
else
{
DEBUGOUT("write to %04x:%02x\n", addr, data);
}
}
void SetBank_CPU()
{
int mode, @base, bank;
@base = (reg5100 & 1) << 5;
mode = (reg5000 >> 4) & 0x07;
switch (mode)
{
case 0:
case 2:
case 4:
case 6: /* NORMAL MODE */
bank = (reg5000 & 0x0f);
bank += (reg5000 & 0x20) >> 1;
SetPROM_16K_Bank(4, bank + @base);
SetPROM_16K_Bank(6, @base + 0x1f);
DEBUGOUT("-- normal mode: mode=%d, bank=%d --\n", mode, bank);
break;
case 1:
case 3: /* REG MODE */
DEBUGOUT("-- reg mode --\n");
break;
case 5: /* 32K MODE */
bank = (reg5000 & 0x0f);
SetPROM_32K_Bank(bank + (@base >> 1));
// DEBUGOUT("-- 32K MODE: bank=%02x --\n", bank);
break;
case 7: /* HALF MODE */
bank = (reg5000 & 0x0f);
bank += (bank & 0x08) << 1;
SetPROM_16K_Bank(4, bank + @base);
bank = (bank & 0x10) + 0x0f;
SetPROM_16K_Bank(6, @base + 0x1f);
DEBUGOUT("-- half mode --\n");
break;
default:
break;
};
}
void SetBank_PPU()
{
SetCRAM_8K_Bank(0);
}
//void Mapper164::PPU_ExtLatchX(INT x)
public override void PPU_ExtLatchX(int x)
{
a3 = (byte)((x & 1) << 3);
}
//void Mapper164::PPU_ExtLatch(WORD ntbladr, BYTE& chr_l, BYTE& chr_h, BYTE& attr )
public override void PPU_ExtLatch(ushort ntbladr, ref byte chr_l, ref byte chr_h, ref byte attr)
{
INT loopy_v = nes.ppu.GetPPUADDR();
INT loopy_y = nes.ppu.GetTILEY();
INT tileofs = (PPUREG[0] & PPU_BGTBL_BIT) << 8;
INT attradr = 0x23C0 + (loopy_v & 0x0C00) + ((loopy_v & 0x0380) >> 4);
INT attrsft = (ntbladr & 0x0040) >> 4;
LPBYTE pNTBL = PPU_MEM_BANK[ntbladr >> 10];
INT ntbl_x = ntbladr & 0x001F;
INT tileadr;
attradr &= 0x3FF;
attr = ((pNTBL[attradr + (ntbl_x >> 2)] >> ((ntbl_x & 2) + attrsft)) & 3) << 2;
tileadr = tileofs + pNTBL[ntbladr & 0x03FF] * 0x10 + loopy_y;
if (p_mode)
{
tileadr = (tileadr & 0xfff7) | a3;
chr_l = chr_h = PPU_MEM_BANK[tileadr >> 10][tileadr & 0x03FF];
}
else
{
chr_l = PPU_MEM_BANK[tileadr >> 10][tileadr & 0x03FF];
chr_h = PPU_MEM_BANK[tileadr >> 10][(tileadr & 0x03FF) + 8];
}
}
//void Mapper164::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
p[0] = reg5000;
p[1] = reg5100;
p[2] = a3;
p[3] = p_mode;
}
//void Mapper164::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
reg5000 = p[0];
reg5100 = p[1];
a3 = p[2];
p_mode = p[3];
}
public override bool IsStateSave()
{
return true;
}
}
}

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