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base: sin365:200ee3830bc7434ac1b7d9b5524e76d4de1e0e48
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sin365:master
sin365:dev_mame_timercount
sin365:dev_audiomix
sin365:psv_VirtualNes.Core归档
sin365:bak_AlphaFristLove
sin365:dev_beforeShader
sin365:dev_4VirtualNes
sin365:dev_basemynes
sin365:bak_baseOnEmulator.NES
sin365:beforinputsystem
...
compare: sin365:dc4e9f3c84428f2a25e7d72669640795dd037e11
Branches Tags
sin365:master
sin365:dev_mame_timercount
sin365:dev_audiomix
sin365:psv_VirtualNes.Core归档
sin365:bak_AlphaFristLove
sin365:dev_beforeShader
sin365:dev_4VirtualNes
sin365:dev_basemynes
sin365:bak_baseOnEmulator.NES
sin365:beforinputsystem

3 Commits
200ee3830b ... dc4e9f3c84

Author SHA1 Message Date
sin365
dc4e9f3c84 MAME:MC68000 改回用委托数组 2025-11-12 01:41:00 +08:00
sin365
ec292251e0 MAME: FM小小unsafe缓存 2025-11-12 00:25:19 +08:00
sin365
909d1b35f1 MAME:内联渲染和音频函数，缓存一些数组高频读取固定index，减少寻址 2025-11-12 00:09:34 +08:00
8 changed files with 1237 additions and 201 deletions
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64
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/cpu/m68000/MC68000.cs
View File

@ -163,8 +163,8 @@ namespace cpu.m68000
public MC68000()
{
//倒是已经废弃
//BuildOpcodeTable();
//还是使用Action[]吧
BuildOpcodeTable();
}
@ -205,7 +205,7 @@ namespace cpu.m68000
PC = ReadOpLong(4);
}
//public Action[] Opcodes = new Action[0x10000];
public Action[] Opcodes = new Action[0x10000];
public ushort op;
public void Step()
@ -213,10 +213,41 @@ namespace cpu.m68000
//EmuLogger.Log(Disassemble(PC));
op = (ushort)ReadOpWord(PC); PC += 2;
//Opcodes[op]();
DoOpCode(op);
Opcodes[op]();
//DoOpCode(op);
}
//public override int ExecuteCycles(int cycles)
//{
// if (!stopped)
// {
// pendingCycles = cycles;
// int ran;
// pendingCycles -= int_cycles;
// int_cycles = 0;
// do
// {
// int prevCycles = pendingCycles;
// PPC = PC;
// op = (ushort)ReadOpWord(PC); PC += 2;
// //Opcodes[op]();
// DoOpCode(op);
// m68ki_check_interrupts();
// int delta = prevCycles - pendingCycles;
// totalExecutedCycles += (ulong)delta;
// }
// while (pendingCycles > 0);
// pendingCycles -= int_cycles;
// int_cycles = 0;
// ran = cycles - pendingCycles;
// return ran;
// }
// pendingCycles = 0;
// int_cycles = 0;
// return cycles;
//}
//手动内联
public override int ExecuteCycles(int cycles)
{
if (!stopped)
@ -230,9 +261,26 @@ namespace cpu.m68000
int prevCycles = pendingCycles;
PPC = PC;
op = (ushort)ReadOpWord(PC); PC += 2;
//Opcodes[op]();
DoOpCode(op);
m68ki_check_interrupts();
Opcodes[op]();
//DoOpCode(op);
//m68ki_check_interrupts();
if (Interrupt > 0 && (Interrupt > InterruptMaskLevel || Interrupt > 7))
{
stopped = false;
//int vector = Cpuint.cpu_irq_callback(cpunum, Interrupt);
short sr = (short)SR; // capture current SR.
S = true; // switch to supervisor mode, if not already in it.
A[7].s32 -= 4; // Push PC on stack
WriteLong(A[7].s32, PC);
A[7].s32 -= 2; // Push SR on stack
WriteWord(A[7].s32, sr);
PC = ReadLong((24 + Interrupt) * 4); // Jump to interrupt vector
InterruptMaskLevel = Interrupt; // Set interrupt mask to level currently being entered
Interrupt = 0; // "ack" interrupt. Note: this is wrong.
int_cycles += 0x2c;
}
int delta = prevCycles - pendingCycles;
totalExecutedCycles += (ulong)delta;
}

250
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/cpu/m68000/OpcodeTable.OpCode.Do.cs
View File

@ -1,126 +1,126 @@
namespace cpu.m68000
{
partial class MC68000
{
//namespace cpu.m68000
//{
// partial class MC68000
// {
/// <summary>
/// 重写的68000指令调度
/// </summary>
/// <param name="op"></param>
void DoOpCode(ushort op)
{
MC68000Code opType = MC68000CodeArr[op];
switch (opType)
{
case MC68000Code.ORI: ORI(); return;
case MC68000Code.ILL: ILL(); return;
case MC68000Code.ORI_CCR: ORI_CCR(); return;
case MC68000Code.ORI_SR: ORI_SR(); return;
case MC68000Code.BTSTr: BTSTr(); return;
case MC68000Code.MOVEP: MOVEP(); return;
case MC68000Code.BCHGr: BCHGr(); return;
case MC68000Code.BCLRr: BCLRr(); return;
case MC68000Code.BSETr: BSETr(); return;
case MC68000Code.ANDI: ANDI(); return;
case MC68000Code.ANDI_CCR: ANDI_CCR(); return;
case MC68000Code.ANDI_SR: ANDI_SR(); return;
case MC68000Code.SUBI: SUBI(); return;
case MC68000Code.ADDI: ADDI(); return;
case MC68000Code.BTSTi: BTSTi(); return;
case MC68000Code.BCHGi: BCHGi(); return;
case MC68000Code.BCLRi: BCLRi(); return;
case MC68000Code.BSETi: BSETi(); return;
case MC68000Code.EORI: EORI(); return;
case MC68000Code.EORI_CCR: EORI_CCR(); return;
case MC68000Code.EORI_SR: EORI_SR(); return;
case MC68000Code.CMPI: CMPI(); return;
case MC68000Code.MOVE: MOVE(); return;
case MC68000Code.MOVEA: MOVEA(); return;
case MC68000Code.NEGX: NEGX(); return;
case MC68000Code.MOVEfSR: MOVEfSR(); return;
case MC68000Code.CHK: CHK(); return;
case MC68000Code.LEA: LEA(); return;
case MC68000Code.CLR: CLR(); return;
case MC68000Code.NEG: NEG(); return;
case MC68000Code.MOVECCR: MOVECCR(); return;
case MC68000Code.NOT: NOT(); return;
case MC68000Code.MOVEtSR: MOVEtSR(); return;
case MC68000Code.NBCD: NBCD(); return;
case MC68000Code.SWAP: SWAP(); return;
case MC68000Code.PEA: PEA(); return;
case MC68000Code.EXT: EXT(); return;
case MC68000Code.MOVEM0: MOVEM0(); return;
case MC68000Code.TST: TST(); return;
case MC68000Code.TAS: TAS(); return;
case MC68000Code.ILLEGAL: ILLEGAL(); return;
case MC68000Code.MOVEM1: MOVEM1(); return;
case MC68000Code.TRAP: TRAP(); return;
case MC68000Code.LINK: LINK(); return;
case MC68000Code.UNLK: UNLK(); return;
case MC68000Code.MOVEUSP: MOVEUSP(); return;
case MC68000Code.RESET: RESET(); return;
case MC68000Code.NOP: NOP(); return;
case MC68000Code.STOP: STOP(); return;
case MC68000Code.RTE: RTE(); return;
case MC68000Code.RTS: RTS(); return;
case MC68000Code.TRAPV: TRAPV(); return;
case MC68000Code.RTR: RTR(); return;
case MC68000Code.JSR: JSR(); return;
case MC68000Code.JMP: JMP(); return;
case MC68000Code.ADDQ: ADDQ(); return;
case MC68000Code.Scc: Scc(); return;
case MC68000Code.DBcc: DBcc(); return;
case MC68000Code.SUBQ: SUBQ(); return;
case MC68000Code.BRA: BRA(); return;
case MC68000Code.BSR: BSR(); return;
case MC68000Code.Bcc: Bcc(); return;
case MC68000Code.MOVEQ: MOVEQ(); return;
case MC68000Code.OR0: OR0(); return;
case MC68000Code.DIVU: DIVU(); return;
case MC68000Code.SBCD0: SBCD0(); return;
case MC68000Code.SBCD1: SBCD1(); return;
case MC68000Code.OR1: OR1(); return;
case MC68000Code.DIVS: DIVS(); return;
case MC68000Code.SUB0: SUB0(); return;
case MC68000Code.SUBA: SUBA(); return;
case MC68000Code.SUBX0: SUBX0(); return;
case MC68000Code.SUBX1: SUBX1(); return;
case MC68000Code.SUB1: SUB1(); return;
case MC68000Code.CMP: CMP(); return;
case MC68000Code.CMPA: CMPA(); return;
case MC68000Code.EOR: EOR(); return;
case MC68000Code.CMPM: CMPM(); return;
case MC68000Code.AND0: AND0(); return;
case MC68000Code.MULU: MULU(); return;
case MC68000Code.ABCD0: ABCD0(); return;
case MC68000Code.ABCD1: ABCD1(); return;
case MC68000Code.AND1: AND1(); return;
case MC68000Code.EXGdd: EXGdd(); return;
case MC68000Code.EXGaa: EXGaa(); return;
case MC68000Code.EXGda: EXGda(); return;
case MC68000Code.MULS: MULS(); return;
case MC68000Code.ADD0: ADD0(); return;
case MC68000Code.ADDA: ADDA(); return;
case MC68000Code.ADDX0: ADDX0(); return;
case MC68000Code.ADDX1: ADDX1(); return;
case MC68000Code.ADD1: ADD1(); return;
case MC68000Code.ASRd: ASRd(); return;
case MC68000Code.LSRd: LSRd(); return;
case MC68000Code.ROXRd: ROXRd(); return;
case MC68000Code.RORd: RORd(); return;
case MC68000Code.ASRd0: ASRd0(); return;
case MC68000Code.ASLd: ASLd(); return;
case MC68000Code.LSLd: LSLd(); return;
case MC68000Code.ROXLd: ROXLd(); return;
case MC68000Code.ROLd: ROLd(); return;
case MC68000Code.ASLd0: ASLd0(); return;
case MC68000Code.LSRd0: LSRd0(); return;
case MC68000Code.LSLd0: LSLd0(); return;
case MC68000Code.ROXRd0: ROXRd0(); return;
case MC68000Code.ROXLd0: ROXLd0(); return;
case MC68000Code.RORd0: RORd0(); return;
case MC68000Code.ROLd0: ROLd0(); return;
}
}
}
}
// /// <summary>
// /// 重写的68000指令调度
// /// </summary>
// /// <param name="op"></param>
// void DoOpCode(ushort op)
// {
// MC68000Code opType = MC68000CodeArr[op];
// switch (opType)
// {
// case MC68000Code.ORI: ORI(); return;
// case MC68000Code.ILL: ILL(); return;
// case MC68000Code.ORI_CCR: ORI_CCR(); return;
// case MC68000Code.ORI_SR: ORI_SR(); return;
// case MC68000Code.BTSTr: BTSTr(); return;
// case MC68000Code.MOVEP: MOVEP(); return;
// case MC68000Code.BCHGr: BCHGr(); return;
// case MC68000Code.BCLRr: BCLRr(); return;
// case MC68000Code.BSETr: BSETr(); return;
// case MC68000Code.ANDI: ANDI(); return;
// case MC68000Code.ANDI_CCR: ANDI_CCR(); return;
// case MC68000Code.ANDI_SR: ANDI_SR(); return;
// case MC68000Code.SUBI: SUBI(); return;
// case MC68000Code.ADDI: ADDI(); return;
// case MC68000Code.BTSTi: BTSTi(); return;
// case MC68000Code.BCHGi: BCHGi(); return;
// case MC68000Code.BCLRi: BCLRi(); return;
// case MC68000Code.BSETi: BSETi(); return;
// case MC68000Code.EORI: EORI(); return;
// case MC68000Code.EORI_CCR: EORI_CCR(); return;
// case MC68000Code.EORI_SR: EORI_SR(); return;
// case MC68000Code.CMPI: CMPI(); return;
// case MC68000Code.MOVE: MOVE(); return;
// case MC68000Code.MOVEA: MOVEA(); return;
// case MC68000Code.NEGX: NEGX(); return;
// case MC68000Code.MOVEfSR: MOVEfSR(); return;
// case MC68000Code.CHK: CHK(); return;
// case MC68000Code.LEA: LEA(); return;
// case MC68000Code.CLR: CLR(); return;
// case MC68000Code.NEG: NEG(); return;
// case MC68000Code.MOVECCR: MOVECCR(); return;
// case MC68000Code.NOT: NOT(); return;
// case MC68000Code.MOVEtSR: MOVEtSR(); return;
// case MC68000Code.NBCD: NBCD(); return;
// case MC68000Code.SWAP: SWAP(); return;
// case MC68000Code.PEA: PEA(); return;
// case MC68000Code.EXT: EXT(); return;
// case MC68000Code.MOVEM0: MOVEM0(); return;
// case MC68000Code.TST: TST(); return;
// case MC68000Code.TAS: TAS(); return;
// case MC68000Code.ILLEGAL: ILLEGAL(); return;
// case MC68000Code.MOVEM1: MOVEM1(); return;
// case MC68000Code.TRAP: TRAP(); return;
// case MC68000Code.LINK: LINK(); return;
// case MC68000Code.UNLK: UNLK(); return;
// case MC68000Code.MOVEUSP: MOVEUSP(); return;
// case MC68000Code.RESET: RESET(); return;
// case MC68000Code.NOP: NOP(); return;
// case MC68000Code.STOP: STOP(); return;
// case MC68000Code.RTE: RTE(); return;
// case MC68000Code.RTS: RTS(); return;
// case MC68000Code.TRAPV: TRAPV(); return;
// case MC68000Code.RTR: RTR(); return;
// case MC68000Code.JSR: JSR(); return;
// case MC68000Code.JMP: JMP(); return;
// case MC68000Code.ADDQ: ADDQ(); return;
// case MC68000Code.Scc: Scc(); return;
// case MC68000Code.DBcc: DBcc(); return;
// case MC68000Code.SUBQ: SUBQ(); return;
// case MC68000Code.BRA: BRA(); return;
// case MC68000Code.BSR: BSR(); return;
// case MC68000Code.Bcc: Bcc(); return;
// case MC68000Code.MOVEQ: MOVEQ(); return;
// case MC68000Code.OR0: OR0(); return;
// case MC68000Code.DIVU: DIVU(); return;
// case MC68000Code.SBCD0: SBCD0(); return;
// case MC68000Code.SBCD1: SBCD1(); return;
// case MC68000Code.OR1: OR1(); return;
// case MC68000Code.DIVS: DIVS(); return;
// case MC68000Code.SUB0: SUB0(); return;
// case MC68000Code.SUBA: SUBA(); return;
// case MC68000Code.SUBX0: SUBX0(); return;
// case MC68000Code.SUBX1: SUBX1(); return;
// case MC68000Code.SUB1: SUB1(); return;
// case MC68000Code.CMP: CMP(); return;
// case MC68000Code.CMPA: CMPA(); return;
// case MC68000Code.EOR: EOR(); return;
// case MC68000Code.CMPM: CMPM(); return;
// case MC68000Code.AND0: AND0(); return;
// case MC68000Code.MULU: MULU(); return;
// case MC68000Code.ABCD0: ABCD0(); return;
// case MC68000Code.ABCD1: ABCD1(); return;
// case MC68000Code.AND1: AND1(); return;
// case MC68000Code.EXGdd: EXGdd(); return;
// case MC68000Code.EXGaa: EXGaa(); return;
// case MC68000Code.EXGda: EXGda(); return;
// case MC68000Code.MULS: MULS(); return;
// case MC68000Code.ADD0: ADD0(); return;
// case MC68000Code.ADDA: ADDA(); return;
// case MC68000Code.ADDX0: ADDX0(); return;
// case MC68000Code.ADDX1: ADDX1(); return;
// case MC68000Code.ADD1: ADD1(); return;
// case MC68000Code.ASRd: ASRd(); return;
// case MC68000Code.LSRd: LSRd(); return;
// case MC68000Code.ROXRd: ROXRd(); return;
// case MC68000Code.RORd: RORd(); return;
// case MC68000Code.ASRd0: ASRd0(); return;
// case MC68000Code.ASLd: ASLd(); return;
// case MC68000Code.LSLd: LSLd(); return;
// case MC68000Code.ROXLd: ROXLd(); return;
// case MC68000Code.ROLd: ROLd(); return;
// case MC68000Code.ASLd0: ASLd0(); return;
// case MC68000Code.LSRd0: LSRd0(); return;
// case MC68000Code.LSLd0: LSLd0(); return;
// case MC68000Code.ROXRd0: ROXRd0(); return;
// case MC68000Code.ROXLd0: ROXLd0(); return;
// case MC68000Code.RORd0: RORd0(); return;
// case MC68000Code.ROLd0: ROLd0(); return;
// }
// }
// }
//}

32
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/cpu/m68000/OpcodeTable.OpCode.Enum.cs
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File diff suppressed because one or more lines are too long

870
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/cpu/m68000/OpcodeTable.cs Normal file
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@ -0,0 +1,870 @@
using System;
using System.Collections.Generic;
namespace cpu.m68000
{
partial class MC68000
{
void BuildOpcodeTable()
{
Assign("ill", ILL, "", "Data8", "Data8");//
Assign("ori2ccr", ORI_CCR, "0000000000111100");//
Assign("ori2sr", ORI_SR, "0000000001111100");
Assign("ori", ORI, "00000000", "Size2_1", "OAmXn");
Assign("andi2ccr", ANDI_CCR, "0000001000111100");//
Assign("andi2sr", ANDI_SR, "0000001001111100");
Assign("andi", ANDI, "00000010", "Size2_1", "OAmXn");
Assign("subi", SUBI, "00000100", "Size2_1", "OAmXn");
Assign("addi", ADDI, "00000110", "Size2_1", "OAmXn");
Assign("eori2ccr", EORI_CCR, "0000101000111100");//
Assign("eori2sr", EORI_SR, "0000101001111100");
Assign("eori", EORI, "00001010", "Size2_1", "OAmXn");
Assign("cmpi", CMPI, "00001100", "Size2_1", "OAmXn");
Assign("btst", BTSTi, "0000100000", "BAmXn");
Assign("bchg", BCHGi, "0000100001", "OAmXn");
Assign("bclr", BCLRi, "0000100010", "OAmXn");
Assign("bset", BSETi, "0000100011", "OAmXn");
Assign("btst", BTSTr, "0000", "Xn", "100", "AmXn");
Assign("bchg", BCHGr, "0000", "Xn", "101", "OAmXn");
Assign("bclr", BCLRr, "0000", "Xn", "110", "OAmXn");
Assign("bset", BSETr, "0000", "Xn", "111", "OAmXn");
Assign("movep", MOVEP, "0000", "Xn", "1", "Data1", "Size1", "001", "Xn");//
Assign("movea", MOVEA, "00", "Size2_2", "Xn", "001", "AmXn");
Assign("move", MOVE, "00", "01", "OXnAm", "MAmXn");
Assign("move", MOVE, "00", "Size2_2", "OXnAm", "AmXn");
Assign("movefsr", MOVEfSR, "0100000011", "OAmXn");
Assign("moveccr", MOVECCR, "0100010011", "MAmXn");
Assign("move2sr", MOVEtSR, "0100011011", "MAmXn");
Assign("negx", NEGX, "01000000", "Size2_1", "OAmXn");//
Assign("clr", CLR, "01000010", "Size2_1", "OAmXn");
Assign("neg", NEG, "01000100", "Size2_1", "OAmXn");
Assign("not", NOT, "01000110", "Size2_1", "OAmXn");
Assign("ext", EXT, "010010001", "Size1", "000", "Xn");
Assign("nbcd", NBCD, "0100100000", "OAmXn");//
Assign("swap", SWAP, "0100100001000", "Xn");
Assign("pea", PEA, "0100100001", "LAmXn");
Assign("illegal", ILLEGAL, "0100101011111100");//
Assign("tas", TAS, "0100101011", "OAmXn");//
Assign("tst", TST, "01001010", "Size2_1", "OAmXn");
Assign("trap", TRAP, "010011100100", "Data4");
Assign("link", LINK, "0100111001010", "Xn");
Assign("unlk", UNLK, "0100111001011", "Xn");
Assign("moveusp", MOVEUSP, "010011100110", "Data1", "Xn");
Assign("reset", RESET, "0100111001110000");//
Assign("nop", NOP, "0100111001110001");
Assign("stop", STOP, "0100111001110010");//
Assign("rte", RTE, "0100111001110011");
Assign("rts", RTS, "0100111001110101");
Assign("trapv", TRAPV, "0100111001110110");//
Assign("rtr", RTR, "0100111001110111");
Assign("jsr", JSR, "0100111010", "LAmXn");
Assign("jmp", JMP, "0100111011", "LAmXn");
Assign("movem", MOVEM0, "010010001", "Size1", "M2AmXn");
Assign("movem", MOVEM1, "010011001", "Size1", "M3AmXn");
Assign("lea", LEA, "0100", "Xn", "111", "LAmXn");
Assign("chk", CHK, "0100", "Xn", "110", "MAmXn");//
Assign("addq", ADDQ, "0101", "Data3", "0", "00", "OAmXn");
Assign("addq", ADDQ, "0101", "Data3", "0", "Size2_3", "A2AmXn");
Assign("subq", SUBQ, "0101", "Data3", "1", "00", "OAmXn");
Assign("subq", SUBQ, "0101", "Data3", "1", "Size2_3", "A2AmXn");
Assign("scc", Scc, "0101", "CondAll", "11", "OAmXn");
Assign("dbcc", DBcc, "0101", "CondAll", "11001", "Xn");
Assign("bra", BRA, "01100000", "Data8");
Assign("bsr", BSR, "01100001", "Data8");
Assign("bcc", Bcc, "0110", "CondMain", "Data8");
Assign("moveq", MOVEQ, "0111", "Xn", "0", "Data8");
Assign("divu", DIVU, "1000", "Xn", "011", "MAmXn");
Assign("divs", DIVS, "1000", "Xn", "111", "MAmXn");
Assign("sbcd", SBCD0, "1000", "Xn", "100000", "Xn");//
Assign("sbcd", SBCD1, "1000", "Xn", "100001", "Xn");//
Assign("or", OR0, "1000", "Xn", "0", "Size2_1", "MAmXn");
Assign("or", OR1, "1000", "Xn", "1", "Size2_1", "O2AmXn");
Assign("sub", SUB0, "1001", "Xn", "0", "00", "MAmXn");
Assign("sub", SUB0, "1001", "Xn", "0", "Size2_3", "AmXn");
Assign("sub", SUB1, "1001", "Xn", "1", "00", "O2AmXn");
Assign("sub", SUB1, "1001", "Xn", "1", "Size2_3", "A2AmXn");
Assign("subx", SUBX0, "1001", "Xn", "1", "Size2_1", "000", "Xn");//
Assign("subx", SUBX1, "1001", "Xn", "1", "Size2_1", "001", "Xn");//
Assign("suba", SUBA, "1001", "Xn", "Size1", "11", "AmXn");
Assign("eor", EOR, "1011", "Xn", "1", "Size2_1", "OAmXn");
Assign("cmpm", CMPM, "1011", "Xn", "1", "Size2_1", "001", "Xn");
Assign("cmp", CMP, "1011", "Xn", "0", "00", "MAmXn");
Assign("cmp", CMP, "1011", "Xn", "0", "Size2_3", "AmXn");
Assign("cmpa", CMPA, "1011", "Xn", "Size1", "11", "AmXn");
Assign("mulu", MULU, "1100", "Xn", "011", "MAmXn");
Assign("muls", MULS, "1100", "Xn", "111", "MAmXn");
Assign("abcd", ABCD0, "1100", "Xn", "100000", "Xn");//
Assign("abcd", ABCD1, "1100", "Xn", "100001", "Xn");//
Assign("exg", EXGdd, "1100", "Xn", "101000", "Xn");//
Assign("exg", EXGaa, "1100", "Xn", "101001", "Xn");//
Assign("exg", EXGda, "1100", "Xn", "110001", "Xn");//
Assign("and", AND0, "1100", "Xn", "0", "Size2_1", "MAmXn");
Assign("and", AND1, "1100", "Xn", "1", "Size2_1", "O2AmXn");
Assign("add", ADD0, "1101", "Xn", "0", "00", "MAmXn");
Assign("add", ADD0, "1101", "Xn", "0", "Size2_3", "AmXn");
Assign("add", ADD1, "1101", "Xn", "1", "Size2_1", "O2AmXn");
Assign("addx", ADDX0, "1101", "Xn", "1", "Size2_1", "000", "Xn");//
Assign("addx", ADDX1, "1101", "Xn", "1", "Size2_1", "001", "Xn");//
Assign("adda", ADDA, "1101", "Xn", "Size1", "11", "AmXn");
Assign("asl", ASLd0, "1110000111", "O2AmXn");//
Assign("asr", ASRd0, "1110000011", "O2AmXn");//
Assign("lsl", LSLd0, "1110001111", "O2AmXn");//
Assign("lsr", LSRd0, "1110001011", "O2AmXn");//
Assign("roxl", ROXLd0, "1110010111", "O2AmXn");//
Assign("roxr", ROXRd0, "1110010011", "O2AmXn");//
Assign("rol", ROLd0, "1110011111", "O2AmXn");//
Assign("ror", RORd0, "1110011011", "O2AmXn");//
Assign("asl", ASLd, "1110", "Data3", "1", "Size2_1", "Data1", "00", "Xn");
Assign("asr", ASRd, "1110", "Data3", "0", "Size2_1", "Data1", "00", "Xn");
Assign("lsl", LSLd, "1110", "Data3", "1", "Size2_1", "Data1", "01", "Xn");
Assign("lsr", LSRd, "1110", "Data3", "0", "Size2_1", "Data1", "01", "Xn");
Assign("roxl", ROXLd, "1110", "Data3", "1", "Size2_1", "Data1", "10", "Xn");
Assign("roxr", ROXRd, "1110", "Data3", "0", "Size2_1", "Data1", "10", "Xn");
Assign("rol", ROLd, "1110", "Data3", "1", "Size2_1", "Data1", "11", "Xn");
Assign("ror", RORd, "1110", "Data3", "0", "Size2_1", "Data1", "11", "Xn");
}
void Assign(string instr, Action exec, string root, params string[] bitfield)
{
List<string> opList = new List<string>();
opList.Add(root);
foreach (var component in bitfield)
{
if (IsBinary(component)) AppendConstant(opList, component);
else if (component == "Size1") opList = AppendPermutations(opList, Size1);
else if (component == "Size2_0") opList = AppendPermutations(opList, Size2_0);
else if (component == "Size2_1") opList = AppendPermutations(opList, Size2_1);
else if (component == "Size2_2") opList = AppendPermutations(opList, Size2_2);
else if (component == "Size2_3") opList = AppendPermutations(opList, Size2_3);
else if (component == "OXnAm") opList = AppendPermutations(opList, OXn3Am3);//0,2-6,7_0-7_1
else if (component == "AmXn") opList = AppendPermutations(opList, Am3Xn3);//0-6,7_0-7_4
else if (component == "OAmXn") opList = AppendPermutations(opList, OAm3Xn3);//0,2-6,7_0-7_1
else if (component == "BAmXn") opList = AppendPermutations(opList, BAm3Xn3);//0,2-6,7_0-7_3
else if (component == "MAmXn") opList = AppendPermutations(opList, MAm3Xn3);//0,2-6,7_0-7_4
else if (component == "AAmXn") opList = AppendPermutations(opList, AAm3Xn3);//1-6,7_0-7_4
else if (component == "LAmXn") opList = AppendPermutations(opList, LAm3Xn3);//2,5-6,7_0-7_3
else if (component == "M2AmXn") opList = AppendPermutations(opList, M2Am3Xn3);//2,4-6,7_0-7_1
else if (component == "M3AmXn") opList = AppendPermutations(opList, M3Am3Xn3);//2-3,5-6,7_0-7_3
else if (component == "A2AmXn") opList = AppendPermutations(opList, A2Am3Xn3);//0-6,7_0-7_1
else if (component == "O2AmXn") opList = AppendPermutations(opList, O2Am3Xn3);//2-6,7_0-7_1
else if (component == "Xn") opList = AppendPermutations(opList, Xn3);
else if (component == "CondMain") opList = AppendPermutations(opList, ConditionMain);
else if (component == "CondAll") opList = AppendPermutations(opList, ConditionAll);
else if (component == "Data1") opList = AppendData(opList, 1);
else if (component == "Data3") opList = AppendData(opList, 3);
else if (component == "Data4") opList = AppendData(opList, 4);
else if (component == "Data8") opList = AppendData(opList, 8);
}
foreach (var opcode in opList)
{
int opc = Convert.ToInt32(opcode, 2);
Opcodes[opc] = exec;
}
}
void AppendConstant(List<string> ops, string constant)
{
for (int i = 0; i < ops.Count; i++)
ops[i] = ops[i] + constant;
}
List<string> AppendPermutations(List<string> ops, string[] permutations)
{
List<string> output = new List<string>();
foreach (var input in ops)
foreach (var perm in permutations)
output.Add(input + perm);
return output;
}
List<string> AppendData(List<string> ops, int bits)
{
List<string> output = new List<string>();
foreach (var input in ops)
for (int i = 0; i < BinaryExp(bits); i++)
output.Add(input + Convert.ToString(i, 2).PadLeft(bits, '0'));
return output;
}
int BinaryExp(int bits)
{
int res = 1;
for (int i = 0; i < bits; i++)
res *= 2;
return res;
}
bool IsBinary(string str)
{
for (int i = 0; i < str.Length; i++)
{
char c = str[i];
if (c == '0' || c == '1')
continue;
return false;
}
return true;
}
#region Tables
static readonly string[] Size2_0 = { "01", "11", "10" };
static readonly string[] Size2_1 = { "00", "01", "10" };
static readonly string[] Size2_2 = { "11", "10" };
static readonly string[] Size2_3 = { "01", "10" };
static readonly string[] Size1 = { "0", "1" };
static readonly string[] Xn3 = { "000", "001", "010", "011", "100", "101", "110", "111" };
static readonly string[] OXn3Am3 = {
"000000", // Dn Data register
"001000",
"010000",
"011000",
"100000",
"101000",
"110000",
"111000",
"000010", // (An) Address
"001010",
"010010",
"011010",
"100010",
"101010",
"110010",
"111010",
"000011", // (An)+ Address with Postincrement
"001011",
"010011",
"011011",
"100011",
"101011",
"110011",
"111011",
"000100", // -(An) Address with Predecrement
"001100",
"010100",
"011100",
"100100",
"101100",
"110100",
"111100",
"000101", // (d16, An) Address with Displacement
"001101",
"010101",
"011101",
"100101",
"101101",
"110101",
"111101",
"000110", // (d8, An, Xn) Address with Index
"001110",
"010110",
"011110",
"100110",
"101110",
"110110",
"111110",
"000111", // (xxx).W Absolute Short
"001111", // (xxx).L Absolute Long
};
static readonly string[] Am3Xn3 = {
"000000", // Dn Data register
"000001",
"000010",
"000011",
"000100",
"000101",
"000110",
"000111",
"001000", // An Address register
"001001",
"001010",
"001011",
"001100",
"001101",
"001110",
"001111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
"111100", // #imm Immediate
};
static readonly string[] OAm3Xn3 = {
"000000", // Dn Data register
"000001",
"000010",
"000011",
"000100",
"000101",
"000110",
"000111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] BAm3Xn3 = {
"000000", // Dn Data register
"000001",
"000010",
"000011",
"000100",
"000101",
"000110",
"000111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] MAm3Xn3 = {
"000000", // Dn Data register
"000001",
"000010",
"000011",
"000100",
"000101",
"000110",
"000111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
"111100", // #imm Immediate
};
static readonly string[] AAm3Xn3 = {
"001000", // An Address register
"001001",
"001010",
"001011",
"001100",
"001101",
"001110",
"001111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
"111100", // #imm Immediate
};
static readonly string[] LAm3Xn3 = {
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] M2Am3Xn3 = {
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] M3Am3Xn3 = {
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111010", // (d16, PC) PC with Displacement
"111011", // (d8, PC, Xn) PC with Index
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] A2Am3Xn3 = {
"000000", // Dn Data register
"000001",
"000010",
"000011",
"000100",
"000101",
"000110",
"000111",
"001000", // An Address register
"001001",
"001010",
"001011",
"001100",
"001101",
"001110",
"001111",
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] O2Am3Xn3 = {
"010000", // (An) Address
"010001",
"010010",
"010011",
"010100",
"010101",
"010110",
"010111",
"011000", // (An)+ Address with Postincrement
"011001",
"011010",
"011011",
"011100",
"011101",
"011110",
"011111",
"100000", // -(An) Address with Predecrement
"100001",
"100010",
"100011",
"100100",
"100101",
"100110",
"100111",
"101000", // (d16, An) Address with Displacement
"101001",
"101010",
"101011",
"101100",
"101101",
"101110",
"101111",
"110000", // (d8, An, Xn) Address with Index
"110001",
"110010",
"110011",
"110100",
"110101",
"110110",
"110111",
"111000", // (xxx).W Absolute Short
"111001", // (xxx).L Absolute Long
};
static readonly string[] ConditionMain = {
"0010", // HI Higher (unsigned)
"0011", // LS Lower or Same (unsigned)
"0100", // CC Carry Clear (aka Higher or Same, unsigned)
"0101", // CS Carry Set (aka Lower, unsigned)
"0110", // NE Not Equal
"0111", // EQ Equal
"1000", // VC Overflow Clear
"1001", // VS Overflow Set
"1010", // PL Plus
"1011", // MI Minus
"1100", // GE Greater or Equal (signed)
"1101", // LT Less Than (signed)
"1110", // GT Greater Than (signed)
"1111" // LE Less or Equal (signed)
};
static readonly string[] ConditionAll = {
"0000", // T True
"0001", // F False
"0010", // HI Higher (unsigned)
"0011", // LS Lower or Same (unsigned)
"0100", // CC Carry Clear (aka Higher or Same, unsigned)
"0101", // CS Carry Set (aka Lower, unsigned)
"0110", // NE Not Equal
"0111", // EQ Equal
"1000", // VC Overflow Clear
"1001", // VS Overflow Set
"1010", // PL Plus
"1011", // MI Minus
"1100", // GE Greater or Equal (signed)
"1101", // LT Less Than (signed)
"1110", // GT Greater Than (signed)
"1111" // LE Less or Equal (signed)
};
#endregion
}
}

2
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/cpu/m68000/OpcodeTable.cs.meta Normal file
View File

@ -0,0 +1,2 @@
fileFormatVersion: 2
guid: ed9317b66de00d444a41e424670f3899

3
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/emu/Motion.cs
View File

@ -325,7 +325,8 @@
red = ((Video.bitmapbaseN_Ptrs[Video.curbitmap][i] & 0xff0000) >> 16) * bright / 0xff;
green = ((Video.bitmapbaseN_Ptrs[Video.curbitmap][i] & 0xff00) >> 8) * bright / 0xff;
blue = (Video.bitmapbaseN_Ptrs[Video.curbitmap][i] & 0xff) * bright / 0xff;
Video.bitmapcolorRect_Ptrunsafe[target_i] = (int)Palette.make_argb(0xff, red, green, blue);
//Video.bitmapcolorRect_Ptrunsafe[target_i] = (int)Palette.make_argb(0xff, red, green, blue);
Video.bitmapcolorRect_Ptrunsafe[target_i] = (int)((((uint)(0xff) & 0xff) << 24) | (((uint)(blue) & 0xff) << 16) | (((uint)(green) & 0xff) << 8) | ((uint)(red) & 0xff));
}
}
}

36
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/mame/neogeo/Video.cs
View File

@ -143,9 +143,20 @@ namespace MAME.Core
rows = 0x20;
return rows * 0x10;
}
//public static bool sprite_on_scanline(int scanline, int y, int rows)
//{
// int max_y = (y + rows_to_height(rows) - 1) & 0x1ff;
// return (((max_y >= y) && (scanline >= y) && (scanline <= max_y)) ||
// ((max_y < y) && ((scanline >= y) || (scanline <= max_y))));
//}
//手动内联
public static bool sprite_on_scanline(int scanline, int y, int rows)
{
int max_y = (y + rows_to_height(rows) - 1) & 0x1ff;
//int max_y = (y + rows_to_height(rows) - 1) & 0x1ff;
if ((rows == 0) || (rows > 0x20))
rows = 0x20;
int max_y = (y + (rows * 0x10) - 1) & 0x1ff;
return (((max_y >= y) && (scanline >= y) && (scanline <= max_y)) ||
((max_y < y) && ((scanline >= y) || (scanline <= max_y))));
}
@ -405,7 +416,16 @@ namespace MAME.Core
{
continue;
}
if (sprite_on_scanline(scanline, y, rows))
//if (sprite_on_scanline(scanline, y, rows))
//手动内联 开始
int tempRows = rows;
if ((rows == 0) || (rows > 0x20))
tempRows = 0x20;
int max_y = (y + (tempRows * 0x10) - 1) & 0x1ff;
if (((max_y >= y) && (scanline >= y) && (scanline <= max_y)) ||
((max_y < y) && ((scanline >= y) || (scanline <= max_y))))
//手动内联 结束
{
sprite_line = (scanline - y) & 0x1ff;
zoom_line = sprite_line & 0xff;
@ -704,7 +724,17 @@ namespace MAME.Core
{
continue;
}
if (!sprite_on_scanline(scanline, y, rows))
//if (!sprite_on_scanline(scanline, y, rows))
//手动内联 开始
int tempRows = rows;
if ((rows == 0) || (rows > 0x20))
tempRows = 0x20;
int max_y = (y + (tempRows * 0x10) - 1) & 0x1ff;
if (!(((max_y >= y) && (scanline >= y) && (scanline <= max_y)) ||
((max_y < y) && ((scanline >= y) || (scanline <= max_y)))))
//手动内联 结束
{
continue;
}

181
AxibugEmuOnline.Client/Assets/Plugins/Mame.Core/sound/FM.cs
View File

@ -482,8 +482,9 @@ namespace MAME.Core
}
private uint volume_calc(int c, int s)
{
int AM = LFO_AM >> CH[c].ams;
return (uint)(CH[c].SLOT[s].vol_out + (AM & CH[c].SLOT[s].AMmask));
//int AM = LFO_AM >> CH[c].ams;
//return (uint)(CH[c].SLOT[s].vol_out + (AM & CH[c].SLOT[s].AMmask));
return (uint)(CH[c].SLOT[s].vol_out + ((LFO_AM >> CH[c].ams) & CH[c].SLOT[s].AMmask));
}
private void update_phase_lfo_slot(int s, int pms, uint block_fnum)
{
@ -558,60 +559,144 @@ namespace MAME.Core
CH[c].SLOT[3].phase += (uint)CH[c].SLOT[3].Incr;
}
}
public void chan_calc(int c, int chnum)
//public void chan_calc(int c, int chnum)
//{
// uint eg_out;
// out_fm[8] = out_fm[9] = out_fm[10] = out_fm[11] = 0;//m2 = c1 = c2 = mem = 0;
// set_mem(c);
// eg_out = volume_calc(c, 0);
// int out1 = CH[c].op1_out0 + CH[c].op1_out1;
// CH[c].op1_out0 = CH[c].op1_out1;
// set_value1(c);
// CH[c].op1_out1 = 0;
// if (eg_out < 832)
// {
// if (CH[c].FB == 0)
// {
// out1 = 0;
// }
// CH[c].op1_out1 = op_calc1(CH[c].SLOT[0].phase, eg_out, (out1 << CH[c].FB));
// }
// eg_out = volume_calc(c, 1);
// if (eg_out < 832)
// {
// out_fm[iconnect3[c]] += op_calc(CH[c].SLOT[1].phase, eg_out, out_fm[8]);
// }
// eg_out = volume_calc(c, 2);
// if (eg_out < 832)
// {
// out_fm[iconnect2[c]] += op_calc(CH[c].SLOT[2].phase, eg_out, out_fm[9]);
// }
// eg_out = volume_calc(c, 3);
// if (eg_out < 832)
// {
// out_fm[iconnect4[c]] += op_calc(CH[c].SLOT[3].phase, eg_out, out_fm[10]);
// }
// CH[c].mem_value = out_fm[11];//mem;
// if (CH[c].pms != 0)
// {
// if (((ST.mode & 0xC0) != 0) && (chnum == 2))
// {
// update_phase_lfo_slot(0, CH[c].pms, SL3.block_fnum[1]);
// update_phase_lfo_slot(2, CH[c].pms, SL3.block_fnum[2]);
// update_phase_lfo_slot(1, CH[c].pms, SL3.block_fnum[0]);
// update_phase_lfo_slot(3, CH[c].pms, CH[c].block_fnum);
// }
// else
// {
// update_phase_lfo_channel(CH, c);
// }
// }
// else
// {
// CH[c].SLOT[0].phase += (uint)CH[c].SLOT[0].Incr;
// CH[c].SLOT[2].phase += (uint)CH[c].SLOT[2].Incr;
// CH[c].SLOT[1].phase += (uint)CH[c].SLOT[1].Incr;
// CH[c].SLOT[3].phase += (uint)CH[c].SLOT[3].Incr;
// }
//}
//手动内联
public unsafe void chan_calc(int c, int chnum)
{
uint eg_out;
out_fm[8] = out_fm[9] = out_fm[10] = out_fm[11] = 0;//m2 = c1 = c2 = mem = 0;
set_mem(c);
eg_out = volume_calc(c, 0);
int out1 = CH[c].op1_out0 + CH[c].op1_out1;
CH[c].op1_out0 = CH[c].op1_out1;
set_value1(c);
CH[c].op1_out1 = 0;
if (eg_out < 832)
//减少寻址
int imem_To_c = imem[c];//
fixed (FM_SLOT* CH_c_SLOT = &CH[c].SLOT[0])//因为是引用类型，所以敢这么玩
fixed (int* out_fm_ptr = &out_fm[0])
{
if (CH[c].FB == 0)
//out_fm[8] = out_fm[9] = out_fm[10] = out_fm[11] = 0; //本来就是注释->m2 = c1 = c2 = mem = 0;
out_fm_ptr[8] = out_fm_ptr[9] = out_fm_ptr[10] = out_fm_ptr[11] = 0;
//set_mem(c);
if (imem_To_c == 8 || imem_To_c == 10 || imem_To_c == 11)
out_fm_ptr[imem_To_c] = CH[c].mem_value;
//eg_out = volume_calc(c, 0);
eg_out = (uint)(CH_c_SLOT[0].vol_out + ((LFO_AM >> CH[c].ams) & CH_c_SLOT[0].AMmask));
int out1 = CH[c].op1_out0 + CH[c].op1_out1;
CH[c].op1_out0 = CH[c].op1_out1;
//set_value1(c);
if (iconnect1[c] == 12)
{
out1 = 0;
}
CH[c].op1_out1 = op_calc1(CH[c].SLOT[0].phase, eg_out, (out1 << CH[c].FB));
}
eg_out = volume_calc(c, 1);
if (eg_out < 832)
{
out_fm[iconnect3[c]] += op_calc(CH[c].SLOT[1].phase, eg_out, out_fm[8]);
}
eg_out = volume_calc(c, 2);
if (eg_out < 832)
{
out_fm[iconnect2[c]] += op_calc(CH[c].SLOT[2].phase, eg_out, out_fm[9]);
}
eg_out = volume_calc(c, 3);
if (eg_out < 832)
{
out_fm[iconnect4[c]] += op_calc(CH[c].SLOT[3].phase, eg_out, out_fm[10]);
}
CH[c].mem_value = out_fm[11];//mem;
if (CH[c].pms != 0)
{
if (((ST.mode & 0xC0) != 0) && (chnum == 2))
{
update_phase_lfo_slot(0, CH[c].pms, SL3.block_fnum[1]);
update_phase_lfo_slot(2, CH[c].pms, SL3.block_fnum[2]);
update_phase_lfo_slot(1, CH[c].pms, SL3.block_fnum[0]);
update_phase_lfo_slot(3, CH[c].pms, CH[c].block_fnum);
out_fm_ptr[11] = out_fm_ptr[9] = out_fm_ptr[10] = CH[c].op1_out0;
}
else
{
update_phase_lfo_channel(CH, c);
out_fm_ptr[iconnect1[c]] = CH[c].op1_out0;
}
CH[c].op1_out1 = 0;
if (eg_out < 832)
{
if (CH[c].FB == 0)
{
out1 = 0;
}
CH[c].op1_out1 = op_calc1(CH_c_SLOT[0].phase, eg_out, (out1 << CH[c].FB));
}
//eg_out = volume_calc(c, 1);
eg_out = (uint)(CH_c_SLOT[1].vol_out + ((LFO_AM >> CH[c].ams) & CH_c_SLOT[1].AMmask));
if (eg_out < 832)
{
out_fm_ptr[iconnect3[c]] += op_calc(CH_c_SLOT[1].phase, eg_out, out_fm_ptr[8]);
}
//eg_out = volume_calc(c, 2);
eg_out = (uint)(CH_c_SLOT[2].vol_out + ((LFO_AM >> CH[c].ams) & CH_c_SLOT[2].AMmask));
if (eg_out < 832)
{
out_fm_ptr[iconnect2[c]] += op_calc(CH_c_SLOT[2].phase, eg_out, out_fm_ptr[9]);
}
//eg_out = volume_calc(c, 3);
eg_out = (uint)(CH_c_SLOT[3].vol_out + ((LFO_AM >> CH[c].ams) & CH_c_SLOT[3].AMmask));
if (eg_out < 832)
{
out_fm_ptr[iconnect4[c]] += op_calc(CH_c_SLOT[3].phase, eg_out, out_fm[10]);
}
CH[c].mem_value = out_fm_ptr[11];//mem;
if (CH[c].pms != 0)
{
if (((ST.mode & 0xC0) != 0) && (chnum == 2))
{
update_phase_lfo_slot(0, CH[c].pms, SL3.block_fnum[1]);
update_phase_lfo_slot(2, CH[c].pms, SL3.block_fnum[2]);
update_phase_lfo_slot(1, CH[c].pms, SL3.block_fnum[0]);
update_phase_lfo_slot(3, CH[c].pms, CH[c].block_fnum);
}
else
{
update_phase_lfo_channel(CH, c);
}
}
else
{
CH_c_SLOT[0].phase += (uint)CH_c_SLOT[0].Incr;
CH_c_SLOT[2].phase += (uint)CH_c_SLOT[2].Incr;
CH_c_SLOT[1].phase += (uint)CH_c_SLOT[1].Incr;
CH_c_SLOT[3].phase += (uint)CH_c_SLOT[3].Incr;
}
}
else
{
CH[c].SLOT[0].phase += (uint)CH[c].SLOT[0].Incr;
CH[c].SLOT[2].phase += (uint)CH[c].SLOT[2].Incr;
CH[c].SLOT[1].phase += (uint)CH[c].SLOT[1].Incr;
CH[c].SLOT[3].phase += (uint)CH[c].SLOT[3].Incr;
}
}
public void refresh_fc_eg_slot(int type, int c, int s, int fc, int kc)