Merge branch 'dev_4VirtualNes' of http://git.axibug.com/sin365/AxibugEmuOnline into dev_4VirtualNes

This commit is contained in:
sin365 2024-08-05 17:59:57 +08:00
commit dc5f55c003
9 changed files with 174 additions and 83 deletions

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@ -15,7 +15,7 @@ namespace AxibugEmuOnline.Client
private void Start()
{
Application.targetFrameRate = 60;
StartGame("Kirby.nes");
StartGame("tstd2.nes");
}
public void StartGame(string romName)

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@ -0,0 +1,7 @@
fileFormatVersion: 2
guid: 091b4306faaa8fc4084836c5237b76c8
DefaultImporter:
externalObjects: {}
userData:
assetBundleName:
assetBundleVariant:

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@ -0,0 +1,7 @@
fileFormatVersion: 2
guid: 0fcf57d6e248ead4a874daa51181ec5f
DefaultImporter:
externalObjects: {}
userData:
assetBundleName:
assetBundleVariant:

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@ -416,6 +416,11 @@ namespace VirtualNes.Core
header.control2 |= (byte)EnumRomControlByte2.ROM_VSUNISYSTEM;
}
//吞食天地2 豪华中文版
if (crc == 0x19B9E732)
{
mapper = 199;
}
}
}
}

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@ -17,40 +17,40 @@ namespace VirtualNes.Core
BYTE[] chr = new byte[8];
BYTE we_sram;
BYTE irq_type;
BYTE JMaddr;
BYTE[] JMaddrDAT = new BYTE[3];
BYTE irq_enable;
BYTE irq_counter;
BYTE irq_latch;
BYTE irq_request;
public Mapper199(NES parent) : base(parent)
{
}
public override void Reset()
{
for (INT i = 0; i < 8; i++)
for (byte i = 0; i < 8; i++)
{
reg[i] = 0x00;
chr[i] = (byte)i;
chr[i] = i;
}
prg[0] = 0x00;
prg[1] = 0x01;
prg[2] = 0x3e;
prg[3] = 0x3f;
prg[2] = (byte)(PROM_8K_SIZE - 2);
prg[3] = (byte)(PROM_8K_SIZE - 1);
SetBank_CPU();
SetBank_PPU();
we_sram = 0;
irq_enable = irq_counter = irq_latch = irq_request = 0;
JMaddr = 0;
JMaddrDAT[0] = JMaddrDAT[1] = JMaddrDAT[2] = 0;
uint crcP = nes.rom.GetPROM_CRC();
uint crcV = nes.rom.GetVROM_CRC();
if ((crcP == 0xE80D8741) || (crcV == 0x3846520D))
{//ÍâÐÇ°ÔÍõµÄ´ó½
nes.SetRenderMethod(EnumRenderMethod.POST_ALL_RENDER);
}
we_sram = 0;
nes.SetSAVERAM_SIZE(32 * 1024);
nes.SetVideoMode(true);
}
@ -61,6 +61,32 @@ namespace VirtualNes.Core
{
return XRAM[addr - 0x4000];
}
else if (addr >= 0x6000 && addr <= 0x7FFF)
{
if (JMaddr != 0)
{
switch (addr)
{
case 0x6000: return JMaddrDAT[0];
case 0x6010: return JMaddrDAT[1];
case 0x6013: JMaddr = 0; return JMaddrDAT[2];
}
}
switch (we_sram)
{
case 0xE4:
case 0xEC: return WRAM[(addr & 0x1FFF) + 0x0000];
case 0xE5:
case 0xED: return WRAM[(addr & 0x1FFF) + 0x2000];
case 0xE6:
case 0xEE: return WRAM[(addr & 0x1FFF) + 0x4000];
case 0xE7:
case 0xEF: return WRAM[(addr & 0x1FFF) + 0x6000];
default: return CPU_MEM_BANK[addr >> 13][addr & 0x1FFF];
}
}
else
{
return base.ReadLow(addr);
@ -73,6 +99,44 @@ namespace VirtualNes.Core
if (addr >= 0x5000 && addr <= 0x5FFF)
{
XRAM[addr - 0x4000] = data;
if ((we_sram == 0xA1) || (we_sram == 0xA5) || (we_sram == 0xA9))
{
JMaddr = 1;
switch (addr)
{
case 0x5000: JMaddrDAT[0] = data; break;
case 0x5010: JMaddrDAT[1] = data; break;
case 0x5013: JMaddrDAT[2] = data; break;
}
}
}
else if (addr >= 0x6000 && addr <= 0x7FFF)
{
switch (we_sram)
{
case 0xE4: //CPU_MEM_BANK
case 0xEC: //CPU_MEM_BANK
WRAM[(addr & 0x1FFF) + 0x0000] = data;
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
break;
case 0xE5: //SRAM
case 0xED: //SRAM
WRAM[(addr & 0x1FFF) + 0x2000] = data;
break;
case 0xE6:
case 0xEE:
WRAM[(addr & 0x1FFF) + 0x4000] = data;
break;
case 0xE7:
case 0xEF:
WRAM[(addr & 0x1FFF) + 0x6000] = data;
break;
default:
CPU_MEM_BANK[addr >> 13][addr & 0x1FFF] = data;
break;
}
}
else
{
@ -83,8 +147,6 @@ namespace VirtualNes.Core
//void Mapper199::Write(WORD addr, BYTE data)
public override void Write(ushort addr, byte data)
{
//DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes.GetScanline(), nes.cpu.GetTotalCycles() );
switch (addr & 0xE001)
{
case 0x8000:
@ -94,7 +156,6 @@ namespace VirtualNes.Core
break;
case 0x8001:
reg[1] = data;
switch (reg[0] & 0x0f)
{
case 0x00: chr[0] = data; SetBank_PPU(); break;
@ -113,16 +174,16 @@ namespace VirtualNes.Core
break;
case 0xA000:
reg[2] = data;
//if( !nes.rom.Is4SCREEN() )
{
data &= 0x03;
if (data == 0) SetVRAM_Mirror(VRAM_VMIRROR);
else if (data == 1) SetVRAM_Mirror(VRAM_HMIRROR);
else if (data == 2) SetVRAM_Mirror(VRAM_MIRROR4L);
else SetVRAM_Mirror(VRAM_MIRROR4H);
}
break;
case 0xA001:
// DEBUGOUT( "MPRWR A=%04X D=%02X L=%3d CYC=%d\n", addr&0xFFFF, data&0xFF, nes->GetScanline(), nes->cpu->GetTotalCycles() );
reg[3] = data;
we_sram = data;
break;
case 0xC000:
reg[4] = data;
@ -162,15 +223,16 @@ namespace VirtualNes.Core
{
if (irq_counter != 0)
{
irq_counter--;
irq_counter -= 1;
}
}
if ((irq_counter--) == 0)
if (irq_counter == 0)
{
irq_request = 0xFF;
irq_counter = irq_latch;
nes.cpu.SetIRQ(IRQ_MAPPER);
}
irq_counter--;
}
}
}
@ -186,56 +248,66 @@ namespace VirtualNes.Core
void SetBank_PPU()
{
//unsigned int bank = (reg[0] & 0x80) >> 5;
int bank = (reg[0] & 0x80) >> 5;
uint bank = (uint)((reg[0] & 0x80) >> 5);
for (int x = 0; x < 8; x++)
{
if (chr[x] <= 7)
{
SetCRAM_1K_Bank((byte)(x ^ bank), chr[x]);
}
else
{
SetVROM_1K_Bank((byte)(x ^ bank), chr[x]);
}
}
}
//void Mapper199::SaveState(LPBYTE p)
public override void SaveState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
p[i] = reg[i];
p[10 + i] = chr[i];
}
p[8] = prg[0];
p[9] = prg[1];
p[18] = irq_enable;
p[19] = irq_counter;
p[20] = irq_latch;
p[21] = irq_request;
p[22] = prg[2];
p[23] = prg[3];
//for (INT i = 0; i < 8; i++)
//{
// p[i] = reg[i];
//}
//for (i = 8; i < 12; i++)
//{
// p[i] = prg[i];
//}
//for (i = 8; i < 20; i++)
//{
// p[i] = chr[i];
//}
//p[20] = we_sram;
//p[21] = JMaddr;
//p[22] = JMaddrDAT[0];
//p[23] = JMaddrDAT[1];
//p[24] = JMaddrDAT[2];
//p[25] = irq_enable;
//p[26] = irq_counter;
//p[27] = irq_latch;
//p[28] = irq_request;
}
//void Mapper199::LoadState(LPBYTE p)
public override void LoadState(byte[] p)
{
for (INT i = 0; i < 8; i++)
{
reg[i] = p[i];
chr[i] = p[10 + i];
}
prg[0] = p[8];
prg[1] = p[9];
irq_enable = p[18];
irq_counter = p[19];
irq_latch = p[20];
irq_request = p[21];
prg[2] = p[22];
prg[3] = p[23];
//for (INT i = 0; i < 8; i++)
//{
// reg[i] = p[i];
//}
//for (i = 8; i < 12; i++)
//{
// prg[i] = p[i];
//}
//for (i = 8; i < 20; i++)
//{
// chr[i] = p[i];
//}
//we_sram = p[20];
//JMaddr = p[21];
//JMaddrDAT[0] = p[22];
//JMaddrDAT[1] = p[23];
//JMaddrDAT[2] = p[24];
//irq_enable = p[25];
//irq_counter = p[26];
//irq_latch = p[27];
//irq_request = p[28];
}
public override bool IsStateSave()

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@ -1,12 +1,10 @@
//////////////////////////////////////////////////////////////
// Mapper245 Yong Zhe Dou E Long //
//////////////////////////////////////////////////////////////////////////
using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using static VirtualNes.MMU;
using BYTE = System.Byte;
using System;
using Codice.CM.Client.Differences;
using INT = System.Int32;
namespace VirtualNes.Core
{
@ -136,7 +134,7 @@ namespace VirtualNes.Core
{
if (nes.ppu.IsDispON())
{
if (irq_enable != 0&& irq_request == 0)
if (irq_enable != 0 && irq_request == 0)
{
if (scanline == 0)
{
@ -166,9 +164,9 @@ namespace VirtualNes.Core
void SetBank_PPU()
{
if ((VROM_1K_SIZE)!= 0)
if ((VROM_1K_SIZE) != 0)
{
if (((reg[0] & 0x80) !+ 0) != 0)
if (((reg[0] & 0x80)! + 0) != 0)
{
SetVROM_8K_Bank(chr4, chr5, chr6, chr7,
chr23 + 1, chr23, chr01 + 1, chr01);

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@ -245,6 +245,8 @@ namespace VirtualNes.Core
Debuger.Log($"{rom.GetRomName()}");
Debuger.Log($"Mapper : #{rom.GetMapperNo():D3}");
Debuger.Log($"PROM-CRC : #{rom.GetPROM_CRC():X2}");
Debuger.Log($"VROM-CRC : #{rom.GetVROM_CRC():X2}");
Debuger.Log($"PRG SIZE : {16 * rom.GetPROM_SIZE():4:0000}K");
Debuger.Log($"CHR SIZE : {8 * rom.GetVROM_SIZE():4:0000}K");