255 lines
6.5 KiB
C#
255 lines
6.5 KiB
C#
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using System.IO;
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namespace MyNes.Core
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{
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[BoardInfo("VRC4", 21)]
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internal class Mapper021 : Board
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{
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private bool prg_mode;
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private byte prg_reg0;
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private int[] chr_Reg;
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private int irq_reload;
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private int irq_counter;
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private int prescaler;
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private bool irq_mode_cycle;
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private bool irq_enable;
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private bool irq_enable_on_ak;
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internal override void HardReset()
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{
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base.HardReset();
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Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
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prescaler = 341;
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chr_Reg = new int[8];
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}
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internal override void WritePRG(ref ushort address, ref byte data)
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{
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switch (address)
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{
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case 32768:
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case 32770:
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case 32772:
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case 32774:
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case 32832:
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case 32896:
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case 32960:
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prg_reg0 = data;
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Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
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Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
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break;
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case 36864:
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case 36866:
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case 36928:
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switch (data & 3)
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{
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case 0:
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Switch01KNMTFromMirroring(Mirroring.Vert);
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break;
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case 1:
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Switch01KNMTFromMirroring(Mirroring.Horz);
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break;
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case 2:
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Switch01KNMTFromMirroring(Mirroring.OneScA);
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break;
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case 3:
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Switch01KNMTFromMirroring(Mirroring.OneScB);
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break;
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}
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break;
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case 36868:
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case 36870:
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case 36992:
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case 37056:
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prg_mode = (data & 2) == 2;
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Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
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Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
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break;
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case 40960:
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case 40962:
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case 40964:
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case 40966:
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case 41024:
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case 41088:
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case 41152:
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Switch08KPRG(data & 0x1F, PRGArea.AreaA000);
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break;
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case 45056:
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chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
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break;
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case 45058:
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case 45120:
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chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
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break;
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case 45060:
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case 45184:
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chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
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break;
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case 45062:
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case 45248:
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chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
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break;
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case 49152:
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chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
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break;
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case 49154:
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case 49216:
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chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
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break;
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case 49156:
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case 49280:
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chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
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break;
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case 49158:
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case 49344:
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chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
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break;
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case 53248:
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chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
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break;
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case 53250:
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case 53312:
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chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
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break;
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case 53252:
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case 53376:
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chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
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break;
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case 53254:
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case 53440:
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chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
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break;
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case 57344:
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chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
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break;
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case 57346:
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case 57408:
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chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
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break;
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case 57348:
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case 57472:
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chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
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Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
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break;
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case 57350:
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case 57536:
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chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
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Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
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break;
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case 61440:
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irq_reload = (irq_reload & 0xF0) | (data & 0xF);
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break;
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case 61442:
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case 61504:
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irq_reload = (irq_reload & 0xF) | ((data & 0xF) << 4);
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break;
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case 61444:
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case 61568:
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irq_mode_cycle = (data & 4) == 4;
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irq_enable = (data & 2) == 2;
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irq_enable_on_ak = (data & 1) == 1;
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if (irq_enable)
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{
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irq_counter = irq_reload;
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prescaler = 341;
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}
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NesEmu.IRQFlags &= -9;
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break;
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case 61446:
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case 61632:
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NesEmu.IRQFlags &= -9;
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irq_enable = irq_enable_on_ak;
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break;
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}
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}
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internal override void OnCPUClock()
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{
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if (!irq_enable)
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{
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return;
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}
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if (!irq_mode_cycle)
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{
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if (prescaler > 0)
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{
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prescaler -= 3;
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return;
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}
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prescaler = 341;
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irq_counter++;
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if (irq_counter == 255)
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{
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NesEmu.IRQFlags |= 8;
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irq_counter = irq_reload;
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}
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}
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else
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{
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irq_counter++;
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if (irq_counter == 255)
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{
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NesEmu.IRQFlags |= 8;
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irq_counter = irq_reload;
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}
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}
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}
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internal override void WriteStateData(ref BinaryWriter stream)
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{
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base.WriteStateData(ref stream);
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stream.Write(prg_mode);
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stream.Write(prg_reg0);
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for (int i = 0; i < chr_Reg.Length; i++)
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{
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stream.Write(chr_Reg[i]);
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}
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stream.Write(irq_reload);
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stream.Write(irq_counter);
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stream.Write(prescaler);
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stream.Write(irq_mode_cycle);
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stream.Write(irq_enable);
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stream.Write(irq_enable_on_ak);
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}
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internal override void ReadStateData(ref BinaryReader stream)
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{
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base.ReadStateData(ref stream);
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prg_mode = stream.ReadBoolean();
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prg_reg0 = stream.ReadByte();
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for (int i = 0; i < chr_Reg.Length; i++)
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{
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chr_Reg[i] = stream.ReadInt32();
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}
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irq_reload = stream.ReadInt32();
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irq_counter = stream.ReadInt32();
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prescaler = stream.ReadInt32();
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irq_mode_cycle = stream.ReadBoolean();
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irq_enable = stream.ReadBoolean();
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irq_enable_on_ak = stream.ReadBoolean();
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}
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}
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}
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