2024-08-04 00:32:14 +08:00
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//////////////////////////////////////////////////////////////////////////
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// Mapper116 CartSaint : 幽遊AV強列伝 //
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//////////////////////////////////////////////////////////////////////////
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using static VirtualNes.MMU;
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using static VirtualNes.Core.CPU;
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using INT = System.Int32;
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using BYTE = System.Byte;
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using System;
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using Codice.CM.Client.Differences;
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2024-08-05 11:52:43 +08:00
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using VirtualNes.Core.Debug;
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2024-08-04 00:32:14 +08:00
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namespace VirtualNes.Core
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{
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public class Mapper116 : Mapper
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{
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BYTE[] reg = new byte[8];
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BYTE prg0, prg1, prg2, prg3;
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BYTE prg0L, prg1L;
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BYTE chr0, chr1, chr2, chr3, chr4, chr5, chr6, chr7;
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BYTE irq_enable;
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INT irq_counter;
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BYTE irq_latch;
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BYTE ExPrgSwitch;
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BYTE ExChrSwitch;
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public Mapper116(NES parent) : base(parent)
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{
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}
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public override void Reset()
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{
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for (INT i = 0; i < 8; i++)
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{
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reg[i] = 0x00;
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}
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prg0 = prg0L = 0;
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prg1 = prg1L = 1;
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prg2 = (byte)(PROM_8K_SIZE - 2);
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prg3 = (byte)(PROM_8K_SIZE - 1);
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ExPrgSwitch = 0;
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ExChrSwitch = 0;
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SetBank_CPU();
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if (VROM_1K_SIZE != 0)
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{
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chr0 = 0;
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chr1 = 1;
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chr2 = 2;
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chr3 = 3;
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chr4 = 4;
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chr5 = 5;
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chr6 = 6;
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chr7 = 7;
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SetBank_PPU();
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}
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else
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{
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chr0 = chr2 = chr4 = chr5 = chr6 = chr7 = 0;
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chr1 = chr3 = 1;
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}
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irq_enable = 0; // Disable
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irq_counter = 0;
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irq_latch = 0;
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// nes.SetFrameIRQmode( FALSE );
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}
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//void Mapper116::WriteLow(WORD addr, BYTE data)
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public override void WriteLow(ushort addr, byte data)
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{
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2024-08-05 11:52:43 +08:00
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Debuger.Log($"MPRWR A={addr & 0xFFFF:X4} D={data & 0xFF:X2} L={nes.GetScanline(),3} CYC={nes.cpu.GetTotalCycles()}");
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2024-08-04 00:32:14 +08:00
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if ((addr & 0x4100) == 0x4100)
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{
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ExChrSwitch = data;
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SetBank_PPU();
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}
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}
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//void Mapper116::Write(WORD addr, BYTE data)
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public override void Write(ushort addr, byte data)
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{
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2024-08-05 11:52:43 +08:00
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Debuger.Log($"MPRWR A={addr & 0xFFFF:X4} D={data & 0xFF:X2} L={nes.GetScanline(),3} CYC={nes.cpu.GetTotalCycles()}");
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2024-08-04 00:32:14 +08:00
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switch (addr & 0xE001)
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{
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case 0x8000:
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reg[0] = data;
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SetBank_CPU();
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SetBank_PPU();
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break;
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case 0x8001:
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reg[1] = data;
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switch (reg[0] & 0x07)
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{
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case 0x00:
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chr0 = (byte)(data & 0xFE);
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chr1 = (byte)(chr0 + 1);
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SetBank_PPU();
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break;
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case 0x01:
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chr2 = (byte)(data & 0xFE);
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chr3 = (byte)(chr2 + 1);
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SetBank_PPU();
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break;
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case 0x02:
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chr4 = data;
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SetBank_PPU();
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break;
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case 0x03:
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chr5 = data;
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SetBank_PPU();
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break;
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case 0x04:
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chr6 = data;
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SetBank_PPU();
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break;
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case 0x05:
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chr7 = data;
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SetBank_PPU();
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break;
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case 0x06:
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prg0 = data;
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SetBank_CPU();
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break;
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case 0x07:
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prg1 = data;
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SetBank_CPU();
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break;
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}
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break;
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case 0xA000:
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reg[2] = data;
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if (!nes.rom.Is4SCREEN())
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{
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if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
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else SetVRAM_Mirror(VRAM_VMIRROR);
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}
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break;
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case 0xA001:
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reg[3] = data;
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break;
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case 0xC000:
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reg[4] = data;
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irq_counter = data;
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// irq_enable = 0xFF;
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break;
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case 0xC001:
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reg[5] = data;
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irq_latch = data;
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break;
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case 0xE000:
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reg[6] = data;
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irq_counter = irq_latch;
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irq_enable = 0;
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nes.cpu.ClrIRQ(IRQ_MAPPER);
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break;
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case 0xE001:
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reg[7] = data;
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irq_enable = 0xFF;
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break;
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}
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}
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//void Mapper116::HSync(INT scanline)
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public override void HSync(int scanline)
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{
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if ((scanline >= 0 && scanline <= 239))
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{
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if (irq_counter <= 0)
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{
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if (irq_enable != 0)
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{
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// nes.cpu.IRQ_NotPending();
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nes.cpu.SetIRQ(IRQ_MAPPER);
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#if FALSE //0
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DEBUGOUT( "IRQ L=%3d\n", scanline );
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{
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LPBYTE lpScn = nes.ppu.GetScreenPtr();
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lpScn = lpScn+(256+16)*scanline;
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for( INT i = 0; i < 64; i++ ) {
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lpScn[i] = 22;
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}
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}
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#endif
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return;
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}
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}
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if (nes.ppu.IsDispON())
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{
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irq_counter--;
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}
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}
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#if FALSE //0
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if( (scanline >= 0 && scanline <= 239) ) {
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if( nes.ppu.IsDispON() ) {
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if( irq_enable ) {
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if( !(irq_counter--) ) {
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// irq_counter = irq_latch;
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nes.cpu.IRQ_NotPending();
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}
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}
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}
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}
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#endif
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}
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void SetBank_CPU()
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{
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if ((reg[0] & 0x40) != 0)
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{
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SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
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}
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else
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{
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SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
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}
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}
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void SetBank_PPU()
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{
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if (VROM_1K_SIZE != 0)
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{
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if ((ExChrSwitch & 0x04) != 0)
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{
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INT chrbank = 256;
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SetVROM_8K_Bank(chrbank + chr4, chrbank + chr5,
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chrbank + chr6, chrbank + chr7,
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chr0, chr1,
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chr2, chr3);
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}
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else
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{
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INT chrbank = 0;
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SetVROM_8K_Bank(chrbank + chr4, chrbank + chr5,
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chrbank + chr6, chrbank + chr7,
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chr0, chr1,
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chr2, chr3);
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}
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#if FALSE //0
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if( reg[0] & 0x80 ) {
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// SetVROM_8K_Bank( chrbank+chr4, chrbank+chr5,
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// chrbank+chr6, chrbank+chr7,
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// chrbank+chr0, chrbank+chr1,
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// chrbank+chr2, chrbank+chr3 );
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SetVROM_8K_Bank( chrbank+chr4, chrbank+chr5,
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chrbank+chr6, chrbank+chr7,
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chr0, chr1,
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chr2, chr3 );
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} else {
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SetVROM_8K_Bank( chr0, chr1,
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chr2, chr3,
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chrbank+chr4, chrbank+chr5,
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chrbank+chr6, chrbank+chr7 );
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}
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#endif
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}
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}
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//void Mapper116::SaveState(LPBYTE p)
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public override void SaveState(byte[] p)
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{
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for (INT i = 0; i < 8; i++)
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{
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p[i] = reg[i];
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}
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p[8] = prg0;
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p[9] = prg1;
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p[10] = prg2;
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p[11] = prg3;
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p[12] = chr0;
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p[13] = chr1;
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p[14] = chr2;
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p[15] = chr3;
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p[16] = chr4;
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p[17] = chr5;
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p[18] = chr6;
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p[19] = chr7;
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p[20] = irq_enable;
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p[21] = (byte)irq_counter;
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p[22] = irq_latch;
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p[23] = ExPrgSwitch;
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p[24] = prg0L;
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p[25] = prg1L;
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p[26] = ExChrSwitch;
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}
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//void Mapper116::LoadState(LPBYTE p)
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public override void LoadState(byte[] p)
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{
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for (INT i = 0; i < 8; i++)
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{
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reg[i] = p[i];
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}
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prg0 = p[8];
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prg1 = p[9];
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prg2 = p[10];
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prg3 = p[11];
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chr0 = p[12];
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chr1 = p[13];
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chr2 = p[14];
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chr3 = p[15];
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chr4 = p[16];
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chr5 = p[17];
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chr6 = p[18];
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chr7 = p[19];
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irq_enable = p[20];
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irq_counter = p[21];
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irq_latch = p[22];
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ExPrgSwitch = p[23];
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prg0L = p[24];
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prg1L = p[25];
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ExChrSwitch = p[26];
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}
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public override bool IsStateSave()
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{
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return true;
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}
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}
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}
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