forked from sin365/AxibugEmuOnline
388 lines
7.8 KiB
C#
388 lines
7.8 KiB
C#
//////////////////////////////////////////////////////////////////////////
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// Mapper045 1000000-in-1 //
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//////////////////////////////////////////////////////////////////////////
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using static VirtualNes.MMU;
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using static VirtualNes.Core.CPU;
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using INT = System.Int32;
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using BYTE = System.Byte;
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using Codice.CM.Client.Differences;
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namespace VirtualNes.Core
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{
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public class Mapper045 : Mapper
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{
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BYTE[] reg = new byte[8];
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BYTE patch;
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BYTE prg0, prg1, prg2, prg3;
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BYTE chr0, chr1, chr2, chr3, chr4, chr5, chr6, chr7;
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BYTE[] p = new byte[4];
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INT[] c = new int[8];
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BYTE irq_enable;
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BYTE irq_counter;
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BYTE irq_latch;
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BYTE irq_latched;
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BYTE irq_reset;
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public Mapper045(NES parent) : base(parent)
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{
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}
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public override void Reset()
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{
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patch = 0;
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for (INT i = 0; i < 8; i++)
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{
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reg[i] = 0;
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}
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prg0 = 0;
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prg1 = 1;
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prg2 = (byte)(PROM_8K_SIZE - 2);
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prg3 = (byte)(PROM_8K_SIZE - 1);
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uint crc = nes.rom.GetPROM_CRC();
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if (crc == 0x58bcacf6 // Kunio 8-in-1 (Pirate Cart)
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|| crc == 0x9103cfd6 // HIK 7-in-1 (Pirate Cart)
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|| crc == 0xc082e6d3)
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{ // Super 8-in-1 (Pirate Cart)
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patch = 1;
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prg2 = 62;
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prg3 = 63;
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}
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if (crc == 0xe0dd259d)
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{ // Super 3-in-1 (Pirate Cart)
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patch = 2;
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}
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SetPROM_32K_Bank(prg0, prg1, prg2, prg3);
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p[0] = prg0;
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p[1] = prg1;
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p[2] = prg2;
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p[3] = prg3;
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SetVROM_8K_Bank(0);
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// chr0 = c[0] = 0;
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// chr1 = c[1] = 0
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// chr2 = c[2] = 0;
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// chr3 = c[3] = 0;
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// chr4 = c[4] = 0;
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// chr5 = c[5] = 0;
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// chr6 = c[6] = 0;
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// chr7 = c[7] = 0;
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c[0] = chr0 = 0;
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c[1] = chr1 = 1;
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c[2] = chr2 = 2;
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c[3] = chr3 = 3;
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c[4] = chr4 = 4;
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c[5] = chr5 = 5;
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c[6] = chr6 = 6;
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c[7] = chr7 = 7;
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irq_enable = 0;
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irq_counter = 0;
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irq_latch = 0;
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irq_latched = 0;
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irq_reset = 0;
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}
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//void Mapper045::WriteLow(WORD addr, BYTE data)
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public override void WriteLow(ushort addr, byte data)
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{
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// if( addr == 0x6000 ) {
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// if( addr == 0x6000 && !(reg[3]&0x40) ) {
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if ((reg[3] & 0x40) == 0)
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{
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reg[reg[5]] = data;
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reg[5] = (byte)((reg[5] + 1) & 0x03);
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SetBank_CPU_4(prg0);
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SetBank_CPU_5(prg1);
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SetBank_CPU_6(prg2);
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SetBank_CPU_7(prg3);
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SetBank_PPU();
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}
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}
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//void Mapper045::Write(WORD addr, BYTE data)
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public override void Write(ushort addr, byte data)
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{
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switch (addr & 0xE001)
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{
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case 0x8000:
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if ((data & 0x40) != (reg[6] & 0x40))
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{
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BYTE swp;
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swp = prg0; prg0 = prg2; prg2 = swp;
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swp = p[0]; p[0] = p[2]; p[2] = swp;
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SetBank_CPU_4(p[0]);
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SetBank_CPU_5(p[1]);
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}
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if (VROM_1K_SIZE != 0)
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{
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if ((data & 0x80) != (reg[6] & 0x80))
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{
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INT swp;
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swp = chr4; chr4 = chr0; chr0 = (byte)swp;
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swp = chr5; chr5 = chr1; chr1 = (byte)swp;
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swp = chr6; chr6 = chr2; chr2 = (byte)swp;
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swp = chr7; chr7 = chr3; chr3 = (byte)swp;
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swp = c[4]; c[4] = c[0]; c[0] = swp;
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swp = c[5]; c[5] = c[1]; c[1] = swp;
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swp = c[6]; c[6] = c[2]; c[2] = swp;
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swp = c[7]; c[7] = c[3]; c[3] = swp;
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SetVROM_8K_Bank(c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]);
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}
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}
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reg[6] = data;
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break;
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case 0x8001:
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switch (reg[6] & 0x07)
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{
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case 0x00:
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chr0 = (byte)((data & 0xFE) + 0);
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chr1 = (byte)((data & 0xFE) + 1);
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SetBank_PPU();
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break;
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case 0x01:
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chr2 = (byte)((data & 0xFE) + 0);
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chr3 = (byte)((data & 0xFE) + 1);
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SetBank_PPU();
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break;
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case 0x02:
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chr4 = data;
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SetBank_PPU();
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break;
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case 0x03:
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chr5 = data;
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SetBank_PPU();
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break;
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case 0x04:
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chr6 = data;
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SetBank_PPU();
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break;
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case 0x05:
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chr7 = data;
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SetBank_PPU();
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break;
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case 0x06:
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if ((reg[6] & 0x40) != 0)
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{
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prg2 = (byte)(data & 0x3F);
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SetBank_CPU_6(data);
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}
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else
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{
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prg0 = (byte)(data & 0x3F);
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SetBank_CPU_4(data);
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}
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break;
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case 0x07:
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prg1 = (byte)(data & 0x3F);
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SetBank_CPU_5(data);
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break;
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}
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break;
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case 0xA000:
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if ((data & 0x01) != 0) SetVRAM_Mirror(VRAM_HMIRROR);
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else SetVRAM_Mirror(VRAM_VMIRROR);
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break;
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case 0xC000:
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if (patch == 2)
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{
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if (data == 0x29 || data == 0x70)
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data = 0x07;
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}
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irq_latch = data;
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irq_latched = 1;
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if (irq_reset != 0)
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{
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irq_counter = data;
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irq_latched = 0;
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}
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// irq_counter = data;
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break;
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case 0xC001:
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// irq_latch = data;
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irq_counter = irq_latch;
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break;
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case 0xE000:
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irq_enable = 0;
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irq_reset = 1;
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nes.cpu.ClrIRQ(IRQ_MAPPER);
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break;
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case 0xE001:
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irq_enable = 1;
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if (irq_latched != 0)
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{
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irq_counter = irq_latch;
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}
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break;
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}
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}
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//void Mapper045::HSync(INT scanline)
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public override void HSync(int scanline)
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{
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irq_reset = 0;
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if ((scanline >= 0 && scanline <= 239) && nes.ppu.IsDispON())
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{
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if (irq_counter != 0)
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{
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irq_counter--;
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if (irq_counter == 0)
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{
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if (irq_enable != 0)
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{
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nes.cpu.SetIRQ(IRQ_MAPPER);
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}
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}
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}
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}
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}
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void SetBank_CPU_4(INT data)
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{
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data &= (reg[3] & 0x3F) ^ 0xFF;
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data &= 0x3F;
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data |= reg[1];
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SetPROM_8K_Bank(4, data);
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p[0] = (byte)data;
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}
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void SetBank_CPU_5(INT data)
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{
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data &= (reg[3] & 0x3F) ^ 0xFF;
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data &= 0x3F;
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data |= reg[1];
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SetPROM_8K_Bank(5, data);
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p[1] = (byte)data;
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}
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void SetBank_CPU_6(INT data)
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{
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data &= (reg[3] & 0x3F) ^ 0xFF;
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data &= 0x3F;
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data |= reg[1];
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SetPROM_8K_Bank(6, data);
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p[2] = (byte)data;
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}
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void SetBank_CPU_7(INT data)
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{
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data &= (reg[3] & 0x3F) ^ 0xFF;
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data &= 0x3F;
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data |= reg[1];
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SetPROM_8K_Bank(7, data);
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p[3] = (byte)data;
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}
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void SetBank_PPU()
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{
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BYTE[] table = new byte[] {
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x01,0x03,0x07,0x0F,0x1F,0x3F,0x7F,0xFF
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};
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c[0] = chr0;
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c[1] = chr1;
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c[2] = chr2;
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c[3] = chr3;
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c[4] = chr4;
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c[5] = chr5;
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c[6] = chr6;
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c[7] = chr7;
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for (INT i = 0; i < 8; i++)
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{
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c[i] &= table[reg[2] & 0x0F];
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c[i] |= reg[0] & ((patch != 1) ? 0xFF : 0xC0);
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c[i] += (reg[2] & ((patch != 1) ? 0x10 : 0x30)) << 4;
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}
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if ((reg[6] & 0x80) != 0)
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{
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SetVROM_8K_Bank(c[4], c[5], c[6], c[7], c[0], c[1], c[2], c[3]);
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}
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else
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{
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SetVROM_8K_Bank(c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]);
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}
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}
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//void Mapper045::SaveState(LPBYTE ps)
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public override void SaveState(byte[] p)
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{
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//INT i;
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//for (i = 0; i < 8; i++)
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//{
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// ps[i] = reg[i];
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//}
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//for (i = 0; i < 4; i++)
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//{
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// ps[i + 8] = p[i];
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//}
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//for (i = 0; i < 8; i++)
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//{
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// *(INT*)&ps[i * 4 + 64] = c[i];
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//}
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//ps[20] = prg0;
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//ps[21] = prg1;
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//ps[22] = prg2;
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//ps[23] = prg3;
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//ps[24] = chr0;
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//ps[25] = chr1;
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//ps[26] = chr2;
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//ps[27] = chr3;
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//ps[28] = chr4;
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//ps[29] = chr5;
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//ps[30] = chr6;
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//ps[31] = chr7;
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//ps[32] = irq_enable;
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//ps[33] = irq_counter;
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//ps[34] = irq_latch;
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}
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//void Mapper045::LoadState(LPBYTE ps)
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public override void LoadState(byte[] p)
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{
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//INT i;
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//for (i = 0; i < 8; i++)
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//{
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// reg[i] = ps[i];
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//}
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//for (i = 0; i < 4; i++)
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//{
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// p[i] = ps[i + 8];
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//}
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//for (i = 0; i < 8; i++)
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//{
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// c[i] = *(INT*)&ps[i * 4 + 64];
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//}
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//prg0 = ps[20];
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//prg1 = ps[21];
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//prg2 = ps[22];
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//prg3 = ps[23];
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//chr0 = ps[24];
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//chr1 = ps[25];
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//chr2 = ps[26];
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//chr3 = ps[27];
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//chr4 = ps[28];
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//chr5 = ps[29];
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//chr6 = ps[30];
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//chr7 = ps[31];
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//irq_enable = ps[32];
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//irq_counter = ps[33];
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//irq_latch = ps[34];
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}
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public override bool IsStateSave()
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{
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return true;
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}
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}
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}
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