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core替换为7.7版本

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ALIENJACK\alien 2024-07-03 18:15:28 +08:00
parent 7b2b0f3d20
commit ed4af60268
212 changed files with 29835 additions and 29813 deletions
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261
AxibugEmuOnline.Client/Assets/MyNes.Core/Bandai.cs
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@ -1,143 +1,140 @@
using System.IO;
namespace MyNes.Core
using System.IO;
namespace MyNes.Core;
internal abstract class Bandai : Board
{
private bool irq_enable;
private int irq_counter;
internal abstract class Bandai : Board
{
private bool irq_enable;
private Eprom eprom;
private int irq_counter;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
if (base.BoardType.ToLower().Contains("24c01"))
{
eprom = new Eprom(128);
}
else
{
eprom = new Eprom((base.MapperNumber == 16) ? 256 : 128);
}
}
private Eprom eprom;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
irq_enable = false;
irq_counter = 0;
eprom.HardReset();
}
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
if (base.BoardType.ToLower().Contains("24c01"))
{
eprom = new Eprom(128);
}
else
{
eprom = new Eprom((base.MapperNumber == 16) ? 256 : 128);
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
WritePRG(ref address, ref data);
}
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
irq_enable = false;
irq_counter = 0;
eprom.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF)
{
case 0:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 1:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 2:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 3:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 4:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 5:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 6:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 7:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 8:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 9:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 10:
irq_enable = (data & 1) == 1;
NesEmu.IRQFlags &= -9;
break;
case 11:
irq_counter = (irq_counter & 0xFF00) | data;
break;
case 12:
irq_counter = (irq_counter & 0xFF) | (data << 8);
break;
case 13:
eprom.Write(address, data);
break;
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
WritePRG(ref address, ref data);
}
internal override void ReadSRM(ref ushort address, out byte value)
{
value = eprom.Read(address);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF)
{
case 0:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 1:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 2:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 3:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 4:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 5:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 6:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 7:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 8:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 9:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 10:
irq_enable = (data & 1) == 1;
NesEmu.IRQFlags &= -9;
break;
case 11:
irq_counter = (irq_counter & 0xFF00) | data;
break;
case 12:
irq_counter = (irq_counter & 0xFF) | (data << 8);
break;
case 13:
eprom.Write(address, data);
break;
}
}
internal override void OnCPUClock()
{
if (irq_enable)
{
irq_counter--;
if (irq_counter == 0)
{
NesEmu.IRQFlags |= 8;
}
if (irq_counter < 0)
{
irq_counter = 65535;
}
}
}
internal override void ReadSRM(ref ushort address, out byte value)
{
value = eprom.Read(address);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enable);
stream.Write(irq_counter);
eprom.SaveState(stream);
}
internal override void OnCPUClock()
{
if (irq_enable)
{
irq_counter--;
if (irq_counter == 0)
{
NesEmu.IRQFlags |= 8;
}
if (irq_counter < 0)
{
irq_counter = 65535;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enable);
stream.Write(irq_counter);
eprom.SaveState(stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enable = stream.ReadBoolean();
irq_counter = stream.ReadInt32();
eprom.LoadState(stream);
}
}
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enable = stream.ReadBoolean();
irq_counter = stream.ReadInt32();
eprom.LoadState(stream);
}
}

41
AxibugEmuOnline.Client/Assets/MyNes.Core/BankInfo.cs
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@ -1,29 +1,26 @@
namespace MyNes.Core
namespace MyNes.Core;
internal struct BankInfo
{
public bool IsRAM;
public bool Enabled;
internal struct BankInfo
{
public bool IsRAM;
public bool Writable;
public bool Enabled;
public bool IsBattery;
public bool Writable;
public string ID;
public bool IsBattery;
public byte[] DATA;
public string ID;
public byte[] DATA;
public BankInfo(string ID, bool IsRAM, bool Writable, bool Enabled, bool IsBattery, byte[] DATA)
{
this.ID = ID;
this.IsRAM = IsRAM;
this.Writable = Writable;
this.Enabled = Enabled;
this.DATA = DATA;
this.IsBattery = IsBattery;
}
}
}
public BankInfo(string ID, bool IsRAM, bool Writable, bool Enabled, bool IsBattery, byte[] DATA)
{
this.ID = ID;
this.IsRAM = IsRAM;
this.Writable = Writable;
this.Enabled = Enabled;
this.DATA = DATA;
this.IsBattery = IsBattery;
}
}

29
AxibugEmuOnline.Client/Assets/MyNes.Core/BankInfoSorter.cs
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@ -1,16 +1,15 @@
using System.Collections.Generic;
namespace MyNes.Core
using System.Collections.Generic;
namespace MyNes.Core;
internal class BankInfoSorter : IComparer<BankInfo>
{
internal class BankInfoSorter : IComparer<BankInfo>
{
public int Compare(BankInfo x, BankInfo y)
{
int result = 0;
int result2 = 0;
int.TryParse(x.ID, out result);
int.TryParse(y.ID, out result2);
return result2 - result;
}
}
}
public int Compare(BankInfo x, BankInfo y)
{
int result = 0;
int result2 = 0;
int.TryParse(x.ID, out result);
int.TryParse(y.ID, out result2);
return result2 - result;
}
}

15
AxibugEmuOnline.Client/Assets/MyNes.Core/BlankJoypad.cs
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@ -1,9 +1,8 @@
namespace MyNes.Core
namespace MyNes.Core;
internal class BlankJoypad : IJoypadConnecter
{
internal class BlankJoypad : IJoypadConnecter
{
public override void Update()
{
}
}
}
public override void Update()
{
}
}

16
AxibugEmuOnline.Client/Assets/MyNes.Core/BlankShortuctsHandler.cs
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@ -1,10 +1,8 @@
namespace MyNes.Core
{
namespace MyNes.Core;
internal class BlankShortuctsHandler : IShortcutsHandler
{
public void Update()
{
}
}
}
internal class BlankShortuctsHandler : IShortcutsHandler
{
public void Update()
{
}
}

2231
AxibugEmuOnline.Client/Assets/MyNes.Core/Board.cs
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File diff suppressed because it is too large Load Diff

111
AxibugEmuOnline.Client/Assets/MyNes.Core/BoardInfoAttribute.cs
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@ -1,57 +1,56 @@
using System;
namespace MyNes.Core
{
internal class BoardInfoAttribute : Attribute
{
public string Name { get; private set; }
public int Mapper { get; private set; }
public int DefaultPRG_RAM_8KB_BanksCount { get; private set; }
public int DefaultCHR_RAM_1KB_BanksCount { get; private set; }
public bool Enabled_ppuA12ToggleTimer { get; private set; }
public bool PPUA12TogglesOnRaisingEdge { get; private set; }
public BoardInfoAttribute(string boardName, int inesMapperNumber)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = 1;
DefaultCHR_RAM_1KB_BanksCount = 8;
Enabled_ppuA12ToggleTimer = (PPUA12TogglesOnRaisingEdge = false);
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, int defaultPRG_RAM_8KB_BanksCount, int defaultCHR_RAM_1KB_BanksCount)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = defaultPRG_RAM_8KB_BanksCount;
DefaultCHR_RAM_1KB_BanksCount = defaultCHR_RAM_1KB_BanksCount;
Enabled_ppuA12ToggleTimer = (PPUA12TogglesOnRaisingEdge = false);
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, bool Enabled_ppuA12ToggleTimer, bool PPUA12TogglesOnRaisingEdge)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = 1;
DefaultCHR_RAM_1KB_BanksCount = 8;
this.Enabled_ppuA12ToggleTimer = Enabled_ppuA12ToggleTimer;
this.PPUA12TogglesOnRaisingEdge = PPUA12TogglesOnRaisingEdge;
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, int defaultPRG_RAM_8KB_BanksCount, int defaultCHR_RAM_1KB_BanksCount, bool Enabled_ppuA12ToggleTimer, bool PPUA12TogglesOnRaisingEdge)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = defaultPRG_RAM_8KB_BanksCount;
DefaultCHR_RAM_1KB_BanksCount = defaultCHR_RAM_1KB_BanksCount;
this.Enabled_ppuA12ToggleTimer = Enabled_ppuA12ToggleTimer;
this.PPUA12TogglesOnRaisingEdge = PPUA12TogglesOnRaisingEdge;
}
}
using System;
namespace MyNes.Core;
internal class BoardInfoAttribute : Attribute
{
public string Name { get; private set; }
public int Mapper { get; private set; }
public int DefaultPRG_RAM_8KB_BanksCount { get; private set; }
public int DefaultCHR_RAM_1KB_BanksCount { get; private set; }
public bool Enabled_ppuA12ToggleTimer { get; private set; }
public bool PPUA12TogglesOnRaisingEdge { get; private set; }
public BoardInfoAttribute(string boardName, int inesMapperNumber)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = 1;
DefaultCHR_RAM_1KB_BanksCount = 8;
Enabled_ppuA12ToggleTimer = (PPUA12TogglesOnRaisingEdge = false);
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, int defaultPRG_RAM_8KB_BanksCount, int defaultCHR_RAM_1KB_BanksCount)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = defaultPRG_RAM_8KB_BanksCount;
DefaultCHR_RAM_1KB_BanksCount = defaultCHR_RAM_1KB_BanksCount;
Enabled_ppuA12ToggleTimer = (PPUA12TogglesOnRaisingEdge = false);
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, bool Enabled_ppuA12ToggleTimer, bool PPUA12TogglesOnRaisingEdge)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = 1;
DefaultCHR_RAM_1KB_BanksCount = 8;
this.Enabled_ppuA12ToggleTimer = Enabled_ppuA12ToggleTimer;
this.PPUA12TogglesOnRaisingEdge = PPUA12TogglesOnRaisingEdge;
}
public BoardInfoAttribute(string boardName, int inesMapperNumber, int defaultPRG_RAM_8KB_BanksCount, int defaultCHR_RAM_1KB_BanksCount, bool Enabled_ppuA12ToggleTimer, bool PPUA12TogglesOnRaisingEdge)
{
Name = boardName;
Mapper = inesMapperNumber;
DefaultPRG_RAM_8KB_BanksCount = defaultPRG_RAM_8KB_BanksCount;
DefaultCHR_RAM_1KB_BanksCount = defaultCHR_RAM_1KB_BanksCount;
this.Enabled_ppuA12ToggleTimer = Enabled_ppuA12ToggleTimer;
this.PPUA12TogglesOnRaisingEdge = PPUA12TogglesOnRaisingEdge;
}
}

27
AxibugEmuOnline.Client/Assets/MyNes.Core/BoardInfoObject.cs
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@ -1,15 +1,14 @@
namespace MyNes.Core
{
public class BoardInfoObject
{
public string Name { get; internal set; }
public int MapperNumber { get; internal set; }
public bool IsSupported { get; internal set; }
public string Issues { get; internal set; }
public bool HasIssues { get; internal set; }
}
namespace MyNes.Core;
public class BoardInfoObject
{
public string Name { get; internal set; }
public int MapperNumber { get; internal set; }
public bool IsSupported { get; internal set; }
public string Issues { get; internal set; }
public bool HasIssues { get; internal set; }
}

25
AxibugEmuOnline.Client/Assets/MyNes.Core/CHRArea.cs
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@ -1,14 +1,13 @@
namespace MyNes.Core
{
internal enum CHRArea : byte
{
Area0000,
Area0400,
Area0800,
Area0C00,
Area1000,
Area1400,
Area1800,
Area1C00
}
namespace MyNes.Core;
internal enum CHRArea : byte
{
Area0000,
Area0400,
Area0800,
Area0C00,
Area1000,
Area1400,
Area1800,
Area1C00
}

141
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/Adler32.cs
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@ -1,72 +1,71 @@
namespace ComponentAce.Compression.Libs.zlib
{
internal sealed class Adler32
{
private const int BASE = 65521;
private const int NMAX = 5552;
internal long adler32(long adler, byte[] buf, int index, int len)
{
if (buf == null)
{
return 1L;
}
long num = adler & 0xFFFF;
long num2 = (adler >> 16) & 0xFFFF;
while (len > 0)
{
int num3 = ((len < 5552) ? len : 5552);
len -= num3;
while (num3 >= 16)
{
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num3 -= 16;
}
if (num3 != 0)
{
do
{
num += buf[index++] & 0xFF;
num2 += num;
}
while (--num3 != 0);
}
num %= 65521;
num2 %= 65521;
}
return (num2 << 16) | num;
}
}
namespace ComponentAce.Compression.Libs.zlib;
internal sealed class Adler32
{
private const int BASE = 65521;
private const int NMAX = 5552;
internal long adler32(long adler, byte[] buf, int index, int len)
{
if (buf == null)
{
return 1L;
}
long num = adler & 0xFFFF;
long num2 = (adler >> 16) & 0xFFFF;
while (len > 0)
{
int num3 = ((len < 5552) ? len : 5552);
len -= num3;
while (num3 >= 16)
{
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num += buf[index++] & 0xFF;
num2 += num;
num3 -= 16;
}
if (num3 != 0)
{
do
{
num += buf[index++] & 0xFF;
num2 += num;
}
while (--num3 != 0);
}
num %= 65521;
num2 %= 65521;
}
return (num2 << 16) | num;
}
}

2788
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/Deflate.cs
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File diff suppressed because it is too large Load Diff

1316
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/InfBlocks.cs
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File diff suppressed because it is too large Load Diff

1327
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/InfCodes.cs
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951
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/InfTree.cs
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@ -1,475 +1,478 @@
using System;
namespace ComponentAce.Compression.Libs.zlib
{
internal sealed class InfTree
{
private const int MANY = 1440;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
internal const int fixed_bl = 9;
internal const int fixed_bd = 5;
internal static readonly int[] fixed_tl = new int[1536]
{
96, 7, 256, 0, 8, 80, 0, 8, 16, 84,
8, 115, 82, 7, 31, 0, 8, 112, 0, 8,
48, 0, 9, 192, 80, 7, 10, 0, 8, 96,
0, 8, 32, 0, 9, 160, 0, 8, 0, 0,
8, 128, 0, 8, 64, 0, 9, 224, 80, 7,
6, 0, 8, 88, 0, 8, 24, 0, 9, 144,
83, 7, 59, 0, 8, 120, 0, 8, 56, 0,
9, 208, 81, 7, 17, 0, 8, 104, 0, 8,
40, 0, 9, 176, 0, 8, 8, 0, 8, 136,
0, 8, 72, 0, 9, 240, 80, 7, 4, 0,
8, 84, 0, 8, 20, 85, 8, 227, 83, 7,
43, 0, 8, 116, 0, 8, 52, 0, 9, 200,
81, 7, 13, 0, 8, 100, 0, 8, 36, 0,
9, 168, 0, 8, 4, 0, 8, 132, 0, 8,
68, 0, 9, 232, 80, 7, 8, 0, 8, 92,
0, 8, 28, 0, 9, 152, 84, 7, 83, 0,
8, 124, 0, 8, 60, 0, 9, 216, 82, 7,
23, 0, 8, 108, 0, 8, 44, 0, 9, 184,
0, 8, 12, 0, 8, 140, 0, 8, 76, 0,
9, 248, 80, 7, 3, 0, 8, 82, 0, 8,
18, 85, 8, 163, 83, 7, 35, 0, 8, 114,
0, 8, 50, 0, 9, 196, 81, 7, 11, 0,
8, 98, 0, 8, 34, 0, 9, 164, 0, 8,
2, 0, 8, 130, 0, 8, 66, 0, 9, 228,
80, 7, 7, 0, 8, 90, 0, 8, 26, 0,
9, 148, 84, 7, 67, 0, 8, 122, 0, 8,
58, 0, 9, 212, 82, 7, 19, 0, 8, 106,
0, 8, 42, 0, 9, 180, 0, 8, 10, 0,
8, 138, 0, 8, 74, 0, 9, 244, 80, 7,
5, 0, 8, 86, 0, 8, 22, 192, 8, 0,
83, 7, 51, 0, 8, 118, 0, 8, 54, 0,
9, 204, 81, 7, 15, 0, 8, 102, 0, 8,
38, 0, 9, 172, 0, 8, 6, 0, 8, 134,
0, 8, 70, 0, 9, 236, 80, 7, 9, 0,
8, 94, 0, 8, 30, 0, 9, 156, 84, 7,
99, 0, 8, 126, 0, 8, 62, 0, 9, 220,
82, 7, 27, 0, 8, 110, 0, 8, 46, 0,
9, 188, 0, 8, 14, 0, 8, 142, 0, 8,
78, 0, 9, 252, 96, 7, 256, 0, 8, 81,
0, 8, 17, 85, 8, 131, 82, 7, 31, 0,
8, 113, 0, 8, 49, 0, 9, 194, 80, 7,
10, 0, 8, 97, 0, 8, 33, 0, 9, 162,
0, 8, 1, 0, 8, 129, 0, 8, 65, 0,
9, 226, 80, 7, 6, 0, 8, 89, 0, 8,
25, 0, 9, 146, 83, 7, 59, 0, 8, 121,
0, 8, 57, 0, 9, 210, 81, 7, 17, 0,
8, 105, 0, 8, 41, 0, 9, 178, 0, 8,
9, 0, 8, 137, 0, 8, 73, 0, 9, 242,
80, 7, 4, 0, 8, 85, 0, 8, 21, 80,
8, 258, 83, 7, 43, 0, 8, 117, 0, 8,
53, 0, 9, 202, 81, 7, 13, 0, 8, 101,
0, 8, 37, 0, 9, 170, 0, 8, 5, 0,
8, 133, 0, 8, 69, 0, 9, 234, 80, 7,
8, 0, 8, 93, 0, 8, 29, 0, 9, 154,
84, 7, 83, 0, 8, 125, 0, 8, 61, 0,
9, 218, 82, 7, 23, 0, 8, 109, 0, 8,
45, 0, 9, 186, 0, 8, 13, 0, 8, 141,
0, 8, 77, 0, 9, 250, 80, 7, 3, 0,
8, 83, 0, 8, 19, 85, 8, 195, 83, 7,
35, 0, 8, 115, 0, 8, 51, 0, 9, 198,
81, 7, 11, 0, 8, 99, 0, 8, 35, 0,
9, 166, 0, 8, 3, 0, 8, 131, 0, 8,
67, 0, 9, 230, 80, 7, 7, 0, 8, 91,
0, 8, 27, 0, 9, 150, 84, 7, 67, 0,
8, 123, 0, 8, 59, 0, 9, 214, 82, 7,
19, 0, 8, 107, 0, 8, 43, 0, 9, 182,
0, 8, 11, 0, 8, 139, 0, 8, 75, 0,
9, 246, 80, 7, 5, 0, 8, 87, 0, 8,
23, 192, 8, 0, 83, 7, 51, 0, 8, 119,
0, 8, 55, 0, 9, 206, 81, 7, 15, 0,
8, 103, 0, 8, 39, 0, 9, 174, 0, 8,
7, 0, 8, 135, 0, 8, 71, 0, 9, 238,
80, 7, 9, 0, 8, 95, 0, 8, 31, 0,
9, 158, 84, 7, 99, 0, 8, 127, 0, 8,
63, 0, 9, 222, 82, 7, 27, 0, 8, 111,
0, 8, 47, 0, 9, 190, 0, 8, 15, 0,
8, 143, 0, 8, 79, 0, 9, 254, 96, 7,
256, 0, 8, 80, 0, 8, 16, 84, 8, 115,
82, 7, 31, 0, 8, 112, 0, 8, 48, 0,
9, 193, 80, 7, 10, 0, 8, 96, 0, 8,
32, 0, 9, 161, 0, 8, 0, 0, 8, 128,
0, 8, 64, 0, 9, 225, 80, 7, 6, 0,
8, 88, 0, 8, 24, 0, 9, 145, 83, 7,
59, 0, 8, 120, 0, 8, 56, 0, 9, 209,
81, 7, 17, 0, 8, 104, 0, 8, 40, 0,
9, 177, 0, 8, 8, 0, 8, 136, 0, 8,
72, 0, 9, 241, 80, 7, 4, 0, 8, 84,
0, 8, 20, 85, 8, 227, 83, 7, 43, 0,
8, 116, 0, 8, 52, 0, 9, 201, 81, 7,
13, 0, 8, 100, 0, 8, 36, 0, 9, 169,
0, 8, 4, 0, 8, 132, 0, 8, 68, 0,
9, 233, 80, 7, 8, 0, 8, 92, 0, 8,
28, 0, 9, 153, 84, 7, 83, 0, 8, 124,
0, 8, 60, 0, 9, 217, 82, 7, 23, 0,
8, 108, 0, 8, 44, 0, 9, 185, 0, 8,
12, 0, 8, 140, 0, 8, 76, 0, 9, 249,
80, 7, 3, 0, 8, 82, 0, 8, 18, 85,
8, 163, 83, 7, 35, 0, 8, 114, 0, 8,
50, 0, 9, 197, 81, 7, 11, 0, 8, 98,
0, 8, 34, 0, 9, 165, 0, 8, 2, 0,
8, 130, 0, 8, 66, 0, 9, 229, 80, 7,
7, 0, 8, 90, 0, 8, 26, 0, 9, 149,
84, 7, 67, 0, 8, 122, 0, 8, 58, 0,
9, 213, 82, 7, 19, 0, 8, 106, 0, 8,
42, 0, 9, 181, 0, 8, 10, 0, 8, 138,
0, 8, 74, 0, 9, 245, 80, 7, 5, 0,
8, 86, 0, 8, 22, 192, 8, 0, 83, 7,
51, 0, 8, 118, 0, 8, 54, 0, 9, 205,
81, 7, 15, 0, 8, 102, 0, 8, 38, 0,
9, 173, 0, 8, 6, 0, 8, 134, 0, 8,
70, 0, 9, 237, 80, 7, 9, 0, 8, 94,
0, 8, 30, 0, 9, 157, 84, 7, 99, 0,
8, 126, 0, 8, 62, 0, 9, 221, 82, 7,
27, 0, 8, 110, 0, 8, 46, 0, 9, 189,
0, 8, 14, 0, 8, 142, 0, 8, 78, 0,
9, 253, 96, 7, 256, 0, 8, 81, 0, 8,
17, 85, 8, 131, 82, 7, 31, 0, 8, 113,
0, 8, 49, 0, 9, 195, 80, 7, 10, 0,
8, 97, 0, 8, 33, 0, 9, 163, 0, 8,
1, 0, 8, 129, 0, 8, 65, 0, 9, 227,
80, 7, 6, 0, 8, 89, 0, 8, 25, 0,
9, 147, 83, 7, 59, 0, 8, 121, 0, 8,
57, 0, 9, 211, 81, 7, 17, 0, 8, 105,
0, 8, 41, 0, 9, 179, 0, 8, 9, 0,
8, 137, 0, 8, 73, 0, 9, 243, 80, 7,
4, 0, 8, 85, 0, 8, 21, 80, 8, 258,
83, 7, 43, 0, 8, 117, 0, 8, 53, 0,
9, 203, 81, 7, 13, 0, 8, 101, 0, 8,
37, 0, 9, 171, 0, 8, 5, 0, 8, 133,
0, 8, 69, 0, 9, 235, 80, 7, 8, 0,
8, 93, 0, 8, 29, 0, 9, 155, 84, 7,
83, 0, 8, 125, 0, 8, 61, 0, 9, 219,
82, 7, 23, 0, 8, 109, 0, 8, 45, 0,
9, 187, 0, 8, 13, 0, 8, 141, 0, 8,
77, 0, 9, 251, 80, 7, 3, 0, 8, 83,
0, 8, 19, 85, 8, 195, 83, 7, 35, 0,
8, 115, 0, 8, 51, 0, 9, 199, 81, 7,
11, 0, 8, 99, 0, 8, 35, 0, 9, 167,
0, 8, 3, 0, 8, 131, 0, 8, 67, 0,
9, 231, 80, 7, 7, 0, 8, 91, 0, 8,
27, 0, 9, 151, 84, 7, 67, 0, 8, 123,
0, 8, 59, 0, 9, 215, 82, 7, 19, 0,
8, 107, 0, 8, 43, 0, 9, 183, 0, 8,
11, 0, 8, 139, 0, 8, 75, 0, 9, 247,
80, 7, 5, 0, 8, 87, 0, 8, 23, 192,
8, 0, 83, 7, 51, 0, 8, 119, 0, 8,
55, 0, 9, 207, 81, 7, 15, 0, 8, 103,
0, 8, 39, 0, 9, 175, 0, 8, 7, 0,
8, 135, 0, 8, 71, 0, 9, 239, 80, 7,
9, 0, 8, 95, 0, 8, 31, 0, 9, 159,
84, 7, 99, 0, 8, 127, 0, 8, 63, 0,
9, 223, 82, 7, 27, 0, 8, 111, 0, 8,
47, 0, 9, 191, 0, 8, 15, 0, 8, 143,
0, 8, 79, 0, 9, 255
};
internal static readonly int[] fixed_td = new int[96]
{
80, 5, 1, 87, 5, 257, 83, 5, 17, 91,
5, 4097, 81, 5, 5, 89, 5, 1025, 85, 5,
65, 93, 5, 16385, 80, 5, 3, 88, 5, 513,
84, 5, 33, 92, 5, 8193, 82, 5, 9, 90,
5, 2049, 86, 5, 129, 192, 5, 24577, 80, 5,
2, 87, 5, 385, 83, 5, 25, 91, 5, 6145,
81, 5, 7, 89, 5, 1537, 85, 5, 97, 93,
5, 24577, 80, 5, 4, 88, 5, 769, 84, 5,
49, 92, 5, 12289, 82, 5, 13, 90, 5, 3073,
86, 5, 193, 192, 5, 24577
};
internal static readonly int[] cplens = new int[31]
{
3, 4, 5, 6, 7, 8, 9, 10, 11, 13,
15, 17, 19, 23, 27, 31, 35, 43, 51, 59,
67, 83, 99, 115, 131, 163, 195, 227, 258, 0,
0
};
internal static readonly int[] cplext = new int[31]
{
0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
4, 4, 4, 4, 5, 5, 5, 5, 0, 112,
112
};
internal static readonly int[] cpdist = new int[30]
{
1, 2, 3, 4, 5, 7, 9, 13, 17, 25,
33, 49, 65, 97, 129, 193, 257, 385, 513, 769,
1025, 1537, 2049, 3073, 4097, 6145, 8193, 12289, 16385, 24577
};
internal static readonly int[] cpdext = new int[30]
{
0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
4, 4, 5, 5, 6, 6, 7, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 13, 13
};
internal const int BMAX = 15;
internal static int huft_build(int[] b, int bindex, int n, int s, int[] d, int[] e, int[] t, int[] m, int[] hp, int[] hn, int[] v)
{
int[] array = new int[16];
int[] array2 = new int[3];
int[] array3 = new int[15];
int[] array4 = new int[16];
int num = 0;
int num2 = n;
do
{
array[b[bindex + num]]++;
num++;
num2--;
}
while (num2 != 0);
if (array[0] == n)
{
t[0] = -1;
m[0] = 0;
return 0;
}
int num3 = m[0];
int i;
for (i = 1; i <= 15 && array[i] == 0; i++)
{
}
int j = i;
if (num3 < i)
{
num3 = i;
}
num2 = 15;
while (num2 != 0 && array[num2] == 0)
{
num2--;
}
int num4 = num2;
if (num3 > num2)
{
num3 = num2;
}
m[0] = num3;
int num5 = 1 << i;
while (i < num2)
{
if ((num5 -= array[i]) < 0)
{
return -3;
}
i++;
num5 <<= 1;
}
if ((num5 -= array[num2]) < 0)
{
return -3;
}
array[num2] += num5;
i = (array4[1] = 0);
num = 1;
int num6 = 2;
while (--num2 != 0)
{
i = (array4[num6] = i + array[num]);
num6++;
num++;
}
num2 = 0;
num = 0;
do
{
if ((i = b[bindex + num]) != 0)
{
v[array4[i]++] = num2;
}
num++;
}
while (++num2 < n);
n = array4[num4];
num2 = (array4[0] = 0);
num = 0;
int num7 = -1;
int num8 = -num3;
array3[0] = 0;
int num9 = 0;
int num10 = 0;
for (; j <= num4; j++)
{
int num11 = array[j];
while (num11-- != 0)
{
int num12;
while (j > num8 + num3)
{
num7++;
num8 += num3;
num10 = num4 - num8;
num10 = ((num10 > num3) ? num3 : num10);
if ((num12 = 1 << (i = j - num8)) > num11 + 1)
{
num12 -= num11 + 1;
num6 = j;
if (i < num10)
{
while (++i < num10 && (num12 <<= 1) > array[++num6])
{
num12 -= array[num6];
}
}
}
num10 = 1 << i;
if (hn[0] + num10 > 1440)
{
return -3;
}
num9 = (array3[num7] = hn[0]);
hn[0] += num10;
if (num7 != 0)
{
array4[num7] = num2;
array2[0] = (byte)i;
array2[1] = (byte)num3;
i = SupportClass.URShift(num2, num8 - num3);
array2[2] = num9 - array3[num7 - 1] - i;
Array.Copy(array2, 0, hp, (array3[num7 - 1] + i) * 3, 3);
}
else
{
t[0] = num9;
}
}
array2[1] = (byte)(j - num8);
if (num >= n)
{
array2[0] = 192;
}
else if (v[num] < s)
{
array2[0] = (byte)((v[num] >= 256) ? 96 : 0);
array2[2] = v[num++];
}
else
{
array2[0] = (byte)(e[v[num] - s] + 16 + 64);
array2[2] = d[v[num++] - s];
}
num12 = 1 << j - num8;
for (i = SupportClass.URShift(num2, num8); i < num10; i += num12)
{
Array.Copy(array2, 0, hp, (num9 + i) * 3, 3);
}
i = 1 << j - 1;
while ((num2 & i) != 0)
{
num2 ^= i;
i = SupportClass.URShift(i, 1);
}
num2 ^= i;
int num13 = (1 << num8) - 1;
while ((num2 & num13) != array4[num7])
{
num7--;
num8 -= num3;
num13 = (1 << num8) - 1;
}
}
}
return (num5 != 0 && num4 != 1) ? (-5) : 0;
}
internal static int inflate_trees_bits(int[] c, int[] bb, int[] tb, int[] hp, ZStream z)
{
int[] hn = new int[1];
int[] v = new int[19];
int num = huft_build(c, 0, 19, 19, null, null, tb, bb, hp, hn, v);
if (num == -3)
{
z.msg = "oversubscribed dynamic bit lengths tree";
}
else if (num == -5 || bb[0] == 0)
{
z.msg = "incomplete dynamic bit lengths tree";
num = -3;
}
return num;
}
internal static int inflate_trees_dynamic(int nl, int nd, int[] c, int[] bl, int[] bd, int[] tl, int[] td, int[] hp, ZStream z)
{
int[] hn = new int[1];
int[] v = new int[288];
int num = huft_build(c, 0, nl, 257, cplens, cplext, tl, bl, hp, hn, v);
if (num != 0 || bl[0] == 0)
{
switch (num)
{
case -3:
z.msg = "oversubscribed literal/length tree";
break;
default:
z.msg = "incomplete literal/length tree";
num = -3;
break;
case -4:
break;
}
return num;
}
num = huft_build(c, nl, nd, 0, cpdist, cpdext, td, bd, hp, hn, v);
if (num != 0 || (bd[0] == 0 && nl > 257))
{
switch (num)
{
case -3:
z.msg = "oversubscribed distance tree";
break;
case -5:
z.msg = "incomplete distance tree";
num = -3;
break;
default:
z.msg = "empty distance tree with lengths";
num = -3;
break;
case -4:
break;
}
return num;
}
return 0;
}
internal static int inflate_trees_fixed(int[] bl, int[] bd, int[][] tl, int[][] td, ZStream z)
{
bl[0] = 9;
bd[0] = 5;
tl[0] = fixed_tl;
td[0] = fixed_td;
return 0;
}
}
using System;
namespace ComponentAce.Compression.Libs.zlib;
internal sealed class InfTree
{
private const int MANY = 1440;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
internal const int fixed_bl = 9;
internal const int fixed_bd = 5;
internal static readonly int[] fixed_tl = new int[1536]
{
96, 7, 256, 0, 8, 80, 0, 8, 16, 84,
8, 115, 82, 7, 31, 0, 8, 112, 0, 8,
48, 0, 9, 192, 80, 7, 10, 0, 8, 96,
0, 8, 32, 0, 9, 160, 0, 8, 0, 0,
8, 128, 0, 8, 64, 0, 9, 224, 80, 7,
6, 0, 8, 88, 0, 8, 24, 0, 9, 144,
83, 7, 59, 0, 8, 120, 0, 8, 56, 0,
9, 208, 81, 7, 17, 0, 8, 104, 0, 8,
40, 0, 9, 176, 0, 8, 8, 0, 8, 136,
0, 8, 72, 0, 9, 240, 80, 7, 4, 0,
8, 84, 0, 8, 20, 85, 8, 227, 83, 7,
43, 0, 8, 116, 0, 8, 52, 0, 9, 200,
81, 7, 13, 0, 8, 100, 0, 8, 36, 0,
9, 168, 0, 8, 4, 0, 8, 132, 0, 8,
68, 0, 9, 232, 80, 7, 8, 0, 8, 92,
0, 8, 28, 0, 9, 152, 84, 7, 83, 0,
8, 124, 0, 8, 60, 0, 9, 216, 82, 7,
23, 0, 8, 108, 0, 8, 44, 0, 9, 184,
0, 8, 12, 0, 8, 140, 0, 8, 76, 0,
9, 248, 80, 7, 3, 0, 8, 82, 0, 8,
18, 85, 8, 163, 83, 7, 35, 0, 8, 114,
0, 8, 50, 0, 9, 196, 81, 7, 11, 0,
8, 98, 0, 8, 34, 0, 9, 164, 0, 8,
2, 0, 8, 130, 0, 8, 66, 0, 9, 228,
80, 7, 7, 0, 8, 90, 0, 8, 26, 0,
9, 148, 84, 7, 67, 0, 8, 122, 0, 8,
58, 0, 9, 212, 82, 7, 19, 0, 8, 106,
0, 8, 42, 0, 9, 180, 0, 8, 10, 0,
8, 138, 0, 8, 74, 0, 9, 244, 80, 7,
5, 0, 8, 86, 0, 8, 22, 192, 8, 0,
83, 7, 51, 0, 8, 118, 0, 8, 54, 0,
9, 204, 81, 7, 15, 0, 8, 102, 0, 8,
38, 0, 9, 172, 0, 8, 6, 0, 8, 134,
0, 8, 70, 0, 9, 236, 80, 7, 9, 0,
8, 94, 0, 8, 30, 0, 9, 156, 84, 7,
99, 0, 8, 126, 0, 8, 62, 0, 9, 220,
82, 7, 27, 0, 8, 110, 0, 8, 46, 0,
9, 188, 0, 8, 14, 0, 8, 142, 0, 8,
78, 0, 9, 252, 96, 7, 256, 0, 8, 81,
0, 8, 17, 85, 8, 131, 82, 7, 31, 0,
8, 113, 0, 8, 49, 0, 9, 194, 80, 7,
10, 0, 8, 97, 0, 8, 33, 0, 9, 162,
0, 8, 1, 0, 8, 129, 0, 8, 65, 0,
9, 226, 80, 7, 6, 0, 8, 89, 0, 8,
25, 0, 9, 146, 83, 7, 59, 0, 8, 121,
0, 8, 57, 0, 9, 210, 81, 7, 17, 0,
8, 105, 0, 8, 41, 0, 9, 178, 0, 8,
9, 0, 8, 137, 0, 8, 73, 0, 9, 242,
80, 7, 4, 0, 8, 85, 0, 8, 21, 80,
8, 258, 83, 7, 43, 0, 8, 117, 0, 8,
53, 0, 9, 202, 81, 7, 13, 0, 8, 101,
0, 8, 37, 0, 9, 170, 0, 8, 5, 0,
8, 133, 0, 8, 69, 0, 9, 234, 80, 7,
8, 0, 8, 93, 0, 8, 29, 0, 9, 154,
84, 7, 83, 0, 8, 125, 0, 8, 61, 0,
9, 218, 82, 7, 23, 0, 8, 109, 0, 8,
45, 0, 9, 186, 0, 8, 13, 0, 8, 141,
0, 8, 77, 0, 9, 250, 80, 7, 3, 0,
8, 83, 0, 8, 19, 85, 8, 195, 83, 7,
35, 0, 8, 115, 0, 8, 51, 0, 9, 198,
81, 7, 11, 0, 8, 99, 0, 8, 35, 0,
9, 166, 0, 8, 3, 0, 8, 131, 0, 8,
67, 0, 9, 230, 80, 7, 7, 0, 8, 91,
0, 8, 27, 0, 9, 150, 84, 7, 67, 0,
8, 123, 0, 8, 59, 0, 9, 214, 82, 7,
19, 0, 8, 107, 0, 8, 43, 0, 9, 182,
0, 8, 11, 0, 8, 139, 0, 8, 75, 0,
9, 246, 80, 7, 5, 0, 8, 87, 0, 8,
23, 192, 8, 0, 83, 7, 51, 0, 8, 119,
0, 8, 55, 0, 9, 206, 81, 7, 15, 0,
8, 103, 0, 8, 39, 0, 9, 174, 0, 8,
7, 0, 8, 135, 0, 8, 71, 0, 9, 238,
80, 7, 9, 0, 8, 95, 0, 8, 31, 0,
9, 158, 84, 7, 99, 0, 8, 127, 0, 8,
63, 0, 9, 222, 82, 7, 27, 0, 8, 111,
0, 8, 47, 0, 9, 190, 0, 8, 15, 0,
8, 143, 0, 8, 79, 0, 9, 254, 96, 7,
256, 0, 8, 80, 0, 8, 16, 84, 8, 115,
82, 7, 31, 0, 8, 112, 0, 8, 48, 0,
9, 193, 80, 7, 10, 0, 8, 96, 0, 8,
32, 0, 9, 161, 0, 8, 0, 0, 8, 128,
0, 8, 64, 0, 9, 225, 80, 7, 6, 0,
8, 88, 0, 8, 24, 0, 9, 145, 83, 7,
59, 0, 8, 120, 0, 8, 56, 0, 9, 209,
81, 7, 17, 0, 8, 104, 0, 8, 40, 0,
9, 177, 0, 8, 8, 0, 8, 136, 0, 8,
72, 0, 9, 241, 80, 7, 4, 0, 8, 84,
0, 8, 20, 85, 8, 227, 83, 7, 43, 0,
8, 116, 0, 8, 52, 0, 9, 201, 81, 7,
13, 0, 8, 100, 0, 8, 36, 0, 9, 169,
0, 8, 4, 0, 8, 132, 0, 8, 68, 0,
9, 233, 80, 7, 8, 0, 8, 92, 0, 8,
28, 0, 9, 153, 84, 7, 83, 0, 8, 124,
0, 8, 60, 0, 9, 217, 82, 7, 23, 0,
8, 108, 0, 8, 44, 0, 9, 185, 0, 8,
12, 0, 8, 140, 0, 8, 76, 0, 9, 249,
80, 7, 3, 0, 8, 82, 0, 8, 18, 85,
8, 163, 83, 7, 35, 0, 8, 114, 0, 8,
50, 0, 9, 197, 81, 7, 11, 0, 8, 98,
0, 8, 34, 0, 9, 165, 0, 8, 2, 0,
8, 130, 0, 8, 66, 0, 9, 229, 80, 7,
7, 0, 8, 90, 0, 8, 26, 0, 9, 149,
84, 7, 67, 0, 8, 122, 0, 8, 58, 0,
9, 213, 82, 7, 19, 0, 8, 106, 0, 8,
42, 0, 9, 181, 0, 8, 10, 0, 8, 138,
0, 8, 74, 0, 9, 245, 80, 7, 5, 0,
8, 86, 0, 8, 22, 192, 8, 0, 83, 7,
51, 0, 8, 118, 0, 8, 54, 0, 9, 205,
81, 7, 15, 0, 8, 102, 0, 8, 38, 0,
9, 173, 0, 8, 6, 0, 8, 134, 0, 8,
70, 0, 9, 237, 80, 7, 9, 0, 8, 94,
0, 8, 30, 0, 9, 157, 84, 7, 99, 0,
8, 126, 0, 8, 62, 0, 9, 221, 82, 7,
27, 0, 8, 110, 0, 8, 46, 0, 9, 189,
0, 8, 14, 0, 8, 142, 0, 8, 78, 0,
9, 253, 96, 7, 256, 0, 8, 81, 0, 8,
17, 85, 8, 131, 82, 7, 31, 0, 8, 113,
0, 8, 49, 0, 9, 195, 80, 7, 10, 0,
8, 97, 0, 8, 33, 0, 9, 163, 0, 8,
1, 0, 8, 129, 0, 8, 65, 0, 9, 227,
80, 7, 6, 0, 8, 89, 0, 8, 25, 0,
9, 147, 83, 7, 59, 0, 8, 121, 0, 8,
57, 0, 9, 211, 81, 7, 17, 0, 8, 105,
0, 8, 41, 0, 9, 179, 0, 8, 9, 0,
8, 137, 0, 8, 73, 0, 9, 243, 80, 7,
4, 0, 8, 85, 0, 8, 21, 80, 8, 258,
83, 7, 43, 0, 8, 117, 0, 8, 53, 0,
9, 203, 81, 7, 13, 0, 8, 101, 0, 8,
37, 0, 9, 171, 0, 8, 5, 0, 8, 133,
0, 8, 69, 0, 9, 235, 80, 7, 8, 0,
8, 93, 0, 8, 29, 0, 9, 155, 84, 7,
83, 0, 8, 125, 0, 8, 61, 0, 9, 219,
82, 7, 23, 0, 8, 109, 0, 8, 45, 0,
9, 187, 0, 8, 13, 0, 8, 141, 0, 8,
77, 0, 9, 251, 80, 7, 3, 0, 8, 83,
0, 8, 19, 85, 8, 195, 83, 7, 35, 0,
8, 115, 0, 8, 51, 0, 9, 199, 81, 7,
11, 0, 8, 99, 0, 8, 35, 0, 9, 167,
0, 8, 3, 0, 8, 131, 0, 8, 67, 0,
9, 231, 80, 7, 7, 0, 8, 91, 0, 8,
27, 0, 9, 151, 84, 7, 67, 0, 8, 123,
0, 8, 59, 0, 9, 215, 82, 7, 19, 0,
8, 107, 0, 8, 43, 0, 9, 183, 0, 8,
11, 0, 8, 139, 0, 8, 75, 0, 9, 247,
80, 7, 5, 0, 8, 87, 0, 8, 23, 192,
8, 0, 83, 7, 51, 0, 8, 119, 0, 8,
55, 0, 9, 207, 81, 7, 15, 0, 8, 103,
0, 8, 39, 0, 9, 175, 0, 8, 7, 0,
8, 135, 0, 8, 71, 0, 9, 239, 80, 7,
9, 0, 8, 95, 0, 8, 31, 0, 9, 159,
84, 7, 99, 0, 8, 127, 0, 8, 63, 0,
9, 223, 82, 7, 27, 0, 8, 111, 0, 8,
47, 0, 9, 191, 0, 8, 15, 0, 8, 143,
0, 8, 79, 0, 9, 255
};
internal static readonly int[] fixed_td = new int[96]
{
80, 5, 1, 87, 5, 257, 83, 5, 17, 91,
5, 4097, 81, 5, 5, 89, 5, 1025, 85, 5,
65, 93, 5, 16385, 80, 5, 3, 88, 5, 513,
84, 5, 33, 92, 5, 8193, 82, 5, 9, 90,
5, 2049, 86, 5, 129, 192, 5, 24577, 80, 5,
2, 87, 5, 385, 83, 5, 25, 91, 5, 6145,
81, 5, 7, 89, 5, 1537, 85, 5, 97, 93,
5, 24577, 80, 5, 4, 88, 5, 769, 84, 5,
49, 92, 5, 12289, 82, 5, 13, 90, 5, 3073,
86, 5, 193, 192, 5, 24577
};
internal static readonly int[] cplens = new int[31]
{
3, 4, 5, 6, 7, 8, 9, 10, 11, 13,
15, 17, 19, 23, 27, 31, 35, 43, 51, 59,
67, 83, 99, 115, 131, 163, 195, 227, 258, 0,
0
};
internal static readonly int[] cplext = new int[31]
{
0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
4, 4, 4, 4, 5, 5, 5, 5, 0, 112,
112
};
internal static readonly int[] cpdist = new int[30]
{
1, 2, 3, 4, 5, 7, 9, 13, 17, 25,
33, 49, 65, 97, 129, 193, 257, 385, 513, 769,
1025, 1537, 2049, 3073, 4097, 6145, 8193, 12289, 16385, 24577
};
internal static readonly int[] cpdext = new int[30]
{
0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
4, 4, 5, 5, 6, 6, 7, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 13, 13
};
internal const int BMAX = 15;
internal static int huft_build(int[] b, int bindex, int n, int s, int[] d, int[] e, int[] t, int[] m, int[] hp, int[] hn, int[] v)
{
int[] array = new int[16];
int[] array2 = new int[3];
int[] array3 = new int[15];
int[] array4 = new int[16];
int num = 0;
int num2 = n;
do
{
array[b[bindex + num]]++;
num++;
num2--;
}
while (num2 != 0);
if (array[0] == n)
{
t[0] = -1;
m[0] = 0;
return 0;
}
int num3 = m[0];
int i;
for (i = 1; i <= 15 && array[i] == 0; i++)
{
}
int j = i;
if (num3 < i)
{
num3 = i;
}
num2 = 15;
while (num2 != 0 && array[num2] == 0)
{
num2--;
}
int num4 = num2;
if (num3 > num2)
{
num3 = num2;
}
m[0] = num3;
int num5 = 1 << i;
while (i < num2)
{
if ((num5 -= array[i]) < 0)
{
return -3;
}
i++;
num5 <<= 1;
}
if ((num5 -= array[num2]) < 0)
{
return -3;
}
array[num2] += num5;
i = (array4[1] = 0);
num = 1;
int num6 = 2;
while (--num2 != 0)
{
i = (array4[num6] = i + array[num]);
num6++;
num++;
}
num2 = 0;
num = 0;
do
{
if ((i = b[bindex + num]) != 0)
{
v[array4[i]++] = num2;
}
num++;
}
while (++num2 < n);
n = array4[num4];
num2 = (array4[0] = 0);
num = 0;
int num7 = -1;
int num8 = -num3;
array3[0] = 0;
int num9 = 0;
int num10 = 0;
for (; j <= num4; j++)
{
int num11 = array[j];
while (num11-- != 0)
{
int num12;
while (j > num8 + num3)
{
num7++;
num8 += num3;
num10 = num4 - num8;
num10 = ((num10 > num3) ? num3 : num10);
if ((num12 = 1 << (i = j - num8)) > num11 + 1)
{
num12 -= num11 + 1;
num6 = j;
if (i < num10)
{
while (++i < num10 && (num12 <<= 1) > array[++num6])
{
num12 -= array[num6];
}
}
}
num10 = 1 << i;
if (hn[0] + num10 > 1440)
{
return -3;
}
num9 = (array3[num7] = hn[0]);
hn[0] += num10;
if (num7 != 0)
{
array4[num7] = num2;
array2[0] = (byte)i;
array2[1] = (byte)num3;
i = SupportClass.URShift(num2, num8 - num3);
array2[2] = num9 - array3[num7 - 1] - i;
Array.Copy(array2, 0, hp, (array3[num7 - 1] + i) * 3, 3);
}
else
{
t[0] = num9;
}
}
array2[1] = (byte)(j - num8);
if (num >= n)
{
array2[0] = 192;
}
else if (v[num] < s)
{
array2[0] = (byte)((v[num] >= 256) ? 96 : 0);
array2[2] = v[num++];
}
else
{
array2[0] = (byte)(e[v[num] - s] + 16 + 64);
array2[2] = d[v[num++] - s];
}
num12 = 1 << j - num8;
for (i = SupportClass.URShift(num2, num8); i < num10; i += num12)
{
Array.Copy(array2, 0, hp, (num9 + i) * 3, 3);
}
i = 1 << j - 1;
while ((num2 & i) != 0)
{
num2 ^= i;
i = SupportClass.URShift(i, 1);
}
num2 ^= i;
int num13 = (1 << num8) - 1;
while ((num2 & num13) != array4[num7])
{
num7--;
num8 -= num3;
num13 = (1 << num8) - 1;
}
}
}
if (num5 == 0 || num4 == 1)
{
return 0;
}
return -5;
}
internal static int inflate_trees_bits(int[] c, int[] bb, int[] tb, int[] hp, ZStream z)
{
int[] hn = new int[1];
int[] v = new int[19];
int num = huft_build(c, 0, 19, 19, null, null, tb, bb, hp, hn, v);
if (num == -3)
{
z.msg = "oversubscribed dynamic bit lengths tree";
}
else if (num == -5 || bb[0] == 0)
{
z.msg = "incomplete dynamic bit lengths tree";
num = -3;
}
return num;
}
internal static int inflate_trees_dynamic(int nl, int nd, int[] c, int[] bl, int[] bd, int[] tl, int[] td, int[] hp, ZStream z)
{
int[] hn = new int[1];
int[] v = new int[288];
int num = huft_build(c, 0, nl, 257, cplens, cplext, tl, bl, hp, hn, v);
if (num != 0 || bl[0] == 0)
{
switch (num)
{
case -3:
z.msg = "oversubscribed literal/length tree";
break;
default:
z.msg = "incomplete literal/length tree";
num = -3;
break;
case -4:
break;
}
return num;
}
num = huft_build(c, nl, nd, 0, cpdist, cpdext, td, bd, hp, hn, v);
if (num != 0 || (bd[0] == 0 && nl > 257))
{
switch (num)
{
case -3:
z.msg = "oversubscribed distance tree";
break;
case -5:
z.msg = "incomplete distance tree";
num = -3;
break;
default:
z.msg = "empty distance tree with lengths";
num = -3;
break;
case -4:
break;
}
return num;
}
return 0;
}
internal static int inflate_trees_fixed(int[] bl, int[] bd, int[][] tl, int[][] td, ZStream z)
{
bl[0] = 9;
bd[0] = 5;
tl[0] = fixed_tl;
td[0] = fixed_td;
return 0;
}
}

815
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/Inflate.cs
View File

@ -1,409 +1,408 @@
namespace ComponentAce.Compression.Libs.zlib
{
internal sealed class Inflate
{
private const int MAX_WBITS = 15;
private const int PRESET_DICT = 32;
internal const int Z_NO_FLUSH = 0;
internal const int Z_PARTIAL_FLUSH = 1;
internal const int Z_SYNC_FLUSH = 2;
internal const int Z_FULL_FLUSH = 3;
internal const int Z_FINISH = 4;
private const int Z_DEFLATED = 8;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
private const int METHOD = 0;
private const int FLAG = 1;
private const int DICT4 = 2;
private const int DICT3 = 3;
private const int DICT2 = 4;
private const int DICT1 = 5;
private const int DICT0 = 6;
private const int BLOCKS = 7;
private const int CHECK4 = 8;
private const int CHECK3 = 9;
private const int CHECK2 = 10;
private const int CHECK1 = 11;
private const int DONE = 12;
private const int BAD = 13;
internal int mode;
internal int method;
internal long[] was = new long[1];
internal long need;
internal int marker;
internal int nowrap;
internal int wbits;
internal InfBlocks blocks;
private static byte[] mark = new byte[4]
{
0,
0,
(byte)SupportClass.Identity(255L),
(byte)SupportClass.Identity(255L)
};
internal int inflateReset(ZStream z)
{
if (z == null || z.istate == null)
{
return -2;
}
z.total_in = (z.total_out = 0L);
z.msg = null;
z.istate.mode = ((z.istate.nowrap != 0) ? 7 : 0);
z.istate.blocks.reset(z, null);
return 0;
}
internal int inflateEnd(ZStream z)
{
if (blocks != null)
{
blocks.free(z);
}
blocks = null;
return 0;
}
internal int inflateInit(ZStream z, int w)
{
z.msg = null;
blocks = null;
nowrap = 0;
if (w < 0)
{
w = -w;
nowrap = 1;
}
if (w < 8 || w > 15)
{
inflateEnd(z);
return -2;
}
wbits = w;
z.istate.blocks = new InfBlocks(z, (z.istate.nowrap != 0) ? null : this, 1 << w);
inflateReset(z);
return 0;
}
internal int inflate(ZStream z, int f)
{
if (z == null || z.istate == null || z.next_in == null)
{
return -2;
}
f = ((f == 4) ? (-5) : 0);
int num = -5;
while (true)
{
switch (z.istate.mode)
{
case 0:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
if (((z.istate.method = z.next_in[z.next_in_index++]) & 0xF) != 8)
{
z.istate.mode = 13;
z.msg = "unknown compression method";
z.istate.marker = 5;
break;
}
if ((z.istate.method >> 4) + 8 > z.istate.wbits)
{
z.istate.mode = 13;
z.msg = "invalid window size";
z.istate.marker = 5;
break;
}
z.istate.mode = 1;
goto case 1;
case 1:
{
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
int num2 = z.next_in[z.next_in_index++] & 0xFF;
if (((z.istate.method << 8) + num2) % 31 != 0)
{
z.istate.mode = 13;
z.msg = "incorrect header check";
z.istate.marker = 5;
break;
}
if ((num2 & 0x20) == 0)
{
z.istate.mode = 7;
break;
}
z.istate.mode = 2;
goto case 2;
}
case 2:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need = ((z.next_in[z.next_in_index++] & 0xFF) << 24) & -16777216;
z.istate.mode = 3;
goto case 3;
case 3:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 16) & 0xFF0000uL);
z.istate.mode = 4;
goto case 4;
case 4:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 8) & 0xFF00uL);
z.istate.mode = 5;
goto case 5;
case 5:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)z.next_in[z.next_in_index++] & 0xFFuL);
z.adler = z.istate.need;
z.istate.mode = 6;
return 2;
case 6:
z.istate.mode = 13;
z.msg = "need dictionary";
z.istate.marker = 0;
return -2;
case 7:
num = z.istate.blocks.proc(z, num);
switch (num)
{
case -3:
z.istate.mode = 13;
z.istate.marker = 0;
goto end_IL_004b;
case 0:
num = f;
break;
}
if (num != 1)
{
return num;
}
num = f;
z.istate.blocks.reset(z, z.istate.was);
if (z.istate.nowrap != 0)
{
z.istate.mode = 12;
break;
}
z.istate.mode = 8;
goto case 8;
case 8:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need = ((z.next_in[z.next_in_index++] & 0xFF) << 24) & -16777216;
z.istate.mode = 9;
goto case 9;
case 9:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 16) & 0xFF0000uL);
z.istate.mode = 10;
goto case 10;
case 10:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 8) & 0xFF00uL);
z.istate.mode = 11;
goto case 11;
case 11:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)z.next_in[z.next_in_index++] & 0xFFuL);
if ((int)z.istate.was[0] != (int)z.istate.need)
{
z.istate.mode = 13;
z.msg = "incorrect data check";
z.istate.marker = 5;
break;
}
z.istate.mode = 12;
goto case 12;
case 12:
return 1;
case 13:
return -3;
default:
{
return -2;
}
end_IL_004b:
break;
}
}
}
internal int inflateSetDictionary(ZStream z, byte[] dictionary, int dictLength)
{
int start = 0;
int num = dictLength;
if (z == null || z.istate == null || z.istate.mode != 6)
{
return -2;
}
if (z._adler.adler32(1L, dictionary, 0, dictLength) != z.adler)
{
return -3;
}
z.adler = z._adler.adler32(0L, null, 0, 0);
if (num >= 1 << z.istate.wbits)
{
num = (1 << z.istate.wbits) - 1;
start = dictLength - num;
}
z.istate.blocks.set_dictionary(dictionary, start, num);
z.istate.mode = 7;
return 0;
}
internal int inflateSync(ZStream z)
{
if (z == null || z.istate == null)
{
return -2;
}
if (z.istate.mode != 13)
{
z.istate.mode = 13;
z.istate.marker = 0;
}
int num;
if ((num = z.avail_in) == 0)
{
return -5;
}
int num2 = z.next_in_index;
int num3 = z.istate.marker;
while (num != 0 && num3 < 4)
{
num3 = ((z.next_in[num2] != mark[num3]) ? ((z.next_in[num2] == 0) ? (4 - num3) : 0) : (num3 + 1));
num2++;
num--;
}
z.total_in += num2 - z.next_in_index;
z.next_in_index = num2;
z.avail_in = num;
z.istate.marker = num3;
if (num3 != 4)
{
return -3;
}
long total_in = z.total_in;
long total_out = z.total_out;
inflateReset(z);
z.total_in = total_in;
z.total_out = total_out;
z.istate.mode = 7;
return 0;
}
internal int inflateSyncPoint(ZStream z)
{
if (z == null || z.istate == null || z.istate.blocks == null)
{
return -2;
}
return z.istate.blocks.sync_point();
}
}
namespace ComponentAce.Compression.Libs.zlib;
internal sealed class Inflate
{
private const int MAX_WBITS = 15;
private const int PRESET_DICT = 32;
internal const int Z_NO_FLUSH = 0;
internal const int Z_PARTIAL_FLUSH = 1;
internal const int Z_SYNC_FLUSH = 2;
internal const int Z_FULL_FLUSH = 3;
internal const int Z_FINISH = 4;
private const int Z_DEFLATED = 8;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
private const int METHOD = 0;
private const int FLAG = 1;
private const int DICT4 = 2;
private const int DICT3 = 3;
private const int DICT2 = 4;
private const int DICT1 = 5;
private const int DICT0 = 6;
private const int BLOCKS = 7;
private const int CHECK4 = 8;
private const int CHECK3 = 9;
private const int CHECK2 = 10;
private const int CHECK1 = 11;
private const int DONE = 12;
private const int BAD = 13;
internal int mode;
internal int method;
internal long[] was = new long[1];
internal long need;
internal int marker;
internal int nowrap;
internal int wbits;
internal InfBlocks blocks;
private static byte[] mark = new byte[4]
{
0,
0,
(byte)SupportClass.Identity(255L),
(byte)SupportClass.Identity(255L)
};
internal int inflateReset(ZStream z)
{
if (z == null || z.istate == null)
{
return -2;
}
z.total_in = (z.total_out = 0L);
z.msg = null;
z.istate.mode = ((z.istate.nowrap != 0) ? 7 : 0);
z.istate.blocks.reset(z, null);
return 0;
}
internal int inflateEnd(ZStream z)
{
if (blocks != null)
{
blocks.free(z);
}
blocks = null;
return 0;
}
internal int inflateInit(ZStream z, int w)
{
z.msg = null;
blocks = null;
nowrap = 0;
if (w < 0)
{
w = -w;
nowrap = 1;
}
if (w < 8 || w > 15)
{
inflateEnd(z);
return -2;
}
wbits = w;
z.istate.blocks = new InfBlocks(z, (z.istate.nowrap != 0) ? null : this, 1 << w);
inflateReset(z);
return 0;
}
internal int inflate(ZStream z, int f)
{
if (z == null || z.istate == null || z.next_in == null)
{
return -2;
}
f = ((f == 4) ? (-5) : 0);
int num = -5;
while (true)
{
switch (z.istate.mode)
{
case 0:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
if (((z.istate.method = z.next_in[z.next_in_index++]) & 0xF) != 8)
{
z.istate.mode = 13;
z.msg = "unknown compression method";
z.istate.marker = 5;
break;
}
if ((z.istate.method >> 4) + 8 > z.istate.wbits)
{
z.istate.mode = 13;
z.msg = "invalid window size";
z.istate.marker = 5;
break;
}
z.istate.mode = 1;
goto case 1;
case 1:
{
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
int num2 = z.next_in[z.next_in_index++] & 0xFF;
if (((z.istate.method << 8) + num2) % 31 != 0)
{
z.istate.mode = 13;
z.msg = "incorrect header check";
z.istate.marker = 5;
break;
}
if ((num2 & 0x20) == 0)
{
z.istate.mode = 7;
break;
}
z.istate.mode = 2;
goto case 2;
}
case 2:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need = ((z.next_in[z.next_in_index++] & 0xFF) << 24) & -16777216;
z.istate.mode = 3;
goto case 3;
case 3:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 16) & 0xFF0000uL);
z.istate.mode = 4;
goto case 4;
case 4:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 8) & 0xFF00uL);
z.istate.mode = 5;
goto case 5;
case 5:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)z.next_in[z.next_in_index++] & 0xFFuL);
z.adler = z.istate.need;
z.istate.mode = 6;
return 2;
case 6:
z.istate.mode = 13;
z.msg = "need dictionary";
z.istate.marker = 0;
return -2;
case 7:
num = z.istate.blocks.proc(z, num);
switch (num)
{
case -3:
z.istate.mode = 13;
z.istate.marker = 0;
goto end_IL_0031;
case 0:
num = f;
break;
}
if (num != 1)
{
return num;
}
num = f;
z.istate.blocks.reset(z, z.istate.was);
if (z.istate.nowrap != 0)
{
z.istate.mode = 12;
break;
}
z.istate.mode = 8;
goto case 8;
case 8:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need = ((z.next_in[z.next_in_index++] & 0xFF) << 24) & -16777216;
z.istate.mode = 9;
goto case 9;
case 9:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 16) & 0xFF0000uL);
z.istate.mode = 10;
goto case 10;
case 10:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)((z.next_in[z.next_in_index++] & 0xFF) << 8) & 0xFF00uL);
z.istate.mode = 11;
goto case 11;
case 11:
if (z.avail_in == 0)
{
return num;
}
num = f;
z.avail_in--;
z.total_in++;
z.istate.need += (long)((ulong)z.next_in[z.next_in_index++] & 0xFFuL);
if ((int)z.istate.was[0] != (int)z.istate.need)
{
z.istate.mode = 13;
z.msg = "incorrect data check";
z.istate.marker = 5;
break;
}
z.istate.mode = 12;
goto case 12;
case 12:
return 1;
case 13:
return -3;
default:
{
return -2;
}
end_IL_0031:
break;
}
}
}
internal int inflateSetDictionary(ZStream z, byte[] dictionary, int dictLength)
{
int start = 0;
int num = dictLength;
if (z == null || z.istate == null || z.istate.mode != 6)
{
return -2;
}
if (z._adler.adler32(1L, dictionary, 0, dictLength) != z.adler)
{
return -3;
}
z.adler = z._adler.adler32(0L, null, 0, 0);
if (num >= 1 << z.istate.wbits)
{
num = (1 << z.istate.wbits) - 1;
start = dictLength - num;
}
z.istate.blocks.set_dictionary(dictionary, start, num);
z.istate.mode = 7;
return 0;
}
internal int inflateSync(ZStream z)
{
if (z == null || z.istate == null)
{
return -2;
}
if (z.istate.mode != 13)
{
z.istate.mode = 13;
z.istate.marker = 0;
}
int num;
if ((num = z.avail_in) == 0)
{
return -5;
}
int num2 = z.next_in_index;
int num3 = z.istate.marker;
while (num != 0 && num3 < 4)
{
num3 = ((z.next_in[num2] != mark[num3]) ? ((z.next_in[num2] == 0) ? (4 - num3) : 0) : (num3 + 1));
num2++;
num--;
}
z.total_in += num2 - z.next_in_index;
z.next_in_index = num2;
z.avail_in = num;
z.istate.marker = num3;
if (num3 != 4)
{
return -3;
}
long total_in = z.total_in;
long total_out = z.total_out;
inflateReset(z);
z.total_in = total_in;
z.total_out = total_out;
z.istate.mode = 7;
return 0;
}
internal int inflateSyncPoint(ZStream z)
{
if (z == null || z.istate == null || z.istate.blocks == null)
{
return -2;
}
return z.istate.blocks.sync_point();
}
}

249
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/StaticTree.cs
View File

@ -1,126 +1,125 @@
namespace ComponentAce.Compression.Libs.zlib
{
internal sealed class StaticTree
{
private const int MAX_BITS = 15;
private const int BL_CODES = 19;
private const int D_CODES = 30;
private const int LITERALS = 256;
private const int LENGTH_CODES = 29;
private static readonly int L_CODES;
internal const int MAX_BL_BITS = 7;
internal static readonly short[] static_ltree;
internal static readonly short[] static_dtree;
internal static StaticTree static_l_desc;
internal static StaticTree static_d_desc;
internal static StaticTree static_bl_desc;
internal short[] static_tree;
internal int[] extra_bits;
internal int extra_base;
internal int elems;
internal int max_length;
internal StaticTree(short[] static_tree, int[] extra_bits, int extra_base, int elems, int max_length)
{
this.static_tree = static_tree;
this.extra_bits = extra_bits;
this.extra_base = extra_base;
this.elems = elems;
this.max_length = max_length;
}
static StaticTree()
{
L_CODES = 286;
static_ltree = new short[576]
{
12, 8, 140, 8, 76, 8, 204, 8, 44, 8,
172, 8, 108, 8, 236, 8, 28, 8, 156, 8,
92, 8, 220, 8, 60, 8, 188, 8, 124, 8,
252, 8, 2, 8, 130, 8, 66, 8, 194, 8,
34, 8, 162, 8, 98, 8, 226, 8, 18, 8,
146, 8, 82, 8, 210, 8, 50, 8, 178, 8,
114, 8, 242, 8, 10, 8, 138, 8, 74, 8,
202, 8, 42, 8, 170, 8, 106, 8, 234, 8,
26, 8, 154, 8, 90, 8, 218, 8, 58, 8,
186, 8, 122, 8, 250, 8, 6, 8, 134, 8,
70, 8, 198, 8, 38, 8, 166, 8, 102, 8,
230, 8, 22, 8, 150, 8, 86, 8, 214, 8,
54, 8, 182, 8, 118, 8, 246, 8, 14, 8,
142, 8, 78, 8, 206, 8, 46, 8, 174, 8,
110, 8, 238, 8, 30, 8, 158, 8, 94, 8,
222, 8, 62, 8, 190, 8, 126, 8, 254, 8,
1, 8, 129, 8, 65, 8, 193, 8, 33, 8,
161, 8, 97, 8, 225, 8, 17, 8, 145, 8,
81, 8, 209, 8, 49, 8, 177, 8, 113, 8,
241, 8, 9, 8, 137, 8, 73, 8, 201, 8,
41, 8, 169, 8, 105, 8, 233, 8, 25, 8,
153, 8, 89, 8, 217, 8, 57, 8, 185, 8,
121, 8, 249, 8, 5, 8, 133, 8, 69, 8,
197, 8, 37, 8, 165, 8, 101, 8, 229, 8,
21, 8, 149, 8, 85, 8, 213, 8, 53, 8,
181, 8, 117, 8, 245, 8, 13, 8, 141, 8,
77, 8, 205, 8, 45, 8, 173, 8, 109, 8,
237, 8, 29, 8, 157, 8, 93, 8, 221, 8,
61, 8, 189, 8, 125, 8, 253, 8, 19, 9,
275, 9, 147, 9, 403, 9, 83, 9, 339, 9,
211, 9, 467, 9, 51, 9, 307, 9, 179, 9,
435, 9, 115, 9, 371, 9, 243, 9, 499, 9,
11, 9, 267, 9, 139, 9, 395, 9, 75, 9,
331, 9, 203, 9, 459, 9, 43, 9, 299, 9,
171, 9, 427, 9, 107, 9, 363, 9, 235, 9,
491, 9, 27, 9, 283, 9, 155, 9, 411, 9,
91, 9, 347, 9, 219, 9, 475, 9, 59, 9,
315, 9, 187, 9, 443, 9, 123, 9, 379, 9,
251, 9, 507, 9, 7, 9, 263, 9, 135, 9,
391, 9, 71, 9, 327, 9, 199, 9, 455, 9,
39, 9, 295, 9, 167, 9, 423, 9, 103, 9,
359, 9, 231, 9, 487, 9, 23, 9, 279, 9,
151, 9, 407, 9, 87, 9, 343, 9, 215, 9,
471, 9, 55, 9, 311, 9, 183, 9, 439, 9,
119, 9, 375, 9, 247, 9, 503, 9, 15, 9,
271, 9, 143, 9, 399, 9, 79, 9, 335, 9,
207, 9, 463, 9, 47, 9, 303, 9, 175, 9,
431, 9, 111, 9, 367, 9, 239, 9, 495, 9,
31, 9, 287, 9, 159, 9, 415, 9, 95, 9,
351, 9, 223, 9, 479, 9, 63, 9, 319, 9,
191, 9, 447, 9, 127, 9, 383, 9, 255, 9,
511, 9, 0, 7, 64, 7, 32, 7, 96, 7,
16, 7, 80, 7, 48, 7, 112, 7, 8, 7,
72, 7, 40, 7, 104, 7, 24, 7, 88, 7,
56, 7, 120, 7, 4, 7, 68, 7, 36, 7,
100, 7, 20, 7, 84, 7, 52, 7, 116, 7,
3, 8, 131, 8, 67, 8, 195, 8, 35, 8,
163, 8, 99, 8, 227, 8
};
static_dtree = new short[60]
{
0, 5, 16, 5, 8, 5, 24, 5, 4, 5,
20, 5, 12, 5, 28, 5, 2, 5, 18, 5,
10, 5, 26, 5, 6, 5, 22, 5, 14, 5,
30, 5, 1, 5, 17, 5, 9, 5, 25, 5,
5, 5, 21, 5, 13, 5, 29, 5, 3, 5,
19, 5, 11, 5, 27, 5, 7, 5, 23, 5
};
static_l_desc = new StaticTree(static_ltree, Tree.extra_lbits, 257, L_CODES, 15);
static_d_desc = new StaticTree(static_dtree, Tree.extra_dbits, 0, 30, 15);
static_bl_desc = new StaticTree(null, Tree.extra_blbits, 0, 19, 7);
}
}
namespace ComponentAce.Compression.Libs.zlib;
internal sealed class StaticTree
{
private const int MAX_BITS = 15;
private const int BL_CODES = 19;
private const int D_CODES = 30;
private const int LITERALS = 256;
private const int LENGTH_CODES = 29;
private static readonly int L_CODES;
internal const int MAX_BL_BITS = 7;
internal static readonly short[] static_ltree;
internal static readonly short[] static_dtree;
internal static StaticTree static_l_desc;
internal static StaticTree static_d_desc;
internal static StaticTree static_bl_desc;
internal short[] static_tree;
internal int[] extra_bits;
internal int extra_base;
internal int elems;
internal int max_length;
internal StaticTree(short[] static_tree, int[] extra_bits, int extra_base, int elems, int max_length)
{
this.static_tree = static_tree;
this.extra_bits = extra_bits;
this.extra_base = extra_base;
this.elems = elems;
this.max_length = max_length;
}
static StaticTree()
{
L_CODES = 286;
static_ltree = new short[576]
{
12, 8, 140, 8, 76, 8, 204, 8, 44, 8,
172, 8, 108, 8, 236, 8, 28, 8, 156, 8,
92, 8, 220, 8, 60, 8, 188, 8, 124, 8,
252, 8, 2, 8, 130, 8, 66, 8, 194, 8,
34, 8, 162, 8, 98, 8, 226, 8, 18, 8,
146, 8, 82, 8, 210, 8, 50, 8, 178, 8,
114, 8, 242, 8, 10, 8, 138, 8, 74, 8,
202, 8, 42, 8, 170, 8, 106, 8, 234, 8,
26, 8, 154, 8, 90, 8, 218, 8, 58, 8,
186, 8, 122, 8, 250, 8, 6, 8, 134, 8,
70, 8, 198, 8, 38, 8, 166, 8, 102, 8,
230, 8, 22, 8, 150, 8, 86, 8, 214, 8,
54, 8, 182, 8, 118, 8, 246, 8, 14, 8,
142, 8, 78, 8, 206, 8, 46, 8, 174, 8,
110, 8, 238, 8, 30, 8, 158, 8, 94, 8,
222, 8, 62, 8, 190, 8, 126, 8, 254, 8,
1, 8, 129, 8, 65, 8, 193, 8, 33, 8,
161, 8, 97, 8, 225, 8, 17, 8, 145, 8,
81, 8, 209, 8, 49, 8, 177, 8, 113, 8,
241, 8, 9, 8, 137, 8, 73, 8, 201, 8,
41, 8, 169, 8, 105, 8, 233, 8, 25, 8,
153, 8, 89, 8, 217, 8, 57, 8, 185, 8,
121, 8, 249, 8, 5, 8, 133, 8, 69, 8,
197, 8, 37, 8, 165, 8, 101, 8, 229, 8,
21, 8, 149, 8, 85, 8, 213, 8, 53, 8,
181, 8, 117, 8, 245, 8, 13, 8, 141, 8,
77, 8, 205, 8, 45, 8, 173, 8, 109, 8,
237, 8, 29, 8, 157, 8, 93, 8, 221, 8,
61, 8, 189, 8, 125, 8, 253, 8, 19, 9,
275, 9, 147, 9, 403, 9, 83, 9, 339, 9,
211, 9, 467, 9, 51, 9, 307, 9, 179, 9,
435, 9, 115, 9, 371, 9, 243, 9, 499, 9,
11, 9, 267, 9, 139, 9, 395, 9, 75, 9,
331, 9, 203, 9, 459, 9, 43, 9, 299, 9,
171, 9, 427, 9, 107, 9, 363, 9, 235, 9,
491, 9, 27, 9, 283, 9, 155, 9, 411, 9,
91, 9, 347, 9, 219, 9, 475, 9, 59, 9,
315, 9, 187, 9, 443, 9, 123, 9, 379, 9,
251, 9, 507, 9, 7, 9, 263, 9, 135, 9,
391, 9, 71, 9, 327, 9, 199, 9, 455, 9,
39, 9, 295, 9, 167, 9, 423, 9, 103, 9,
359, 9, 231, 9, 487, 9, 23, 9, 279, 9,
151, 9, 407, 9, 87, 9, 343, 9, 215, 9,
471, 9, 55, 9, 311, 9, 183, 9, 439, 9,
119, 9, 375, 9, 247, 9, 503, 9, 15, 9,
271, 9, 143, 9, 399, 9, 79, 9, 335, 9,
207, 9, 463, 9, 47, 9, 303, 9, 175, 9,
431, 9, 111, 9, 367, 9, 239, 9, 495, 9,
31, 9, 287, 9, 159, 9, 415, 9, 95, 9,
351, 9, 223, 9, 479, 9, 63, 9, 319, 9,
191, 9, 447, 9, 127, 9, 383, 9, 255, 9,
511, 9, 0, 7, 64, 7, 32, 7, 96, 7,
16, 7, 80, 7, 48, 7, 112, 7, 8, 7,
72, 7, 40, 7, 104, 7, 24, 7, 88, 7,
56, 7, 120, 7, 4, 7, 68, 7, 36, 7,
100, 7, 20, 7, 84, 7, 52, 7, 116, 7,
3, 8, 131, 8, 67, 8, 195, 8, 35, 8,
163, 8, 99, 8, 227, 8
};
static_dtree = new short[60]
{
0, 5, 16, 5, 8, 5, 24, 5, 4, 5,
20, 5, 12, 5, 28, 5, 2, 5, 18, 5,
10, 5, 26, 5, 6, 5, 22, 5, 14, 5,
30, 5, 1, 5, 17, 5, 9, 5, 25, 5,
5, 5, 21, 5, 13, 5, 29, 5, 3, 5,
19, 5, 11, 5, 27, 5, 7, 5, 23, 5
};
static_l_desc = new StaticTree(static_ltree, Tree.extra_lbits, 257, L_CODES, 15);
static_d_desc = new StaticTree(static_dtree, Tree.extra_dbits, 0, 30, 15);
static_bl_desc = new StaticTree(null, Tree.extra_blbits, 0, 19, 7);
}
}

205
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/SupportClass.cs
View File

@ -1,104 +1,103 @@
using System.IO;
using System.Text;
namespace ComponentAce.Compression.Libs.zlib
{
public class SupportClass
{
public static long Identity(long literal)
{
return literal;
}
public static ulong Identity(ulong literal)
{
return literal;
}
public static float Identity(float literal)
{
return literal;
}
public static double Identity(double literal)
{
return literal;
}
public static int URShift(int number, int bits)
{
if (number >= 0)
{
return number >> bits;
}
return (number >> bits) + (2 << ~bits);
}
public static int URShift(int number, long bits)
{
return URShift(number, (int)bits);
}
public static long URShift(long number, int bits)
{
if (number >= 0)
{
return number >> bits;
}
return (number >> bits) + (2L << ~bits);
}
public static long URShift(long number, long bits)
{
return URShift(number, (int)bits);
}
public static int ReadInput(Stream sourceStream, byte[] target, int start, int count)
{
if (target.Length == 0)
{
return 0;
}
byte[] array = new byte[target.Length];
int num = sourceStream.Read(array, start, count);
if (num == 0)
{
return -1;
}
for (int i = start; i < start + num; i++)
{
target[i] = array[i];
}
return num;
}
public static int ReadInput(TextReader sourceTextReader, byte[] target, int start, int count)
{
if (target.Length == 0)
{
return 0;
}
char[] array = new char[target.Length];
int num = sourceTextReader.Read(array, start, count);
if (num == 0)
{
return -1;
}
for (int i = start; i < start + num; i++)
{
target[i] = (byte)array[i];
}
return num;
}
public static byte[] ToByteArray(string sourceString)
{
return Encoding.UTF8.GetBytes(sourceString);
}
public static char[] ToCharArray(byte[] byteArray)
{
return Encoding.UTF8.GetChars(byteArray);
}
}
using System.IO;
using System.Text;
namespace ComponentAce.Compression.Libs.zlib;
public class SupportClass
{
public static long Identity(long literal)
{
return literal;
}
public static ulong Identity(ulong literal)
{
return literal;
}
public static float Identity(float literal)
{
return literal;
}
public static double Identity(double literal)
{
return literal;
}
public static int URShift(int number, int bits)
{
if (number >= 0)
{
return number >> bits;
}
return (number >> bits) + (2 << ~bits);
}
public static int URShift(int number, long bits)
{
return URShift(number, (int)bits);
}
public static long URShift(long number, int bits)
{
if (number >= 0)
{
return number >> bits;
}
return (number >> bits) + (2L << ~bits);
}
public static long URShift(long number, long bits)
{
return URShift(number, (int)bits);
}
public static int ReadInput(Stream sourceStream, byte[] target, int start, int count)
{
if (target.Length == 0)
{
return 0;
}
byte[] array = new byte[target.Length];
int num = sourceStream.Read(array, start, count);
if (num == 0)
{
return -1;
}
for (int i = start; i < start + num; i++)
{
target[i] = array[i];
}
return num;
}
public static int ReadInput(TextReader sourceTextReader, byte[] target, int start, int count)
{
if (target.Length == 0)
{
return 0;
}
char[] array = new char[target.Length];
int num = sourceTextReader.Read(array, start, count);
if (num == 0)
{
return -1;
}
for (int i = start; i < start + num; i++)
{
target[i] = (byte)array[i];
}
return num;
}
public static byte[] ToByteArray(string sourceString)
{
return Encoding.UTF8.GetBytes(sourceString);
}
public static char[] ToCharArray(byte[] byteArray)
{
return Encoding.UTF8.GetChars(byteArray);
}
}

675
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/Tree.cs
View File

@ -1,337 +1,340 @@
using System;
namespace ComponentAce.Compression.Libs.zlib
{
internal sealed class Tree
{
private const int MAX_BITS = 15;
private const int BL_CODES = 19;
private const int D_CODES = 30;
private const int LITERALS = 256;
private const int LENGTH_CODES = 29;
private static readonly int L_CODES = 286;
private static readonly int HEAP_SIZE = 2 * L_CODES + 1;
internal const int MAX_BL_BITS = 7;
internal const int END_BLOCK = 256;
internal const int REP_3_6 = 16;
internal const int REPZ_3_10 = 17;
internal const int REPZ_11_138 = 18;
internal static readonly int[] extra_lbits = new int[29]
{
0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
4, 4, 4, 4, 5, 5, 5, 5, 0
};
internal static readonly int[] extra_dbits = new int[30]
{
0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
4, 4, 5, 5, 6, 6, 7, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 13, 13
};
internal static readonly int[] extra_blbits = new int[19]
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 2, 3, 7
};
internal static readonly byte[] bl_order = new byte[19]
{
16, 17, 18, 0, 8, 7, 9, 6, 10, 5,
11, 4, 12, 3, 13, 2, 14, 1, 15
};
internal const int Buf_size = 16;
internal const int DIST_CODE_LEN = 512;
internal static readonly byte[] _dist_code = new byte[512]
{
0, 1, 2, 3, 4, 4, 5, 5, 6, 6,
6, 6, 7, 7, 7, 7, 8, 8, 8, 8,
8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
9, 9, 10, 10, 10, 10, 10, 10, 10, 10,
10, 10, 10, 10, 10, 10, 10, 10, 11, 11,
11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
11, 11, 11, 11, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 0, 0, 16, 17,
18, 18, 19, 19, 20, 20, 20, 20, 21, 21,
21, 21, 22, 22, 22, 22, 22, 22, 22, 22,
23, 23, 23, 23, 23, 23, 23, 23, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29
};
internal static readonly byte[] _length_code = new byte[256]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 12, 12,
13, 13, 13, 13, 14, 14, 14, 14, 15, 15,
15, 15, 16, 16, 16, 16, 16, 16, 16, 16,
17, 17, 17, 17, 17, 17, 17, 17, 18, 18,
18, 18, 18, 18, 18, 18, 19, 19, 19, 19,
19, 19, 19, 19, 20, 20, 20, 20, 20, 20,
20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
21, 21, 21, 21, 21, 21, 21, 21, 21, 21,
21, 21, 21, 21, 21, 21, 22, 22, 22, 22,
22, 22, 22, 22, 22, 22, 22, 22, 22, 22,
22, 22, 23, 23, 23, 23, 23, 23, 23, 23,
23, 23, 23, 23, 23, 23, 23, 23, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 28
};
internal static readonly int[] base_length = new int[29]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 10,
12, 14, 16, 20, 24, 28, 32, 40, 48, 56,
64, 80, 96, 112, 128, 160, 192, 224, 0
};
internal static readonly int[] base_dist = new int[30]
{
0, 1, 2, 3, 4, 6, 8, 12, 16, 24,
32, 48, 64, 96, 128, 192, 256, 384, 512, 768,
1024, 1536, 2048, 3072, 4096, 6144, 8192, 12288, 16384, 24576
};
internal short[] dyn_tree;
internal int max_code;
internal StaticTree stat_desc;
internal static int d_code(int dist)
{
return (dist < 256) ? _dist_code[dist] : _dist_code[256 + SupportClass.URShift(dist, 7)];
}
internal void gen_bitlen(Deflate s)
{
short[] array = dyn_tree;
short[] static_tree = stat_desc.static_tree;
int[] extra_bits = stat_desc.extra_bits;
int extra_base = stat_desc.extra_base;
int max_length = stat_desc.max_length;
int num = 0;
for (int i = 0; i <= 15; i++)
{
s.bl_count[i] = 0;
}
array[s.heap[s.heap_max] * 2 + 1] = 0;
int j;
for (j = s.heap_max + 1; j < HEAP_SIZE; j++)
{
int num2 = s.heap[j];
int i = array[array[num2 * 2 + 1] * 2 + 1] + 1;
if (i > max_length)
{
i = max_length;
num++;
}
array[num2 * 2 + 1] = (short)i;
if (num2 <= max_code)
{
s.bl_count[i]++;
int num3 = 0;
if (num2 >= extra_base)
{
num3 = extra_bits[num2 - extra_base];
}
short num4 = array[num2 * 2];
s.opt_len += num4 * (i + num3);
if (static_tree != null)
{
s.static_len += num4 * (static_tree[num2 * 2 + 1] + num3);
}
}
}
if (num == 0)
{
return;
}
do
{
int i = max_length - 1;
while (s.bl_count[i] == 0)
{
i--;
}
s.bl_count[i]--;
s.bl_count[i + 1] = (short)(s.bl_count[i + 1] + 2);
s.bl_count[max_length]--;
num -= 2;
}
while (num > 0);
for (int i = max_length; i != 0; i--)
{
int num2 = s.bl_count[i];
while (num2 != 0)
{
int num5 = s.heap[--j];
if (num5 <= max_code)
{
if (array[num5 * 2 + 1] != i)
{
s.opt_len = (int)(s.opt_len + ((long)i - (long)array[num5 * 2 + 1]) * array[num5 * 2]);
array[num5 * 2 + 1] = (short)i;
}
num2--;
}
}
}
}
internal void build_tree(Deflate s)
{
short[] array = dyn_tree;
short[] static_tree = stat_desc.static_tree;
int elems = stat_desc.elems;
int num = -1;
s.heap_len = 0;
s.heap_max = HEAP_SIZE;
for (int i = 0; i < elems; i++)
{
if (array[i * 2] != 0)
{
num = (s.heap[++s.heap_len] = i);
s.depth[i] = 0;
}
else
{
array[i * 2 + 1] = 0;
}
}
int num2;
while (s.heap_len < 2)
{
num2 = (s.heap[++s.heap_len] = ((num < 2) ? (++num) : 0));
array[num2 * 2] = 1;
s.depth[num2] = 0;
s.opt_len--;
if (static_tree != null)
{
s.static_len -= static_tree[num2 * 2 + 1];
}
}
max_code = num;
for (int i = s.heap_len / 2; i >= 1; i--)
{
s.pqdownheap(array, i);
}
num2 = elems;
do
{
int i = s.heap[1];
s.heap[1] = s.heap[s.heap_len--];
s.pqdownheap(array, 1);
int num3 = s.heap[1];
s.heap[--s.heap_max] = i;
s.heap[--s.heap_max] = num3;
array[num2 * 2] = (short)(array[i * 2] + array[num3 * 2]);
s.depth[num2] = (byte)(Math.Max(s.depth[i], s.depth[num3]) + 1);
array[i * 2 + 1] = (array[num3 * 2 + 1] = (short)num2);
s.heap[1] = num2++;
s.pqdownheap(array, 1);
}
while (s.heap_len >= 2);
s.heap[--s.heap_max] = s.heap[1];
gen_bitlen(s);
gen_codes(array, num, s.bl_count);
}
internal static void gen_codes(short[] tree, int max_code, short[] bl_count)
{
short[] array = new short[16];
short num = 0;
for (int i = 1; i <= 15; i++)
{
num = (array[i] = (short)(num + bl_count[i - 1] << 1));
}
for (int j = 0; j <= max_code; j++)
{
int num2 = tree[j * 2 + 1];
if (num2 != 0)
{
tree[j * 2] = (short)bi_reverse(array[num2]++, num2);
}
}
}
internal static int bi_reverse(int code, int len)
{
int num = 0;
do
{
num |= code & 1;
code = SupportClass.URShift(code, 1);
num <<= 1;
}
while (--len > 0);
return SupportClass.URShift(num, 1);
}
}
using System;
namespace ComponentAce.Compression.Libs.zlib;
internal sealed class Tree
{
private const int MAX_BITS = 15;
private const int BL_CODES = 19;
private const int D_CODES = 30;
private const int LITERALS = 256;
private const int LENGTH_CODES = 29;
private static readonly int L_CODES = 286;
private static readonly int HEAP_SIZE = 2 * L_CODES + 1;
internal const int MAX_BL_BITS = 7;
internal const int END_BLOCK = 256;
internal const int REP_3_6 = 16;
internal const int REPZ_3_10 = 17;
internal const int REPZ_11_138 = 18;
internal static readonly int[] extra_lbits = new int[29]
{
0, 0, 0, 0, 0, 0, 0, 0, 1, 1,
1, 1, 2, 2, 2, 2, 3, 3, 3, 3,
4, 4, 4, 4, 5, 5, 5, 5, 0
};
internal static readonly int[] extra_dbits = new int[30]
{
0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
4, 4, 5, 5, 6, 6, 7, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 13, 13
};
internal static readonly int[] extra_blbits = new int[19]
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 2, 3, 7
};
internal static readonly byte[] bl_order = new byte[19]
{
16, 17, 18, 0, 8, 7, 9, 6, 10, 5,
11, 4, 12, 3, 13, 2, 14, 1, 15
};
internal const int Buf_size = 16;
internal const int DIST_CODE_LEN = 512;
internal static readonly byte[] _dist_code = new byte[512]
{
0, 1, 2, 3, 4, 4, 5, 5, 6, 6,
6, 6, 7, 7, 7, 7, 8, 8, 8, 8,
8, 8, 8, 8, 9, 9, 9, 9, 9, 9,
9, 9, 10, 10, 10, 10, 10, 10, 10, 10,
10, 10, 10, 10, 10, 10, 10, 10, 11, 11,
11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
11, 11, 11, 11, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
13, 13, 13, 13, 13, 13, 13, 13, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
14, 14, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
15, 15, 15, 15, 15, 15, 0, 0, 16, 17,
18, 18, 19, 19, 20, 20, 20, 20, 21, 21,
21, 21, 22, 22, 22, 22, 22, 22, 22, 22,
23, 23, 23, 23, 23, 23, 23, 23, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 28, 28,
28, 28, 28, 28, 28, 28, 28, 28, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
29, 29
};
internal static readonly byte[] _length_code = new byte[256]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 8,
9, 9, 10, 10, 11, 11, 12, 12, 12, 12,
13, 13, 13, 13, 14, 14, 14, 14, 15, 15,
15, 15, 16, 16, 16, 16, 16, 16, 16, 16,
17, 17, 17, 17, 17, 17, 17, 17, 18, 18,
18, 18, 18, 18, 18, 18, 19, 19, 19, 19,
19, 19, 19, 19, 20, 20, 20, 20, 20, 20,
20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
21, 21, 21, 21, 21, 21, 21, 21, 21, 21,
21, 21, 21, 21, 21, 21, 22, 22, 22, 22,
22, 22, 22, 22, 22, 22, 22, 22, 22, 22,
22, 22, 23, 23, 23, 23, 23, 23, 23, 23,
23, 23, 23, 23, 23, 23, 23, 23, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
25, 25, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 26, 26, 26, 26, 26, 26,
26, 26, 26, 26, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 27, 27, 27, 27, 27,
27, 27, 27, 27, 27, 28
};
internal static readonly int[] base_length = new int[29]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 10,
12, 14, 16, 20, 24, 28, 32, 40, 48, 56,
64, 80, 96, 112, 128, 160, 192, 224, 0
};
internal static readonly int[] base_dist = new int[30]
{
0, 1, 2, 3, 4, 6, 8, 12, 16, 24,
32, 48, 64, 96, 128, 192, 256, 384, 512, 768,
1024, 1536, 2048, 3072, 4096, 6144, 8192, 12288, 16384, 24576
};
internal short[] dyn_tree;
internal int max_code;
internal StaticTree stat_desc;
internal static int d_code(int dist)
{
if (dist >= 256)
{
return _dist_code[256 + SupportClass.URShift(dist, 7)];
}
return _dist_code[dist];
}
internal void gen_bitlen(Deflate s)
{
short[] array = dyn_tree;
short[] static_tree = stat_desc.static_tree;
int[] extra_bits = stat_desc.extra_bits;
int extra_base = stat_desc.extra_base;
int max_length = stat_desc.max_length;
int num = 0;
for (int i = 0; i <= 15; i++)
{
s.bl_count[i] = 0;
}
array[s.heap[s.heap_max] * 2 + 1] = 0;
int j;
for (j = s.heap_max + 1; j < HEAP_SIZE; j++)
{
int num2 = s.heap[j];
int i = array[array[num2 * 2 + 1] * 2 + 1] + 1;
if (i > max_length)
{
i = max_length;
num++;
}
array[num2 * 2 + 1] = (short)i;
if (num2 <= max_code)
{
s.bl_count[i]++;
int num3 = 0;
if (num2 >= extra_base)
{
num3 = extra_bits[num2 - extra_base];
}
short num4 = array[num2 * 2];
s.opt_len += num4 * (i + num3);
if (static_tree != null)
{
s.static_len += num4 * (static_tree[num2 * 2 + 1] + num3);
}
}
}
if (num == 0)
{
return;
}
do
{
int i = max_length - 1;
while (s.bl_count[i] == 0)
{
i--;
}
s.bl_count[i]--;
s.bl_count[i + 1] = (short)(s.bl_count[i + 1] + 2);
s.bl_count[max_length]--;
num -= 2;
}
while (num > 0);
for (int i = max_length; i != 0; i--)
{
int num2 = s.bl_count[i];
while (num2 != 0)
{
int num5 = s.heap[--j];
if (num5 <= max_code)
{
if (array[num5 * 2 + 1] != i)
{
s.opt_len = (int)(s.opt_len + ((long)i - (long)array[num5 * 2 + 1]) * array[num5 * 2]);
array[num5 * 2 + 1] = (short)i;
}
num2--;
}
}
}
}
internal void build_tree(Deflate s)
{
short[] array = dyn_tree;
short[] static_tree = stat_desc.static_tree;
int elems = stat_desc.elems;
int num = -1;
s.heap_len = 0;
s.heap_max = HEAP_SIZE;
for (int i = 0; i < elems; i++)
{
if (array[i * 2] != 0)
{
num = (s.heap[++s.heap_len] = i);
s.depth[i] = 0;
}
else
{
array[i * 2 + 1] = 0;
}
}
int num2;
while (s.heap_len < 2)
{
num2 = (s.heap[++s.heap_len] = ((num < 2) ? (++num) : 0));
array[num2 * 2] = 1;
s.depth[num2] = 0;
s.opt_len--;
if (static_tree != null)
{
s.static_len -= static_tree[num2 * 2 + 1];
}
}
max_code = num;
for (int i = s.heap_len / 2; i >= 1; i--)
{
s.pqdownheap(array, i);
}
num2 = elems;
do
{
int i = s.heap[1];
s.heap[1] = s.heap[s.heap_len--];
s.pqdownheap(array, 1);
int num3 = s.heap[1];
s.heap[--s.heap_max] = i;
s.heap[--s.heap_max] = num3;
array[num2 * 2] = (short)(array[i * 2] + array[num3 * 2]);
s.depth[num2] = (byte)(Math.Max(s.depth[i], s.depth[num3]) + 1);
array[i * 2 + 1] = (array[num3 * 2 + 1] = (short)num2);
s.heap[1] = num2++;
s.pqdownheap(array, 1);
}
while (s.heap_len >= 2);
s.heap[--s.heap_max] = s.heap[1];
gen_bitlen(s);
gen_codes(array, num, s.bl_count);
}
internal static void gen_codes(short[] tree, int max_code, short[] bl_count)
{
short[] array = new short[16];
short num = 0;
for (int i = 1; i <= 15; i++)
{
num = (array[i] = (short)(num + bl_count[i - 1] << 1));
}
for (int j = 0; j <= max_code; j++)
{
int num2 = tree[j * 2 + 1];
if (num2 != 0)
{
tree[j * 2] = (short)bi_reverse(array[num2]++, num2);
}
}
}
internal static int bi_reverse(int code, int len)
{
int num = 0;
do
{
num |= code & 1;
code = SupportClass.URShift(code, 1);
num <<= 1;
}
while (--len > 0);
return SupportClass.URShift(num, 1);
}
}

265
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/ZInputStream.cs
View File

@ -1,134 +1,133 @@
using System.IO;
namespace ComponentAce.Compression.Libs.zlib
{
public class ZInputStream : BinaryReader
{
protected ZStream z = new ZStream();
protected int bufsize = 512;
protected int flush;
protected byte[] buf;
protected byte[] buf1 = new byte[1];
protected bool compress;
internal Stream in_Renamed = null;
internal bool nomoreinput = false;
public virtual int FlushMode
{
get
{
return flush;
}
set
{
flush = value;
}
}
public virtual long TotalIn => z.total_in;
public virtual long TotalOut => z.total_out;
internal void InitBlock()
{
flush = 0;
buf = new byte[bufsize];
}
public ZInputStream(Stream in_Renamed)
: base(in_Renamed)
{
InitBlock();
this.in_Renamed = in_Renamed;
z.inflateInit();
compress = false;
z.next_in = buf;
z.next_in_index = 0;
z.avail_in = 0;
}
public ZInputStream(Stream in_Renamed, int level)
: base(in_Renamed)
{
InitBlock();
this.in_Renamed = in_Renamed;
z.deflateInit(level);
compress = true;
z.next_in = buf;
z.next_in_index = 0;
z.avail_in = 0;
}
public override int Read()
{
if (read(buf1, 0, 1) == -1)
{
return -1;
}
return buf1[0] & 0xFF;
}
public int read(byte[] b, int off, int len)
{
if (len == 0)
{
return 0;
}
z.next_out = b;
z.next_out_index = off;
z.avail_out = len;
int num;
do
{
if (z.avail_in == 0 && !nomoreinput)
{
z.next_in_index = 0;
z.avail_in = SupportClass.ReadInput(in_Renamed, buf, 0, bufsize);
if (z.avail_in == -1)
{
z.avail_in = 0;
nomoreinput = true;
}
}
num = ((!compress) ? z.inflate(flush) : z.deflate(flush));
if (nomoreinput && num == -5)
{
return -1;
}
if (num != 0 && num != 1)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
if (nomoreinput && z.avail_out == len)
{
return -1;
}
}
while (z.avail_out == len && num == 0);
return len - z.avail_out;
}
public long skip(long n)
{
int num = 512;
if (n < num)
{
num = (int)n;
}
byte[] array = new byte[num];
return SupportClass.ReadInput(BaseStream, array, 0, array.Length);
}
public override void Close()
{
in_Renamed.Close();
}
}
using System.IO;
namespace ComponentAce.Compression.Libs.zlib;
public class ZInputStream : BinaryReader
{
protected ZStream z = new ZStream();
protected int bufsize = 512;
protected int flush;
protected byte[] buf;
protected byte[] buf1 = new byte[1];
protected bool compress;
internal Stream in_Renamed;
internal bool nomoreinput;
public virtual int FlushMode
{
get
{
return flush;
}
set
{
flush = value;
}
}
public virtual long TotalIn => z.total_in;
public virtual long TotalOut => z.total_out;
internal void InitBlock()
{
flush = 0;
buf = new byte[bufsize];
}
public ZInputStream(Stream in_Renamed)
: base(in_Renamed)
{
InitBlock();
this.in_Renamed = in_Renamed;
z.inflateInit();
compress = false;
z.next_in = buf;
z.next_in_index = 0;
z.avail_in = 0;
}
public ZInputStream(Stream in_Renamed, int level)
: base(in_Renamed)
{
InitBlock();
this.in_Renamed = in_Renamed;
z.deflateInit(level);
compress = true;
z.next_in = buf;
z.next_in_index = 0;
z.avail_in = 0;
}
public override int Read()
{
if (read(buf1, 0, 1) == -1)
{
return -1;
}
return buf1[0] & 0xFF;
}
public int read(byte[] b, int off, int len)
{
if (len == 0)
{
return 0;
}
z.next_out = b;
z.next_out_index = off;
z.avail_out = len;
int num;
do
{
if (z.avail_in == 0 && !nomoreinput)
{
z.next_in_index = 0;
z.avail_in = SupportClass.ReadInput(in_Renamed, buf, 0, bufsize);
if (z.avail_in == -1)
{
z.avail_in = 0;
nomoreinput = true;
}
}
num = ((!compress) ? z.inflate(flush) : z.deflate(flush));
if (nomoreinput && num == -5)
{
return -1;
}
if (num != 0 && num != 1)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
if (nomoreinput && z.avail_out == len)
{
return -1;
}
}
while (z.avail_out == len && num == 0);
return len - z.avail_out;
}
public long skip(long n)
{
int num = 512;
if (n < num)
{
num = (int)n;
}
byte[] array = new byte[num];
return SupportClass.ReadInput(BaseStream, array, 0, array.Length);
}
public override void Close()
{
in_Renamed.Close();
}
}

383
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/ZOutputStream.cs
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@ -1,193 +1,192 @@
using System;
using System.IO;
namespace ComponentAce.Compression.Libs.zlib
{
public class ZOutputStream : Stream
{
protected internal ZStream z = new ZStream();
protected internal int bufsize = 4096;
protected internal int flush_Renamed_Field;
protected internal byte[] buf;
protected internal byte[] buf1 = new byte[1];
protected internal bool compress;
private Stream out_Renamed;
public virtual int FlushMode
{
get
{
return flush_Renamed_Field;
}
set
{
flush_Renamed_Field = value;
}
}
public virtual long TotalIn => z.total_in;
public virtual long TotalOut => z.total_out;
public override bool CanRead => false;
public override bool CanSeek => false;
public override bool CanWrite => false;
public override long Length => 0L;
public override long Position
{
get
{
return 0L;
}
set
{
}
}
private void InitBlock()
{
flush_Renamed_Field = 0;
buf = new byte[bufsize];
}
public ZOutputStream(Stream out_Renamed)
{
InitBlock();
this.out_Renamed = out_Renamed;
z.inflateInit();
compress = false;
}
public ZOutputStream(Stream out_Renamed, int level)
{
InitBlock();
this.out_Renamed = out_Renamed;
z.deflateInit(level);
compress = true;
}
public void WriteByte(int b)
{
buf1[0] = (byte)b;
Write(buf1, 0, 1);
}
public override void WriteByte(byte b)
{
WriteByte(b);
}
public override void Write(byte[] b1, int off, int len)
{
if (len == 0)
{
return;
}
byte[] array = new byte[b1.Length];
Array.Copy(b1, 0, array, 0, b1.Length);
z.next_in = array;
z.next_in_index = off;
z.avail_in = len;
do
{
z.next_out = buf;
z.next_out_index = 0;
z.avail_out = bufsize;
int num = ((!compress) ? z.inflate(flush_Renamed_Field) : z.deflate(flush_Renamed_Field));
if (num != 0 && num != 1)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
out_Renamed.Write(buf, 0, bufsize - z.avail_out);
}
while (z.avail_in > 0 || z.avail_out == 0);
}
public virtual void finish()
{
do
{
z.next_out = buf;
z.next_out_index = 0;
z.avail_out = bufsize;
int num = ((!compress) ? z.inflate(4) : z.deflate(4));
if (num != 1 && num != 0)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
if (bufsize - z.avail_out > 0)
{
out_Renamed.Write(buf, 0, bufsize - z.avail_out);
}
}
while (z.avail_in > 0 || z.avail_out == 0);
try
{
Flush();
}
catch
{
}
}
public virtual void end()
{
if (compress)
{
z.deflateEnd();
}
else
{
z.inflateEnd();
}
z.free();
z = null;
}
public override void Close()
{
try
{
finish();
}
catch
{
}
finally
{
end();
out_Renamed.Close();
out_Renamed = null;
}
}
public override void Flush()
{
out_Renamed.Flush();
}
public override int Read(byte[] buffer, int offset, int count)
{
return 0;
}
public override void SetLength(long value)
{
}
public override long Seek(long offset, SeekOrigin origin)
{
return 0L;
}
}
using System;
using System.IO;
namespace ComponentAce.Compression.Libs.zlib;
public class ZOutputStream : Stream
{
protected internal ZStream z = new ZStream();
protected internal int bufsize = 4096;
protected internal int flush_Renamed_Field;
protected internal byte[] buf;
protected internal byte[] buf1 = new byte[1];
protected internal bool compress;
private Stream out_Renamed;
public virtual int FlushMode
{
get
{
return flush_Renamed_Field;
}
set
{
flush_Renamed_Field = value;
}
}
public virtual long TotalIn => z.total_in;
public virtual long TotalOut => z.total_out;
public override bool CanRead => false;
public override bool CanSeek => false;
public override bool CanWrite => false;
public override long Length => 0L;
public override long Position
{
get
{
return 0L;
}
set
{
}
}
private void InitBlock()
{
flush_Renamed_Field = 0;
buf = new byte[bufsize];
}
public ZOutputStream(Stream out_Renamed)
{
InitBlock();
this.out_Renamed = out_Renamed;
z.inflateInit();
compress = false;
}
public ZOutputStream(Stream out_Renamed, int level)
{
InitBlock();
this.out_Renamed = out_Renamed;
z.deflateInit(level);
compress = true;
}
public void WriteByte(int b)
{
buf1[0] = (byte)b;
Write(buf1, 0, 1);
}
public override void WriteByte(byte b)
{
WriteByte(b);
}
public override void Write(byte[] b1, int off, int len)
{
if (len == 0)
{
return;
}
byte[] array = new byte[b1.Length];
Array.Copy(b1, 0, array, 0, b1.Length);
z.next_in = array;
z.next_in_index = off;
z.avail_in = len;
do
{
z.next_out = buf;
z.next_out_index = 0;
z.avail_out = bufsize;
int num = ((!compress) ? z.inflate(flush_Renamed_Field) : z.deflate(flush_Renamed_Field));
if (num != 0 && num != 1)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
out_Renamed.Write(buf, 0, bufsize - z.avail_out);
}
while (z.avail_in > 0 || z.avail_out == 0);
}
public virtual void finish()
{
do
{
z.next_out = buf;
z.next_out_index = 0;
z.avail_out = bufsize;
int num = ((!compress) ? z.inflate(4) : z.deflate(4));
if (num != 1 && num != 0)
{
throw new ZStreamException((compress ? "de" : "in") + "flating: " + z.msg);
}
if (bufsize - z.avail_out > 0)
{
out_Renamed.Write(buf, 0, bufsize - z.avail_out);
}
}
while (z.avail_in > 0 || z.avail_out == 0);
try
{
Flush();
}
catch
{
}
}
public virtual void end()
{
if (compress)
{
z.deflateEnd();
}
else
{
z.inflateEnd();
}
z.free();
z = null;
}
public override void Close()
{
try
{
finish();
}
catch
{
}
finally
{
end();
out_Renamed.Close();
out_Renamed = null;
}
}
public override void Flush()
{
out_Renamed.Flush();
}
public override int Read(byte[] buffer, int offset, int count)
{
return 0;
}
public override void SetLength(long value)
{
}
public override long Seek(long offset, SeekOrigin origin)
{
return 0L;
}
}

443
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/ZStream.cs
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@ -1,222 +1,223 @@
using System;
namespace ComponentAce.Compression.Libs.zlib
{
public sealed class ZStream
{
private const int MAX_WBITS = 15;
private static readonly int DEF_WBITS = 15;
private const int Z_NO_FLUSH = 0;
private const int Z_PARTIAL_FLUSH = 1;
private const int Z_SYNC_FLUSH = 2;
private const int Z_FULL_FLUSH = 3;
private const int Z_FINISH = 4;
private const int MAX_MEM_LEVEL = 9;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
public byte[] next_in;
public int next_in_index;
public int avail_in;
public long total_in;
public byte[] next_out;
public int next_out_index;
public int avail_out;
public long total_out;
public string msg;
internal Deflate dstate;
internal Inflate istate;
internal int data_type;
public long adler;
internal Adler32 _adler = new Adler32();
public int inflateInit()
{
return inflateInit(DEF_WBITS);
}
public int inflateInit(int w)
{
istate = new Inflate();
return istate.inflateInit(this, w);
}
public int inflate(int f)
{
if (istate == null)
{
return -2;
}
return istate.inflate(this, f);
}
public int inflateEnd()
{
if (istate == null)
{
return -2;
}
int result = istate.inflateEnd(this);
istate = null;
return result;
}
public int inflateSync()
{
if (istate == null)
{
return -2;
}
return istate.inflateSync(this);
}
public int inflateSetDictionary(byte[] dictionary, int dictLength)
{
if (istate == null)
{
return -2;
}
return istate.inflateSetDictionary(this, dictionary, dictLength);
}
public int deflateInit(int level)
{
return deflateInit(level, 15);
}
public int deflateInit(int level, int bits)
{
dstate = new Deflate();
return dstate.deflateInit(this, level, bits);
}
public int deflate(int flush)
{
if (dstate == null)
{
return -2;
}
return dstate.deflate(this, flush);
}
public int deflateEnd()
{
if (dstate == null)
{
return -2;
}
int result = dstate.deflateEnd();
dstate = null;
return result;
}
public int deflateParams(int level, int strategy)
{
if (dstate == null)
{
return -2;
}
return dstate.deflateParams(this, level, strategy);
}
public int deflateSetDictionary(byte[] dictionary, int dictLength)
{
if (dstate == null)
{
return -2;
}
return dstate.deflateSetDictionary(this, dictionary, dictLength);
}
internal void flush_pending()
{
int pending = dstate.pending;
if (pending > avail_out)
{
pending = avail_out;
}
if (pending != 0)
{
if (dstate.pending_buf.Length <= dstate.pending_out || next_out.Length <= next_out_index || dstate.pending_buf.Length < dstate.pending_out + pending || next_out.Length < next_out_index + pending)
{
}
Array.Copy(dstate.pending_buf, dstate.pending_out, next_out, next_out_index, pending);
next_out_index += pending;
dstate.pending_out += pending;
total_out += pending;
avail_out -= pending;
dstate.pending -= pending;
if (dstate.pending == 0)
{
dstate.pending_out = 0;
}
}
}
internal int read_buf(byte[] buf, int start, int size)
{
int num = avail_in;
if (num > size)
{
num = size;
}
if (num == 0)
{
return 0;
}
avail_in -= num;
if (dstate.noheader == 0)
{
adler = _adler.adler32(adler, next_in, next_in_index, num);
}
Array.Copy(next_in, next_in_index, buf, start, num);
next_in_index += num;
total_in += num;
return num;
}
public void free()
{
next_in = null;
next_out = null;
msg = null;
_adler = null;
}
}
using System;
namespace ComponentAce.Compression.Libs.zlib;
public sealed class ZStream
{
private const int MAX_WBITS = 15;
private static readonly int DEF_WBITS = 15;
private const int Z_NO_FLUSH = 0;
private const int Z_PARTIAL_FLUSH = 1;
private const int Z_SYNC_FLUSH = 2;
private const int Z_FULL_FLUSH = 3;
private const int Z_FINISH = 4;
private const int MAX_MEM_LEVEL = 9;
private const int Z_OK = 0;
private const int Z_STREAM_END = 1;
private const int Z_NEED_DICT = 2;
private const int Z_ERRNO = -1;
private const int Z_STREAM_ERROR = -2;
private const int Z_DATA_ERROR = -3;
private const int Z_MEM_ERROR = -4;
private const int Z_BUF_ERROR = -5;
private const int Z_VERSION_ERROR = -6;
public byte[] next_in;
public int next_in_index;
public int avail_in;
public long total_in;
public byte[] next_out;
public int next_out_index;
public int avail_out;
public long total_out;
public string msg;
internal Deflate dstate;
internal Inflate istate;
internal int data_type;
public long adler;
internal Adler32 _adler = new Adler32();
public int inflateInit()
{
return inflateInit(DEF_WBITS);
}
public int inflateInit(int w)
{
istate = new Inflate();
return istate.inflateInit(this, w);
}
public int inflate(int f)
{
if (istate == null)
{
return -2;
}
return istate.inflate(this, f);
}
public int inflateEnd()
{
if (istate == null)
{
return -2;
}
int result = istate.inflateEnd(this);
istate = null;
return result;
}
public int inflateSync()
{
if (istate == null)
{
return -2;
}
return istate.inflateSync(this);
}
public int inflateSetDictionary(byte[] dictionary, int dictLength)
{
if (istate == null)
{
return -2;
}
return istate.inflateSetDictionary(this, dictionary, dictLength);
}
public int deflateInit(int level)
{
return deflateInit(level, 15);
}
public int deflateInit(int level, int bits)
{
dstate = new Deflate();
return dstate.deflateInit(this, level, bits);
}
public int deflate(int flush)
{
if (dstate == null)
{
return -2;
}
return dstate.deflate(this, flush);
}
public int deflateEnd()
{
if (dstate == null)
{
return -2;
}
int result = dstate.deflateEnd();
dstate = null;
return result;
}
public int deflateParams(int level, int strategy)
{
if (dstate == null)
{
return -2;
}
return dstate.deflateParams(this, level, strategy);
}
public int deflateSetDictionary(byte[] dictionary, int dictLength)
{
if (dstate == null)
{
return -2;
}
return dstate.deflateSetDictionary(this, dictionary, dictLength);
}
internal void flush_pending()
{
int pending = dstate.pending;
if (pending > avail_out)
{
pending = avail_out;
}
if (pending != 0)
{
if (dstate.pending_buf.Length > dstate.pending_out && next_out.Length > next_out_index && dstate.pending_buf.Length >= dstate.pending_out + pending)
{
_ = next_out.Length;
_ = next_out_index + pending;
}
Array.Copy(dstate.pending_buf, dstate.pending_out, next_out, next_out_index, pending);
next_out_index += pending;
dstate.pending_out += pending;
total_out += pending;
avail_out -= pending;
dstate.pending -= pending;
if (dstate.pending == 0)
{
dstate.pending_out = 0;
}
}
}
internal int read_buf(byte[] buf, int start, int size)
{
int num = avail_in;
if (num > size)
{
num = size;
}
if (num == 0)
{
return 0;
}
avail_in -= num;
if (dstate.noheader == 0)
{
adler = _adler.adler32(adler, next_in, next_in_index, num);
}
Array.Copy(next_in, next_in_index, buf, start, num);
next_in_index += num;
total_in += num;
return num;
}
public void free()
{
next_in = null;
next_out = null;
msg = null;
_adler = null;
}
}

29
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/ZStreamException.cs
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@ -1,16 +1,15 @@
using System.IO;
namespace ComponentAce.Compression.Libs.zlib
{
public class ZStreamException : IOException
{
public ZStreamException()
{
}
public ZStreamException(string s)
: base(s)
{
}
}
using System.IO;
namespace ComponentAce.Compression.Libs.zlib;
public class ZStreamException : IOException
{
public ZStreamException()
{
}
public ZStreamException(string s)
: base(s)
{
}
}

105
AxibugEmuOnline.Client/Assets/MyNes.Core/ComponentAce.Compression.Libs.zlib/zlibConst.cs
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@ -1,54 +1,53 @@
namespace ComponentAce.Compression.Libs.zlib
{
public sealed class zlibConst
{
private const string version_Renamed_Field = "1.0.2";
public const int Z_NO_COMPRESSION = 0;
public const int Z_BEST_SPEED = 1;
public const int Z_BEST_COMPRESSION = 9;
public const int Z_DEFAULT_COMPRESSION = -1;
public const int Z_FILTERED = 1;
public const int Z_HUFFMAN_ONLY = 2;
public const int Z_DEFAULT_STRATEGY = 0;
public const int Z_NO_FLUSH = 0;
public const int Z_PARTIAL_FLUSH = 1;
public const int Z_SYNC_FLUSH = 2;
public const int Z_FULL_FLUSH = 3;
public const int Z_FINISH = 4;
public const int Z_OK = 0;
public const int Z_STREAM_END = 1;
public const int Z_NEED_DICT = 2;
public const int Z_ERRNO = -1;
public const int Z_STREAM_ERROR = -2;
public const int Z_DATA_ERROR = -3;
public const int Z_MEM_ERROR = -4;
public const int Z_BUF_ERROR = -5;
public const int Z_VERSION_ERROR = -6;
public static string version()
{
return "1.0.2";
}
}
namespace ComponentAce.Compression.Libs.zlib;
public sealed class zlibConst
{
private const string version_Renamed_Field = "1.0.2";
public const int Z_NO_COMPRESSION = 0;
public const int Z_BEST_SPEED = 1;
public const int Z_BEST_COMPRESSION = 9;
public const int Z_DEFAULT_COMPRESSION = -1;
public const int Z_FILTERED = 1;
public const int Z_HUFFMAN_ONLY = 2;
public const int Z_DEFAULT_STRATEGY = 0;
public const int Z_NO_FLUSH = 0;
public const int Z_PARTIAL_FLUSH = 1;
public const int Z_SYNC_FLUSH = 2;
public const int Z_FULL_FLUSH = 3;
public const int Z_FINISH = 4;
public const int Z_OK = 0;
public const int Z_STREAM_END = 1;
public const int Z_NEED_DICT = 2;
public const int Z_ERRNO = -1;
public const int Z_STREAM_ERROR = -2;
public const int Z_DATA_ERROR = -3;
public const int Z_MEM_ERROR = -4;
public const int Z_BUF_ERROR = -5;
public const int Z_VERSION_ERROR = -6;
public static string version()
{
return "1.0.2";
}
}

215
AxibugEmuOnline.Client/Assets/MyNes.Core/Crc32.cs
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@ -1,109 +1,108 @@
using System.Security.Cryptography;
namespace MyNes.Core
{
public class Crc32 : HashAlgorithm
{
public const uint DefaultPolynomial = 3988292384u;
public const uint DefaultSeed = uint.MaxValue;
private uint hash;
private uint seed;
private uint[] table;
private static uint[] defaultTable;
public override int HashSize => 32;
public Crc32()
{
table = InitializeTable(3988292384u);
seed = uint.MaxValue;
Initialize();
}
public Crc32(uint polynomial, uint seed)
{
table = InitializeTable(polynomial);
this.seed = seed;
Initialize();
}
public override void Initialize()
{
hash = seed;
}
protected override void HashCore(byte[] buffer, int start, int length)
{
hash = CalculateHash(table, hash, buffer, start, length);
}
protected override byte[] HashFinal()
{
return HashValue = UInt32ToBigEndianBytes(~hash);
}
public static uint Compute(byte[] buffer)
{
return ~CalculateHash(InitializeTable(3988292384u), uint.MaxValue, buffer, 0, buffer.Length);
}
public static uint Compute(uint seed, byte[] buffer)
{
return ~CalculateHash(InitializeTable(3988292384u), seed, buffer, 0, buffer.Length);
}
public static uint Compute(uint polynomial, uint seed, byte[] buffer)
{
return ~CalculateHash(InitializeTable(polynomial), seed, buffer, 0, buffer.Length);
}
private static uint[] InitializeTable(uint polynomial)
{
if (polynomial == 3988292384u && defaultTable != null)
{
return defaultTable;
}
uint[] array = new uint[256];
for (int i = 0; i < 256; i++)
{
uint num = (uint)i;
for (int j = 0; j < 8; j++)
{
num = (((num & 1) != 1) ? (num >> 1) : ((num >> 1) ^ polynomial));
}
array[i] = num;
}
if (polynomial == 3988292384u)
{
defaultTable = array;
}
return array;
}
private static uint CalculateHash(uint[] table, uint seed, byte[] buffer, int start, int size)
{
uint num = seed;
for (int i = start; i < size; i++)
{
num = (num >> 8) ^ table[buffer[i] ^ (num & 0xFF)];
}
return num;
}
private byte[] UInt32ToBigEndianBytes(uint x)
{
return new byte[4]
{
(byte)((x >> 24) & 0xFFu),
(byte)((x >> 16) & 0xFFu),
(byte)((x >> 8) & 0xFFu),
(byte)(x & 0xFFu)
};
}
}
using System.Security.Cryptography;
namespace MyNes.Core;
public class Crc32 : HashAlgorithm
{
public const uint DefaultPolynomial = 3988292384u;
public const uint DefaultSeed = uint.MaxValue;
private uint hash;
private uint seed;
private uint[] table;
private static uint[] defaultTable;
public override int HashSize => 32;
public Crc32()
{
table = InitializeTable(3988292384u);
seed = uint.MaxValue;
Initialize();
}
public Crc32(uint polynomial, uint seed)
{
table = InitializeTable(polynomial);
this.seed = seed;
Initialize();
}
public override void Initialize()
{
hash = seed;
}
protected override void HashCore(byte[] buffer, int start, int length)
{
hash = CalculateHash(table, hash, buffer, start, length);
}
protected override byte[] HashFinal()
{
return HashValue = UInt32ToBigEndianBytes(~hash);
}
public static uint Compute(byte[] buffer)
{
return ~CalculateHash(InitializeTable(3988292384u), uint.MaxValue, buffer, 0, buffer.Length);
}
public static uint Compute(uint seed, byte[] buffer)
{
return ~CalculateHash(InitializeTable(3988292384u), seed, buffer, 0, buffer.Length);
}
public static uint Compute(uint polynomial, uint seed, byte[] buffer)
{
return ~CalculateHash(InitializeTable(polynomial), seed, buffer, 0, buffer.Length);
}
private static uint[] InitializeTable(uint polynomial)
{
if (polynomial == 3988292384u && defaultTable != null)
{
return defaultTable;
}
uint[] array = new uint[256];
for (int i = 0; i < 256; i++)
{
uint num = (uint)i;
for (int j = 0; j < 8; j++)
{
num = (((num & 1) != 1) ? (num >> 1) : ((num >> 1) ^ polynomial));
}
array[i] = num;
}
if (polynomial == 3988292384u)
{
defaultTable = array;
}
return array;
}
private static uint CalculateHash(uint[] table, uint seed, byte[] buffer, int start, int size)
{
uint num = seed;
for (int i = start; i < size; i++)
{
num = (num >> 8) ^ table[buffer[i] ^ (num & 0xFF)];
}
return num;
}
private byte[] UInt32ToBigEndianBytes(uint x)
{
return new byte[4]
{
(byte)((x >> 24) & 0xFFu),
(byte)((x >> 16) & 0xFFu),
(byte)((x >> 8) & 0xFFu),
(byte)(x & 0xFFu)
};
}
}

15
AxibugEmuOnline.Client/Assets/MyNes.Core/EmuRegion.cs
View File

@ -1,9 +1,8 @@
namespace MyNes.Core
{
public enum EmuRegion
{
NTSC,
PALB,
DENDY
}
namespace MyNes.Core;
public enum EmuRegion
{
NTSC,
PALB,
DENDY
}

197
AxibugEmuOnline.Client/Assets/MyNes.Core/EmuSettings.cs
View File

@ -1,100 +1,99 @@
using System.IO;
namespace MyNes.Core
{
public class EmuSettings : ISettings
{
public string SnapsFolder = "Snaps";
public string WavesFolder = "SoundRecords";
public string SnapsFormat = ".png";
public bool SnapsReplace = false;
public int RegionSetting = 0;
public string StateFolder = "States";
public string GameGenieFolder = "GMCodes";
public string SRAMFolder = "Srams";
public bool SaveSRAMAtEmuShutdown = true;
public EmuSettings(string path)
: base(path)
{
}
public override void LoadSettings()
{
base.LoadSettings();
if (MyNesMain.WorkingFolder == null)
{
MyNesMain.MakeWorkingFolder();
}
if (SnapsFolder == "Snaps")
{
SnapsFolder = Path.Combine(MyNesMain.WorkingFolder, "Snaps");
}
if (StateFolder == "States")
{
StateFolder = Path.Combine(MyNesMain.WorkingFolder, "States");
}
if (GameGenieFolder == "GMCodes")
{
GameGenieFolder = Path.Combine(MyNesMain.WorkingFolder, "GMCodes");
}
if (SRAMFolder == "Srams")
{
SRAMFolder = Path.Combine(MyNesMain.WorkingFolder, "Srams");
}
if (WavesFolder == "SoundRecords")
{
WavesFolder = Path.Combine(MyNesMain.WorkingFolder, "SoundRecords");
}
try
{
Directory.CreateDirectory(WavesFolder);
}
catch
{
Tracer.WriteError("Cannot create sound records folder !!");
}
try
{
Directory.CreateDirectory(SnapsFolder);
}
catch
{
Tracer.WriteError("Cannot create snaps folder !!");
}
try
{
Directory.CreateDirectory(StateFolder);
}
catch
{
Tracer.WriteError("Cannot create states folder !!");
}
try
{
Directory.CreateDirectory(SRAMFolder);
}
catch
{
Tracer.WriteError("Cannot create srams folder !!");
}
try
{
Directory.CreateDirectory(GameGenieFolder);
}
catch
{
Tracer.WriteError("Cannot create game genie codes folder !!");
}
StateHandler.StateFolder = StateFolder;
}
}
using System.IO;
namespace MyNes.Core;
public class EmuSettings : ISettings
{
public string SnapsFolder = "Snaps";
public string WavesFolder = "SoundRecords";
public string SnapsFormat = ".png";
public bool SnapsReplace;
public int RegionSetting;
public string StateFolder = "States";
public string GameGenieFolder = "GMCodes";
public string SRAMFolder = "Srams";
public bool SaveSRAMAtEmuShutdown = true;
public EmuSettings(string path)
: base(path)
{
}
public override void LoadSettings()
{
base.LoadSettings();
if (MyNesMain.WorkingFolder == null)
{
MyNesMain.MakeWorkingFolder();
}
if (SnapsFolder == "Snaps")
{
SnapsFolder = Path.Combine(MyNesMain.WorkingFolder, "Snaps");
}
if (StateFolder == "States")
{
StateFolder = Path.Combine(MyNesMain.WorkingFolder, "States");
}
if (GameGenieFolder == "GMCodes")
{
GameGenieFolder = Path.Combine(MyNesMain.WorkingFolder, "GMCodes");
}
if (SRAMFolder == "Srams")
{
SRAMFolder = Path.Combine(MyNesMain.WorkingFolder, "Srams");
}
if (WavesFolder == "SoundRecords")
{
WavesFolder = Path.Combine(MyNesMain.WorkingFolder, "SoundRecords");
}
try
{
Directory.CreateDirectory(WavesFolder);
}
catch
{
Tracer.WriteError("Cannot create sound records folder !!");
}
try
{
Directory.CreateDirectory(SnapsFolder);
}
catch
{
Tracer.WriteError("Cannot create snaps folder !!");
}
try
{
Directory.CreateDirectory(StateFolder);
}
catch
{
Tracer.WriteError("Cannot create states folder !!");
}
try
{
Directory.CreateDirectory(SRAMFolder);
}
catch
{
Tracer.WriteError("Cannot create srams folder !!");
}
try
{
Directory.CreateDirectory(GameGenieFolder);
}
catch
{
Tracer.WriteError("Cannot create game genie codes folder !!");
}
StateHandler.StateFolder = StateFolder;
}
}

763
AxibugEmuOnline.Client/Assets/MyNes.Core/Eprom.cs
View File

@ -1,383 +1,382 @@
using System;
using System.IO;
namespace MyNes.Core
{
internal class Eprom
{
private enum EpromDevice
{
X24C01,
X24C02
}
private enum EpromMode
{
Data,
Addressing,
Idle,
Read,
Write,
Ack,
NotAck,
AckWait
}
private byte[] data;
private EpromMode mode = EpromMode.Data;
private EpromMode nextmode = EpromMode.Data;
private EpromDevice device = EpromDevice.X24C01;
private bool psda;
private bool pscl;
private int output = 0;
private int cbit = 0;
private int caddress = 0;
private int cdata = 0;
private bool isRead;
private bool cSCL;
private bool cSDA;
public Eprom(int memorySize)
{
Console.WriteLine("Initializing Eprom ...");
data = new byte[memorySize];
device = ((memorySize == 256) ? EpromDevice.X24C02 : EpromDevice.X24C01);
Console.WriteLine("Eprom memory size = " + memorySize);
Console.WriteLine("Eprom device = " + device);
}
public void HardReset()
{
pscl = false;
psda = false;
mode = EpromMode.Idle;
nextmode = EpromMode.Idle;
cbit = 0;
caddress = 0;
cdata = 0;
isRead = false;
output = 16;
}
public void Write(int address, byte data)
{
cSCL = (data & 0x20) == 32;
cSDA = (data & 0x40) == 64;
if (pscl && (!cSDA & psda))
{
Start();
}
else if (pscl && (cSDA & !psda))
{
Stop();
}
else if (cSCL & !pscl)
{
switch (device)
{
case EpromDevice.X24C01:
RiseX24C01((data >> 6) & 1);
break;
case EpromDevice.X24C02:
RiseX24C02((data >> 6) & 1);
break;
}
}
else if (!cSCL & pscl)
{
switch (device)
{
case EpromDevice.X24C01:
FallX24C01();
break;
case EpromDevice.X24C02:
FallX24C02();
break;
}
}
pscl = cSCL;
psda = cSDA;
}
public byte Read(int address)
{
return (byte)output;
}
private void Start()
{
switch (device)
{
case EpromDevice.X24C01:
mode = EpromMode.Addressing;
cbit = 0;
caddress = 0;
output = 16;
break;
case EpromDevice.X24C02:
mode = EpromMode.Data;
cbit = 0;
output = 16;
break;
}
}
private void Stop()
{
mode = EpromMode.Idle;
output = 16;
}
private void RiseX24C01(int bit)
{
switch (mode)
{
case EpromMode.Addressing:
if (cbit < 7)
{
caddress &= ~(1 << cbit);
caddress |= bit << cbit++;
}
else if (cbit < 8)
{
cbit = 8;
if (bit != 0)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
else
{
nextmode = EpromMode.Write;
}
}
break;
case EpromMode.Ack:
output = 0;
break;
case EpromMode.Read:
if (cbit < 8)
{
output = (((cdata & (1 << cbit++)) != 0) ? 16 : 0);
}
break;
case EpromMode.Write:
if (cbit < 8)
{
cdata &= ~(1 << cbit);
cdata |= bit << cbit++;
}
break;
case EpromMode.AckWait:
if (bit == 0)
{
nextmode = EpromMode.Idle;
}
break;
case EpromMode.Idle:
case EpromMode.NotAck:
break;
}
}
private void RiseX24C02(int bit)
{
switch (mode)
{
case EpromMode.Data:
if (cbit < 8)
{
cdata &= ~(1 << 7 - cbit);
cdata |= bit << 7 - cbit++;
}
break;
case EpromMode.Addressing:
if (cbit < 8)
{
caddress &= ~(1 << 7 - cbit);
caddress |= bit << 7 - cbit++;
}
break;
case EpromMode.Read:
if (cbit < 8)
{
output = (((cdata & (1 << 7 - cbit++)) != 0) ? 16 : 0);
}
break;
case EpromMode.Write:
if (cbit < 8)
{
cdata &= ~(1 << 7 - cbit);
cdata |= bit << 7 - cbit++;
}
break;
case EpromMode.NotAck:
output = 16;
break;
case EpromMode.Ack:
output = 0;
break;
case EpromMode.AckWait:
if (bit == 0)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
break;
case EpromMode.Idle:
break;
}
}
private void FallX24C01()
{
switch (mode)
{
case EpromMode.Addressing:
if (cbit == 8)
{
mode = EpromMode.Ack;
output = 16;
}
break;
case EpromMode.Ack:
mode = nextmode;
cbit = 0;
output = 16;
break;
case EpromMode.Read:
if (cbit == 8)
{
mode = EpromMode.AckWait;
caddress = (caddress + 1) & 0x7F;
}
break;
case EpromMode.Write:
if (cbit == 8)
{
mode = EpromMode.Ack;
nextmode = EpromMode.Idle;
data[caddress] = (byte)cdata;
caddress = (caddress + 1) & 0x7F;
}
break;
case EpromMode.Idle:
break;
}
}
private void FallX24C02()
{
switch (mode)
{
case EpromMode.Data:
if (cbit != 8)
{
break;
}
if ((cdata & 0xA0) == 160)
{
cbit = 0;
mode = EpromMode.Ack;
isRead = (cdata & 1) == 1;
output = 16;
if (isRead)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
else
{
nextmode = EpromMode.Addressing;
}
}
else
{
mode = EpromMode.NotAck;
nextmode = EpromMode.Idle;
output = 16;
}
break;
case EpromMode.Addressing:
if (cbit == 8)
{
cbit = 0;
mode = EpromMode.Ack;
nextmode = (isRead ? EpromMode.Idle : EpromMode.Write);
output = 16;
}
break;
case EpromMode.Read:
if (cbit == 8)
{
mode = EpromMode.AckWait;
caddress = (caddress + 1) & 0xFF;
}
break;
case EpromMode.Write:
if (cbit == 8)
{
cbit = 0;
mode = EpromMode.Ack;
nextmode = EpromMode.Write;
data[caddress] = (byte)cdata;
caddress = (caddress + 1) & 0xFF;
}
break;
case EpromMode.NotAck:
mode = EpromMode.Idle;
cbit = 0;
output = 16;
break;
case EpromMode.Ack:
case EpromMode.AckWait:
mode = nextmode;
cbit = 0;
output = 16;
break;
case EpromMode.Idle:
break;
}
}
public void SaveState(BinaryWriter stream)
{
stream.Write(data);
stream.Write((int)mode);
stream.Write((int)nextmode);
stream.Write(psda);
stream.Write(pscl);
stream.Write(output);
stream.Write(cbit);
stream.Write(caddress);
stream.Write(cdata);
stream.Write(isRead);
}
public void LoadState(BinaryReader stream)
{
stream.Read(data, 0, data.Length);
mode = (EpromMode)stream.ReadInt32();
nextmode = (EpromMode)stream.ReadInt32();
psda = stream.ReadBoolean();
pscl = stream.ReadBoolean();
output = stream.ReadInt32();
cbit = stream.ReadInt32();
caddress = stream.ReadInt32();
cdata = stream.ReadInt32();
isRead = stream.ReadBoolean();
}
}
using System;
using System.IO;
namespace MyNes.Core;
internal class Eprom
{
private enum EpromDevice
{
X24C01,
X24C02
}
private enum EpromMode
{
Data,
Addressing,
Idle,
Read,
Write,
Ack,
NotAck,
AckWait
}
private byte[] data;
private EpromMode mode;
private EpromMode nextmode;
private EpromDevice device;
private bool psda;
private bool pscl;
private int output;
private int cbit;
private int caddress;
private int cdata;
private bool isRead;
private bool cSCL;
private bool cSDA;
public Eprom(int memorySize)
{
Console.WriteLine("Initializing Eprom ...");
data = new byte[memorySize];
device = ((memorySize == 256) ? EpromDevice.X24C02 : EpromDevice.X24C01);
Console.WriteLine("Eprom memory size = " + memorySize);
Console.WriteLine("Eprom device = " + device);
}
public void HardReset()
{
pscl = false;
psda = false;
mode = EpromMode.Idle;
nextmode = EpromMode.Idle;
cbit = 0;
caddress = 0;
cdata = 0;
isRead = false;
output = 16;
}
public void Write(int address, byte data)
{
cSCL = (data & 0x20) == 32;
cSDA = (data & 0x40) == 64;
if (pscl && (!cSDA & psda))
{
Start();
}
else if (pscl && (cSDA & !psda))
{
Stop();
}
else if (cSCL & !pscl)
{
switch (device)
{
case EpromDevice.X24C01:
RiseX24C01((data >> 6) & 1);
break;
case EpromDevice.X24C02:
RiseX24C02((data >> 6) & 1);
break;
}
}
else if (!cSCL & pscl)
{
switch (device)
{
case EpromDevice.X24C01:
FallX24C01();
break;
case EpromDevice.X24C02:
FallX24C02();
break;
}
}
pscl = cSCL;
psda = cSDA;
}
public byte Read(int address)
{
return (byte)output;
}
private void Start()
{
switch (device)
{
case EpromDevice.X24C01:
mode = EpromMode.Addressing;
cbit = 0;
caddress = 0;
output = 16;
break;
case EpromDevice.X24C02:
mode = EpromMode.Data;
cbit = 0;
output = 16;
break;
}
}
private void Stop()
{
mode = EpromMode.Idle;
output = 16;
}
private void RiseX24C01(int bit)
{
switch (mode)
{
case EpromMode.Addressing:
if (cbit < 7)
{
caddress &= ~(1 << cbit);
caddress |= bit << cbit++;
}
else if (cbit < 8)
{
cbit = 8;
if (bit != 0)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
else
{
nextmode = EpromMode.Write;
}
}
break;
case EpromMode.Ack:
output = 0;
break;
case EpromMode.Read:
if (cbit < 8)
{
output = (((cdata & (1 << cbit++)) != 0) ? 16 : 0);
}
break;
case EpromMode.Write:
if (cbit < 8)
{
cdata &= ~(1 << cbit);
cdata |= bit << cbit++;
}
break;
case EpromMode.AckWait:
if (bit == 0)
{
nextmode = EpromMode.Idle;
}
break;
case EpromMode.Idle:
case EpromMode.NotAck:
break;
}
}
private void RiseX24C02(int bit)
{
switch (mode)
{
case EpromMode.Data:
if (cbit < 8)
{
cdata &= ~(1 << 7 - cbit);
cdata |= bit << 7 - cbit++;
}
break;
case EpromMode.Addressing:
if (cbit < 8)
{
caddress &= ~(1 << 7 - cbit);
caddress |= bit << 7 - cbit++;
}
break;
case EpromMode.Read:
if (cbit < 8)
{
output = (((cdata & (1 << 7 - cbit++)) != 0) ? 16 : 0);
}
break;
case EpromMode.Write:
if (cbit < 8)
{
cdata &= ~(1 << 7 - cbit);
cdata |= bit << 7 - cbit++;
}
break;
case EpromMode.NotAck:
output = 16;
break;
case EpromMode.Ack:
output = 0;
break;
case EpromMode.AckWait:
if (bit == 0)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
break;
case EpromMode.Idle:
break;
}
}
private void FallX24C01()
{
switch (mode)
{
case EpromMode.Addressing:
if (cbit == 8)
{
mode = EpromMode.Ack;
output = 16;
}
break;
case EpromMode.Ack:
mode = nextmode;
cbit = 0;
output = 16;
break;
case EpromMode.Read:
if (cbit == 8)
{
mode = EpromMode.AckWait;
caddress = (caddress + 1) & 0x7F;
}
break;
case EpromMode.Write:
if (cbit == 8)
{
mode = EpromMode.Ack;
nextmode = EpromMode.Idle;
data[caddress] = (byte)cdata;
caddress = (caddress + 1) & 0x7F;
}
break;
case EpromMode.Idle:
break;
}
}
private void FallX24C02()
{
switch (mode)
{
case EpromMode.Data:
if (cbit != 8)
{
break;
}
if ((cdata & 0xA0) == 160)
{
cbit = 0;
mode = EpromMode.Ack;
isRead = (cdata & 1) == 1;
output = 16;
if (isRead)
{
nextmode = EpromMode.Read;
cdata = data[caddress];
}
else
{
nextmode = EpromMode.Addressing;
}
}
else
{
mode = EpromMode.NotAck;
nextmode = EpromMode.Idle;
output = 16;
}
break;
case EpromMode.Addressing:
if (cbit == 8)
{
cbit = 0;
mode = EpromMode.Ack;
nextmode = (isRead ? EpromMode.Idle : EpromMode.Write);
output = 16;
}
break;
case EpromMode.Read:
if (cbit == 8)
{
mode = EpromMode.AckWait;
caddress = (caddress + 1) & 0xFF;
}
break;
case EpromMode.Write:
if (cbit == 8)
{
cbit = 0;
mode = EpromMode.Ack;
nextmode = EpromMode.Write;
data[caddress] = (byte)cdata;
caddress = (caddress + 1) & 0xFF;
}
break;
case EpromMode.NotAck:
mode = EpromMode.Idle;
cbit = 0;
output = 16;
break;
case EpromMode.Ack:
case EpromMode.AckWait:
mode = nextmode;
cbit = 0;
output = 16;
break;
case EpromMode.Idle:
break;
}
}
public void SaveState(BinaryWriter stream)
{
stream.Write(data);
stream.Write((int)mode);
stream.Write((int)nextmode);
stream.Write(psda);
stream.Write(pscl);
stream.Write(output);
stream.Write(cbit);
stream.Write(caddress);
stream.Write(cdata);
stream.Write(isRead);
}
public void LoadState(BinaryReader stream)
{
stream.Read(data, 0, data.Length);
mode = (EpromMode)stream.ReadInt32();
nextmode = (EpromMode)stream.ReadInt32();
psda = stream.ReadBoolean();
pscl = stream.ReadBoolean();
output = stream.ReadInt32();
cbit = stream.ReadInt32();
caddress = stream.ReadInt32();
cdata = stream.ReadInt32();
isRead = stream.ReadBoolean();
}
}

109
AxibugEmuOnline.Client/Assets/MyNes.Core/FFE.cs
View File

@ -1,56 +1,55 @@
using System.IO;
namespace MyNes.Core
{
internal abstract class FFE : Board
{
protected bool irqEnable;
protected int irqCounter;
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address)
{
case 17665:
irqEnable = false;
NesEmu.IRQFlags &= -9;
break;
case 17666:
irqCounter = (irqCounter & 0xFF00) | data;
break;
case 17667:
irqEnable = true;
irqCounter = (irqCounter & 0xFF) | (data << 8);
break;
}
}
internal override void OnCPUClock()
{
if (irqEnable)
{
irqCounter++;
if (irqCounter >= 65535)
{
irqCounter = 0;
NesEmu.IRQFlags |= 8;
}
}
}
internal override void WriteStateData(ref BinaryWriter bin)
{
base.WriteStateData(ref bin);
bin.Write(irqEnable);
bin.Write(irqCounter);
}
internal override void ReadStateData(ref BinaryReader bin)
{
base.ReadStateData(ref bin);
irqEnable = bin.ReadBoolean();
irqCounter = bin.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
internal abstract class FFE : Board
{
protected bool irqEnable;
protected int irqCounter;
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address)
{
case 17665:
irqEnable = false;
NesEmu.IRQFlags &= -9;
break;
case 17666:
irqCounter = (irqCounter & 0xFF00) | data;
break;
case 17667:
irqEnable = true;
irqCounter = (irqCounter & 0xFF) | (data << 8);
break;
}
}
internal override void OnCPUClock()
{
if (irqEnable)
{
irqCounter++;
if (irqCounter >= 65535)
{
irqCounter = 0;
NesEmu.IRQFlags |= 8;
}
}
}
internal override void WriteStateData(ref BinaryWriter bin)
{
base.WriteStateData(ref bin);
bin.Write(irqEnable);
bin.Write(irqCounter);
}
internal override void ReadStateData(ref BinaryReader bin)
{
base.ReadStateData(ref bin);
irqEnable = bin.ReadBoolean();
irqCounter = bin.ReadInt32();
}
}

302
AxibugEmuOnline.Client/Assets/MyNes.Core/GameGenie.cs
View File

@ -1,153 +1,151 @@
using System.Collections.Generic;
namespace MyNes.Core
{
public class GameGenie
{
public string[] LettersTable = new string[16]
{
"A", "P", "Z", "L", "G", "I", "T", "Y", "E", "O",
"X", "U", "K", "S", "V", "N"
};
public byte[] HEXTable = new byte[16]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15
};
private List<string> lettersTable = new List<string>();
public GameGenie()
{
lettersTable = new List<string>(LettersTable);
}
public int GetCodeAsHEX(string code)
{
int num = 0;
int num2 = code.ToCharArray().Length - 1;
char[] array = code.ToCharArray();
foreach (char c in array)
{
num |= HEXTable[lettersTable.IndexOf(c.ToString())] << num2 * 4;
num2--;
}
return num;
}
public byte GetGGValue(int code, int length)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = 0;
switch (length)
{
case 6:
num8 = (code & 0x800000) >> 23;
num7 = (code & 0x40000) >> 18;
num6 = (code & 0x20000) >> 17;
num5 = (code & 0x10000) >> 16;
num4 = (code & 8) >> 3;
num3 = (code & 0x400000) >> 22;
num2 = (code & 0x200000) >> 21;
num = (code & 0x100000) >> 20;
break;
case 8:
num8 = (code >> 31) & 1;
num7 = (code >> 27) & 1;
num6 = (code >> 26) & 1;
num5 = (code >> 25) & 1;
num4 = (code >> 3) & 1;
num3 = (code >> 30) & 1;
num2 = (code >> 29) & 1;
num = (code >> 28) & 1;
break;
}
return (byte)((num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num);
}
public int GetGGAddress(int code, int length)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = 0;
int num9 = 0;
int num10 = 0;
int num11 = 0;
int num12 = 0;
int num13 = 0;
int num14 = 0;
int num15 = 0;
switch (length)
{
case 6:
num15 = (code >> 10) & 1;
num14 = (code >> 9) & 1;
num13 = (code >> 8) & 1;
num12 = (code >> 7) & 1;
num11 = (code >> 2) & 1;
num10 = (code >> 1) & 1;
num9 = code & 1;
num8 = (code >> 19) & 1;
num7 = (code >> 14) & 1;
num6 = (code >> 13) & 1;
num5 = (code >> 12) & 1;
num4 = (code >> 11) & 1;
num3 = (code >> 6) & 1;
num2 = (code >> 5) & 1;
num = (code >> 4) & 1;
break;
case 8:
num15 = (code >> 18) & 1;
num14 = (code >> 17) & 1;
num13 = (code >> 16) & 1;
num12 = (code >> 15) & 1;
num11 = (code >> 10) & 1;
num10 = (code >> 9) & 1;
num9 = (code >> 8) & 1;
num8 = (code >> 25) & 1;
num7 = (code >> 22) & 1;
num6 = (code >> 21) & 1;
num5 = (code >> 20) & 1;
num4 = (code >> 19) & 1;
num3 = (code >> 14) & 1;
num2 = (code >> 13) & 1;
num = (code >> 12) & 1;
break;
}
return (num15 << 14) | (num14 << 13) | (num13 << 12) | (num12 << 11) | (num11 << 10) | (num10 << 9) | (num9 << 8) | (num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num;
}
public byte GetGGCompareValue(int code)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = 0;
num8 = (code >> 7) & 1;
num7 = (code >> 2) & 1;
num6 = (code >> 1) & 1;
num5 = code & 1;
num4 = (code >> 11) & 1;
num3 = (code >> 6) & 1;
num2 = (code >> 5) & 1;
num = (code >> 4) & 1;
return (byte)((num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num);
}
}
using System.Collections.Generic;
namespace MyNes.Core;
public class GameGenie
{
public string[] LettersTable = new string[16]
{
"A", "P", "Z", "L", "G", "I", "T", "Y", "E", "O",
"X", "U", "K", "S", "V", "N"
};
public byte[] HEXTable = new byte[16]
{
0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
10, 11, 12, 13, 14, 15
};
private List<string> lettersTable = new List<string>();
public GameGenie()
{
lettersTable = new List<string>(LettersTable);
}
public int GetCodeAsHEX(string code)
{
int num = 0;
int num2 = code.ToCharArray().Length - 1;
char[] array = code.ToCharArray();
foreach (char c in array)
{
num |= HEXTable[lettersTable.IndexOf(c.ToString())] << num2 * 4;
num2--;
}
return num;
}
public byte GetGGValue(int code, int length)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = 0;
switch (length)
{
case 6:
num8 = (code & 0x800000) >> 23;
num7 = (code & 0x40000) >> 18;
num6 = (code & 0x20000) >> 17;
num5 = (code & 0x10000) >> 16;
num4 = (code & 8) >> 3;
num3 = (code & 0x400000) >> 22;
num2 = (code & 0x200000) >> 21;
num = (code & 0x100000) >> 20;
break;
case 8:
num8 = (code >> 31) & 1;
num7 = (code >> 27) & 1;
num6 = (code >> 26) & 1;
num5 = (code >> 25) & 1;
num4 = (code >> 3) & 1;
num3 = (code >> 30) & 1;
num2 = (code >> 29) & 1;
num = (code >> 28) & 1;
break;
}
return (byte)((num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num);
}
public int GetGGAddress(int code, int length)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = 0;
int num9 = 0;
int num10 = 0;
int num11 = 0;
int num12 = 0;
int num13 = 0;
int num14 = 0;
int num15 = 0;
switch (length)
{
case 6:
num15 = (code >> 10) & 1;
num14 = (code >> 9) & 1;
num13 = (code >> 8) & 1;
num12 = (code >> 7) & 1;
num11 = (code >> 2) & 1;
num10 = (code >> 1) & 1;
num9 = code & 1;
num8 = (code >> 19) & 1;
num7 = (code >> 14) & 1;
num6 = (code >> 13) & 1;
num5 = (code >> 12) & 1;
num4 = (code >> 11) & 1;
num3 = (code >> 6) & 1;
num2 = (code >> 5) & 1;
num = (code >> 4) & 1;
break;
case 8:
num15 = (code >> 18) & 1;
num14 = (code >> 17) & 1;
num13 = (code >> 16) & 1;
num12 = (code >> 15) & 1;
num11 = (code >> 10) & 1;
num10 = (code >> 9) & 1;
num9 = (code >> 8) & 1;
num8 = (code >> 25) & 1;
num7 = (code >> 22) & 1;
num6 = (code >> 21) & 1;
num5 = (code >> 20) & 1;
num4 = (code >> 19) & 1;
num3 = (code >> 14) & 1;
num2 = (code >> 13) & 1;
num = (code >> 12) & 1;
break;
}
return (num15 << 14) | (num14 << 13) | (num13 << 12) | (num12 << 11) | (num11 << 10) | (num10 << 9) | (num9 << 8) | (num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num;
}
public byte GetGGCompareValue(int code)
{
int num = 0;
int num2 = 0;
int num3 = 0;
int num4 = 0;
int num5 = 0;
int num6 = 0;
int num7 = 0;
int num8 = (code >> 7) & 1;
num7 = (code >> 2) & 1;
num6 = (code >> 1) & 1;
num5 = code & 1;
num4 = (code >> 11) & 1;
num3 = (code >> 6) & 1;
num2 = (code >> 5) & 1;
num = (code >> 4) & 1;
return (byte)((num8 << 7) | (num7 << 6) | (num6 << 5) | (num5 << 4) | (num4 << 3) | (num3 << 2) | (num2 << 1) | num);
}
}

35
AxibugEmuOnline.Client/Assets/MyNes.Core/GameGenieCode.cs
View File

@ -1,19 +1,18 @@
namespace MyNes.Core
{
public struct GameGenieCode
{
public string Name;
public string Descreption;
public int Address;
public byte Compare;
public byte Value;
public bool IsCompare;
public bool Enabled;
}
namespace MyNes.Core;
public struct GameGenieCode
{
public string Name;
public string Descreption;
public int Address;
public byte Compare;
public byte Value;
public bool IsCompare;
public bool Enabled;
}

7
AxibugEmuOnline.Client/Assets/MyNes.Core/GetIsPlaying.cs
View File

@ -1,4 +1,3 @@
namespace MyNes.Core
{
internal delegate void GetIsPlaying(out bool playing);
}
namespace MyNes.Core;
internal delegate void GetIsPlaying(out bool playing);

13
AxibugEmuOnline.Client/Assets/MyNes.Core/HassIssuesAttribute.cs
View File

@ -1,8 +1,7 @@
using System;
namespace MyNes.Core
{
internal class HassIssuesAttribute : Attribute
{
}
using System;
namespace MyNes.Core;
internal class HassIssuesAttribute : Attribute
{
}

352
AxibugEmuOnline.Client/Assets/MyNes.Core/HelperTools.cs
View File

@ -1,181 +1,173 @@
using System.IO;
using System.Security.Cryptography;
namespace MyNes.Core
{
public class HelperTools
{
public static string GetFileSize(string FilePath)
{
if (File.Exists(Path.GetFullPath(FilePath)))
{
FileInfo fileInfo = new FileInfo(FilePath);
string text = " Byte";
double num = fileInfo.Length;
if (fileInfo.Length >= 1024)
{
num = (double)fileInfo.Length / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
return num.ToString("F2") + text;
}
return "";
}
public static string GetSize(long size)
{
string text = " Byte";
double num = size;
if (size >= 1024)
{
num = (double)size / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
if (num < 0.0)
{
return "???";
}
return num.ToString("F2") + text;
}
public static string GetSize(ulong size)
{
string text = " Byte";
double num = size;
if (size >= 1024)
{
num = (double)size / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
if (num < 0.0)
{
return "???";
}
return num.ToString("F2") + text;
}
public static long GetSizeAsBytes(string FilePath)
{
if (File.Exists(FilePath))
{
FileInfo fileInfo = new FileInfo(FilePath);
return fileInfo.Length;
}
return 0L;
}
public static bool IsStringContainsNumbers(string text)
{
char[] array = text.ToCharArray();
foreach (char c in array)
{
int result = 0;
if (int.TryParse(c.ToString(), out result))
{
return true;
}
}
return false;
}
public static string CalculateCRC(string filePath)
{
if (File.Exists(filePath))
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
byte[] buffer = new byte[stream.Length];
stream.Read(buffer, 0, (int)stream.Length);
stream.Close();
string text = "";
Crc32 crc = new Crc32();
byte[] array = crc.ComputeHash(buffer);
byte[] array2 = array;
foreach (byte b in array2)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static string CalculateCRC(string filePath, int bytesToSkip)
{
if (File.Exists(filePath))
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
stream.Read(new byte[bytesToSkip], 0, bytesToSkip);
byte[] buffer = new byte[stream.Length - bytesToSkip];
stream.Read(buffer, 0, (int)(stream.Length - bytesToSkip));
stream.Close();
string text = "";
Crc32 crc = new Crc32();
byte[] array = crc.ComputeHash(buffer);
byte[] array2 = array;
foreach (byte b in array2)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static string CalculateSHA1(string filePath)
{
if (File.Exists(filePath))
{
byte[] buffer = GetBuffer(filePath);
string text = "";
SHA1Managed sHA1Managed = new SHA1Managed();
byte[] array = sHA1Managed.ComputeHash(buffer);
byte[] array2 = array;
foreach (byte b in array2)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static byte[] GetBuffer(string filePath)
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
byte[] array = new byte[stream.Length];
stream.Read(array, 0, (int)stream.Length);
stream.Close();
return array;
}
}
using System.IO;
using System.Security.Cryptography;
namespace MyNes.Core;
public class HelperTools
{
public static string GetFileSize(string FilePath)
{
if (File.Exists(Path.GetFullPath(FilePath)))
{
FileInfo fileInfo = new FileInfo(FilePath);
string text = " Byte";
double num = fileInfo.Length;
if (fileInfo.Length >= 1024)
{
num = (double)fileInfo.Length / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
return num.ToString("F2") + text;
}
return "";
}
public static string GetSize(long size)
{
string text = " Byte";
double num = size;
if (size >= 1024)
{
num = (double)size / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
if (num < 0.0)
{
return "???";
}
return num.ToString("F2") + text;
}
public static string GetSize(ulong size)
{
string text = " Byte";
double num = size;
if (size >= 1024)
{
num = (double)size / 1024.0;
text = " KB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " MB";
}
if (num >= 1024.0)
{
num /= 1024.0;
text = " GB";
}
if (num < 0.0)
{
return "???";
}
return num.ToString("F2") + text;
}
public static long GetSizeAsBytes(string FilePath)
{
if (File.Exists(FilePath))
{
return new FileInfo(FilePath).Length;
}
return 0L;
}
public static bool IsStringContainsNumbers(string text)
{
char[] array = text.ToCharArray();
foreach (char c in array)
{
int result = 0;
if (int.TryParse(c.ToString(), out result))
{
return true;
}
}
return false;
}
public static string CalculateCRC(string filePath)
{
if (File.Exists(filePath))
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
byte[] buffer = new byte[stream.Length];
stream.Read(buffer, 0, (int)stream.Length);
stream.Close();
string text = "";
byte[] array = new Crc32().ComputeHash(buffer);
foreach (byte b in array)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static string CalculateCRC(string filePath, int bytesToSkip)
{
if (File.Exists(filePath))
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
stream.Read(new byte[bytesToSkip], 0, bytesToSkip);
byte[] buffer = new byte[stream.Length - bytesToSkip];
stream.Read(buffer, 0, (int)(stream.Length - bytesToSkip));
stream.Close();
string text = "";
byte[] array = new Crc32().ComputeHash(buffer);
foreach (byte b in array)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static string CalculateSHA1(string filePath)
{
if (File.Exists(filePath))
{
byte[] buffer = GetBuffer(filePath);
string text = "";
byte[] array = new SHA1Managed().ComputeHash(buffer);
foreach (byte b in array)
{
text += b.ToString("x2").ToLower();
}
return text;
}
return "";
}
public static byte[] GetBuffer(string filePath)
{
Stream stream = new FileStream(filePath, FileMode.Open, FileAccess.Read);
byte[] array = new byte[stream.Length];
stream.Read(array, 0, (int)stream.Length);
stream.Close();
return array;
}
}

55
AxibugEmuOnline.Client/Assets/MyNes.Core/IAudioProvider.cs
View File

@ -1,29 +1,28 @@
namespace MyNes.Core
{
public interface IAudioProvider
{
string Name { get; }
string ID { get; }
bool AllowBufferChange { get; }
bool AllowFrequencyChange { get; }
void SubmitSamples(ref short[] buffer, ref int samples_added);
void TogglePause(bool paused);
void GetIsPlaying(out bool playing);
void Initialize();
void ShutDown();
void Reset();
void SignalToggle(bool started);
void SetVolume(int Vol);
}
namespace MyNes.Core;
public interface IAudioProvider
{
string Name { get; }
string ID { get; }
bool AllowBufferChange { get; }
bool AllowFrequencyChange { get; }
void SubmitSamples(ref short[] buffer, ref int samples_added);
void TogglePause(bool paused);
void GetIsPlaying(out bool playing);
void Initialize();
void ShutDown();
void Reset();
void SignalToggle(bool started);
void SetVolume(int Vol);
}

33
AxibugEmuOnline.Client/Assets/MyNes.Core/IJoypadConnecter.cs
View File

@ -1,18 +1,17 @@
namespace MyNes.Core
{
public abstract class IJoypadConnecter
{
protected byte DATA;
public abstract void Update();
public virtual void Destroy()
{
}
public virtual byte GetData()
{
return DATA;
}
}
namespace MyNes.Core;
public abstract class IJoypadConnecter
{
protected byte DATA;
public abstract void Update();
public virtual void Destroy()
{
}
public virtual byte GetData()
{
return DATA;
}
}

189
AxibugEmuOnline.Client/Assets/MyNes.Core/INes.cs
View File

@ -1,97 +1,94 @@
using System.IO;
using System.Security.Cryptography;
namespace MyNes.Core
{
public class INes : IRom
{
public bool HasBattery { get; private set; }
public bool IsPlaychoice10 { get; private set; }
public bool IsVSUnisystem { get; private set; }
public override void Load(string fileName, bool loadDumps)
{
FileStream fileStream = new FileStream(fileName, FileMode.Open, FileAccess.Read);
if (fileStream.Length < 16)
{
fileStream.Close();
base.IsValid = false;
return;
}
byte[] array = new byte[16];
fileStream.Read(array, 0, 16);
byte[] buffer = new byte[fileStream.Length - 16];
fileStream.Read(buffer, 0, (int)(fileStream.Length - 16));
base.SHA1 = "";
SHA1Managed sHA1Managed = new SHA1Managed();
byte[] array2 = sHA1Managed.ComputeHash(buffer);
byte[] array3 = array2;
foreach (byte b in array3)
{
base.SHA1 += b.ToString("x2").ToLower();
}
if (array[0] != 78 || array[1] != 69 || array[2] != 83 || array[3] != 26)
{
fileStream.Close();
base.IsValid = false;
return;
}
base.PRGCount = array[4];
base.CHRCount = array[5];
switch (array[6] & 9)
{
case 0:
base.Mirroring = Mirroring.Horz;
break;
case 1:
base.Mirroring = Mirroring.Vert;
break;
case 8:
case 9:
base.Mirroring = Mirroring.Full;
break;
}
HasBattery = (array[6] & 2) != 0;
base.HasTrainer = (array[6] & 4) != 0;
if ((array[7] & 0xF) == 0)
{
base.MapperNumber = (byte)((array[7] & 0xF0) | (array[6] >> 4));
}
else
{
base.MapperNumber = (byte)(array[6] >> 4);
}
IsVSUnisystem = (array[7] & 1) != 0;
IsPlaychoice10 = (array[7] & 2) != 0;
if (loadDumps)
{
fileStream.Seek(16L, SeekOrigin.Begin);
if (base.HasTrainer)
{
base.Trainer = new byte[512];
fileStream.Read(base.Trainer, 0, 512);
}
else
{
base.Trainer = new byte[0];
}
base.PRG = new byte[base.PRGCount * 16384];
fileStream.Read(base.PRG, 0, base.PRGCount * 16384);
if (base.CHRCount > 0)
{
base.CHR = new byte[base.CHRCount * 8192];
fileStream.Read(base.CHR, 0, base.CHRCount * 8192);
}
else
{
base.CHR = new byte[0];
}
}
base.IsValid = true;
fileStream.Dispose();
fileStream.Close();
}
}
using System.IO;
using System.Security.Cryptography;
namespace MyNes.Core;
public class INes : IRom
{
public bool HasBattery { get; private set; }
public bool IsPlaychoice10 { get; private set; }
public bool IsVSUnisystem { get; private set; }
public override void Load(string fileName, bool loadDumps)
{
FileStream fileStream = new FileStream(fileName, FileMode.Open, FileAccess.Read);
if (fileStream.Length < 16)
{
fileStream.Close();
base.IsValid = false;
return;
}
byte[] array = new byte[16];
fileStream.Read(array, 0, 16);
byte[] buffer = new byte[fileStream.Length - 16];
fileStream.Read(buffer, 0, (int)(fileStream.Length - 16));
base.SHA1 = "";
byte[] array2 = new SHA1Managed().ComputeHash(buffer);
foreach (byte b in array2)
{
base.SHA1 += b.ToString("x2").ToLower();
}
if (array[0] != 78 || array[1] != 69 || array[2] != 83 || array[3] != 26)
{
fileStream.Close();
base.IsValid = false;
return;
}
base.PRGCount = array[4];
base.CHRCount = array[5];
switch (array[6] & 9)
{
case 0:
base.Mirroring = Mirroring.Horz;
break;
case 1:
base.Mirroring = Mirroring.Vert;
break;
case 8:
case 9:
base.Mirroring = Mirroring.Full;
break;
}
HasBattery = (array[6] & 2) != 0;
base.HasTrainer = (array[6] & 4) != 0;
if ((array[7] & 0xF) == 0)
{
base.MapperNumber = (byte)((array[7] & 0xF0) | (array[6] >> 4));
}
else
{
base.MapperNumber = (byte)(array[6] >> 4);
}
IsVSUnisystem = (array[7] & 1) != 0;
IsPlaychoice10 = (array[7] & 2) != 0;
if (loadDumps)
{
fileStream.Seek(16L, SeekOrigin.Begin);
if (base.HasTrainer)
{
base.Trainer = new byte[512];
fileStream.Read(base.Trainer, 0, 512);
}
else
{
base.Trainer = new byte[0];
}
base.PRG = new byte[base.PRGCount * 16384];
fileStream.Read(base.PRG, 0, base.PRGCount * 16384);
if (base.CHRCount > 0)
{
base.CHR = new byte[base.CHRCount * 8192];
fileStream.Read(base.CHR, 0, base.CHRCount * 8192);
}
else
{
base.CHR = new byte[0];
}
}
base.IsValid = true;
fileStream.Dispose();
fileStream.Close();
}
}

55
AxibugEmuOnline.Client/Assets/MyNes.Core/IRom.cs
View File

@ -1,29 +1,28 @@
namespace MyNes.Core
{
public abstract class IRom
{
public bool IsValid { get; set; }
public int PRGCount { get; set; }
public int CHRCount { get; set; }
public int MapperNumber { get; set; }
public Mirroring Mirroring { get; set; }
public bool HasTrainer { get; set; }
public byte[] PRG { get; set; }
public byte[] CHR { get; set; }
public byte[] Trainer { get; set; }
public string SHA1 { get; set; }
public virtual void Load(string fileName, bool loadDumps)
{
}
}
namespace MyNes.Core;
public abstract class IRom
{
public bool IsValid { get; set; }
public int PRGCount { get; set; }
public int CHRCount { get; set; }
public int MapperNumber { get; set; }
public Mirroring Mirroring { get; set; }
public bool HasTrainer { get; set; }
public byte[] PRG { get; set; }
public byte[] CHR { get; set; }
public byte[] Trainer { get; set; }
public string SHA1 { get; set; }
public virtual void Load(string fileName, bool loadDumps)
{
}
}

299
AxibugEmuOnline.Client/Assets/MyNes.Core/ISettings.cs
View File

@ -1,149 +1,152 @@
using System;
using System.Collections.Generic;
using System.IO;
using System.Reflection;
namespace MyNes.Core
{
public abstract class ISettings
{
protected string filePath;
protected FieldInfo[] Fields;
public ISettings(string filePath)
{
this.filePath = filePath;
}
public virtual void LoadSettings()
{
Fields = GetType().GetFields();
if (!File.Exists(filePath))
{
return;
}
string[] array = File.ReadAllLines(filePath);
for (int i = 0; i < array.Length; i++)
{
string[] array2 = array[i].Split('=');
if (array2 != null && array2.Length == 2)
{
SetField(array2[0], array2[1]);
}
}
}
public virtual void SaveSettings()
{
Fields = GetType().GetFields();
List<string> list = new List<string>();
FieldInfo[] fields = Fields;
foreach (FieldInfo fieldInfo in fields)
{
if (fieldInfo.IsPublic)
{
list.Add(fieldInfo.Name + "=" + GetFieldValue(fieldInfo));
}
}
File.WriteAllLines(filePath, list.ToArray());
}
protected virtual void SetField(string fieldName, string val)
{
for (int i = 0; i < Fields.Length; i++)
{
if (!(Fields[i].Name == fieldName))
{
continue;
}
if (Fields[i].FieldType == typeof(string))
{
Fields[i].SetValue(this, val);
}
else if (Fields[i].FieldType == typeof(bool))
{
Fields[i].SetValue(this, val == "1");
}
else if (Fields[i].FieldType == typeof(int))
{
int result = 0;
if (int.TryParse(val, out result))
{
Fields[i].SetValue(this, result);
}
}
else if (Fields[i].FieldType == typeof(float))
{
float result2 = 0f;
if (float.TryParse(val, out result2))
{
Fields[i].SetValue(this, result2);
}
}
else if (Fields[i].FieldType == typeof(string[]))
{
string[] value = val.Split(new string[1] { "*" }, StringSplitOptions.RemoveEmptyEntries);
Fields[i].SetValue(this, value);
}
else
{
Tracer.WriteLine("Unknown setting type = " + Fields[i].FieldType);
}
break;
}
}
protected virtual string GetFieldValue(string fieldName)
{
for (int i = 0; i < Fields.Length; i++)
{
if (Fields[i].Name == fieldName)
{
return GetFieldValue(Fields[i]);
}
}
return "";
}
protected virtual string GetFieldValue(FieldInfo field)
{
object value = field.GetValue(this);
if (field.FieldType == typeof(string))
{
return value.ToString();
}
if (field.FieldType == typeof(bool))
{
return ((bool)value) ? "1" : "0";
}
if (field.FieldType == typeof(int))
{
return value.ToString();
}
if (field.FieldType == typeof(float))
{
return value.ToString();
}
if (field.FieldType == typeof(string[]))
{
string text = "";
string[] array = (string[])value;
if (array != null)
{
string[] array2 = array;
foreach (string text2 in array2)
{
text = text + text2 + "*";
}
}
if (text.Length > 0)
{
return text.Substring(0, text.Length - 1);
}
return "";
}
return "";
}
}
using System;
using System.Collections.Generic;
using System.IO;
using System.Reflection;
namespace MyNes.Core;
public abstract class ISettings
{
protected string filePath;
protected FieldInfo[] Fields;
public ISettings(string filePath)
{
this.filePath = filePath;
}
public virtual void LoadSettings()
{
Fields = GetType().GetFields();
if (!File.Exists(filePath))
{
return;
}
string[] array = File.ReadAllLines(filePath);
for (int i = 0; i < array.Length; i++)
{
string[] array2 = array[i].Split('=');
if (array2 != null && array2.Length == 2)
{
SetField(array2[0], array2[1]);
}
}
}
public virtual void SaveSettings()
{
Fields = GetType().GetFields();
List<string> list = new List<string>();
FieldInfo[] fields = Fields;
foreach (FieldInfo fieldInfo in fields)
{
if (fieldInfo.IsPublic)
{
list.Add(fieldInfo.Name + "=" + GetFieldValue(fieldInfo));
}
}
File.WriteAllLines(filePath, list.ToArray());
}
protected virtual void SetField(string fieldName, string val)
{
for (int i = 0; i < Fields.Length; i++)
{
if (!(Fields[i].Name == fieldName))
{
continue;
}
if (Fields[i].FieldType == typeof(string))
{
Fields[i].SetValue(this, val);
}
else if (Fields[i].FieldType == typeof(bool))
{
Fields[i].SetValue(this, val == "1");
}
else if (Fields[i].FieldType == typeof(int))
{
int result = 0;
if (int.TryParse(val, out result))
{
Fields[i].SetValue(this, result);
}
}
else if (Fields[i].FieldType == typeof(float))
{
float result2 = 0f;
if (float.TryParse(val, out result2))
{
Fields[i].SetValue(this, result2);
}
}
else if (Fields[i].FieldType == typeof(string[]))
{
string[] value = val.Split(new string[1] { "*" }, StringSplitOptions.RemoveEmptyEntries);
Fields[i].SetValue(this, value);
}
else
{
Tracer.WriteLine("Unknown setting type = " + Fields[i].FieldType);
}
break;
}
}
protected virtual string GetFieldValue(string fieldName)
{
for (int i = 0; i < Fields.Length; i++)
{
if (Fields[i].Name == fieldName)
{
return GetFieldValue(Fields[i]);
}
}
return "";
}
protected virtual string GetFieldValue(FieldInfo field)
{
object value = field.GetValue(this);
if (field.FieldType == typeof(string))
{
return value.ToString();
}
if (field.FieldType == typeof(bool))
{
if (!(bool)value)
{
return "0";
}
return "1";
}
if (field.FieldType == typeof(int))
{
return value.ToString();
}
if (field.FieldType == typeof(float))
{
return value.ToString();
}
if (field.FieldType == typeof(string[]))
{
string text = "";
string[] array = (string[])value;
if (array != null)
{
string[] array2 = array;
foreach (string text2 in array2)
{
text = text + text2 + "*";
}
}
if (text.Length > 0)
{
return text.Substring(0, text.Length - 1);
}
return "";
}
return "";
}
}

11
AxibugEmuOnline.Client/Assets/MyNes.Core/IShortcutsHandler.cs
View File

@ -1,7 +1,6 @@
namespace MyNes.Core
{
public interface IShortcutsHandler
{
void Update();
}
namespace MyNes.Core;
public interface IShortcutsHandler
{
void Update();
}

47
AxibugEmuOnline.Client/Assets/MyNes.Core/IVSUnisystemDIPConnecter.cs
View File

@ -1,25 +1,24 @@
namespace MyNes.Core
{
public abstract class IVSUnisystemDIPConnecter
{
public abstract void Update();
public virtual void OnEmuShutdown()
{
}
public virtual byte GetData4016()
{
return 0;
}
public virtual byte GetData4017()
{
return 0;
}
public virtual void Write4020(ref byte data)
{
}
}
namespace MyNes.Core;
public abstract class IVSUnisystemDIPConnecter
{
public abstract void Update();
public virtual void OnEmuShutdown()
{
}
public virtual byte GetData4016()
{
return 0;
}
public virtual byte GetData4017()
{
return 0;
}
public virtual void Write4020(ref byte data)
{
}
}

79
AxibugEmuOnline.Client/Assets/MyNes.Core/IVideoProvider.cs
View File

@ -1,41 +1,40 @@
namespace MyNes.Core
{
public interface IVideoProvider
{
string Name { get; }
string ID { get; }
void WriteErrorNotification(string message, bool instant);
void WriteInfoNotification(string message, bool instant);
void WriteWarningNotification(string message, bool instant);
void TakeSnapshotAs(string path, string format);
void TakeSnapshot();
void Initialize();
void ShutDown();
void SignalToggle(bool started);
void SubmitFrame(ref int[] buffer);
void ResizeBegin();
void ResizeEnd();
void ApplyRegionChanges();
void Resume();
void ToggleAspectRatio(bool keep_aspect);
void ToggleFPS(bool show_fps);
void ApplyFilter();
}
namespace MyNes.Core;
public interface IVideoProvider
{
string Name { get; }
string ID { get; }
void WriteErrorNotification(string message, bool instant);
void WriteInfoNotification(string message, bool instant);
void WriteWarningNotification(string message, bool instant);
void TakeSnapshotAs(string path, string format);
void TakeSnapshot();
void Initialize();
void ShutDown();
void SignalToggle(bool started);
void SubmitFrame(ref int[] buffer);
void ResizeBegin();
void ResizeEnd();
void ApplyRegionChanges();
void Resume();
void ToggleAspectRatio(bool keep_aspect);
void ToggleFPS(bool show_fps);
void ApplyFilter();
}

29
AxibugEmuOnline.Client/Assets/MyNes.Core/IZapperConnecter.cs
View File

@ -1,16 +1,15 @@
namespace MyNes.Core
{
public abstract class IZapperConnecter
{
protected bool Trigger;
protected bool State;
public abstract void Update();
public virtual byte GetData()
{
return (byte)((Trigger ? 16u : 0u) | (State ? 8u : 0u));
}
}
namespace MyNes.Core;
public abstract class IZapperConnecter
{
protected bool Trigger;
protected bool State;
public abstract void Update();
public virtual byte GetData()
{
return (byte)((Trigger ? 16u : 0u) | (State ? 8u : 0u));
}
}

229
AxibugEmuOnline.Client/Assets/MyNes.Core/MMC2.cs
View File

@ -1,116 +1,115 @@
using System.IO;
namespace MyNes.Core
{
internal abstract class MMC2 : Board
{
private byte chr_reg0A;
private byte chr_reg0B;
private byte chr_reg1A;
private byte chr_reg1B;
private byte latch_a = 254;
private byte latch_b = 254;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask - 2, PRGArea.AreaA000);
Switch08KPRG(PRG_ROM_08KB_Mask - 1, PRGArea.AreaC000);
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
chr_reg0B = 4;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF000)
{
case 40960:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 45056:
chr_reg0A = data;
if (latch_a == 253)
{
Switch04KCHR(chr_reg0A, CHRArea.Area0000);
}
break;
case 49152:
chr_reg0B = data;
if (latch_a == 254)
{
Switch04KCHR(chr_reg0B, CHRArea.Area0000);
}
break;
case 53248:
chr_reg1A = data;
if (latch_b == 253)
{
Switch04KCHR(chr_reg1A, CHRArea.Area1000);
}
break;
case 57344:
chr_reg1B = data;
if (latch_b == 254)
{
Switch04KCHR(chr_reg1B, CHRArea.Area1000);
}
break;
case 61440:
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
internal override void ReadCHR(ref ushort address, out byte data)
{
if ((address & 0x1FF0) == 4048 && latch_a != 253)
{
latch_a = 253;
Switch04KCHR(chr_reg0A, CHRArea.Area0000);
}
else if ((address & 0x1FF0) == 4064 && latch_a != 254)
{
latch_a = 254;
Switch04KCHR(chr_reg0B, CHRArea.Area0000);
}
else if ((address & 0x1FF0) == 8144 && latch_b != 253)
{
latch_b = 253;
Switch04KCHR(chr_reg1A, CHRArea.Area1000);
}
else if ((address & 0x1FF0) == 8160 && latch_b != 254)
{
latch_b = 254;
Switch04KCHR(chr_reg1B, CHRArea.Area1000);
}
base.ReadCHR(ref address, out data);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_reg0A);
stream.Write(chr_reg0B);
stream.Write(chr_reg1A);
stream.Write(chr_reg1B);
stream.Write(latch_a);
stream.Write(latch_b);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_reg0A = stream.ReadByte();
chr_reg0B = stream.ReadByte();
chr_reg1A = stream.ReadByte();
chr_reg1B = stream.ReadByte();
latch_a = stream.ReadByte();
latch_b = stream.ReadByte();
}
}
using System.IO;
namespace MyNes.Core;
internal abstract class MMC2 : Board
{
private byte chr_reg0A;
private byte chr_reg0B;
private byte chr_reg1A;
private byte chr_reg1B;
private byte latch_a = 254;
private byte latch_b = 254;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask - 2, PRGArea.AreaA000);
Switch08KPRG(PRG_ROM_08KB_Mask - 1, PRGArea.AreaC000);
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
chr_reg0B = 4;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF000)
{
case 40960:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 45056:
chr_reg0A = data;
if (latch_a == 253)
{
Switch04KCHR(chr_reg0A, CHRArea.Area0000);
}
break;
case 49152:
chr_reg0B = data;
if (latch_a == 254)
{
Switch04KCHR(chr_reg0B, CHRArea.Area0000);
}
break;
case 53248:
chr_reg1A = data;
if (latch_b == 253)
{
Switch04KCHR(chr_reg1A, CHRArea.Area1000);
}
break;
case 57344:
chr_reg1B = data;
if (latch_b == 254)
{
Switch04KCHR(chr_reg1B, CHRArea.Area1000);
}
break;
case 61440:
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
internal override void ReadCHR(ref ushort address, out byte data)
{
if ((address & 0x1FF0) == 4048 && latch_a != 253)
{
latch_a = 253;
Switch04KCHR(chr_reg0A, CHRArea.Area0000);
}
else if ((address & 0x1FF0) == 4064 && latch_a != 254)
{
latch_a = 254;
Switch04KCHR(chr_reg0B, CHRArea.Area0000);
}
else if ((address & 0x1FF0) == 8144 && latch_b != 253)
{
latch_b = 253;
Switch04KCHR(chr_reg1A, CHRArea.Area1000);
}
else if ((address & 0x1FF0) == 8160 && latch_b != 254)
{
latch_b = 254;
Switch04KCHR(chr_reg1B, CHRArea.Area1000);
}
base.ReadCHR(ref address, out data);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_reg0A);
stream.Write(chr_reg0B);
stream.Write(chr_reg1A);
stream.Write(chr_reg1B);
stream.Write(latch_a);
stream.Write(latch_b);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_reg0A = stream.ReadByte();
chr_reg0B = stream.ReadByte();
chr_reg1A = stream.ReadByte();
chr_reg1B = stream.ReadByte();
latch_a = stream.ReadByte();
latch_b = stream.ReadByte();
}
}

169
AxibugEmuOnline.Client/Assets/MyNes.Core/MMC5Pcm.cs
View File

@ -1,86 +1,85 @@
using System.IO;
namespace MyNes.Core
{
internal class MMC5Pcm
{
internal byte output;
internal bool Outputable;
private bool readMode;
private bool PCMIRQenable;
private bool irqTrip;
internal void HardReset()
{
output = 0;
readMode = false;
PCMIRQenable = false;
irqTrip = false;
}
internal void SoftReset()
{
HardReset();
}
internal void Write5010(byte data)
{
readMode = (data & 1) == 1;
PCMIRQenable = (data & 0x80) == 128;
if (PCMIRQenable && irqTrip)
{
NesEmu.IRQFlags |= 8;
}
}
internal byte Read5010()
{
byte result = (byte)((irqTrip & PCMIRQenable) ? 128u : 0u);
irqTrip = false;
NesEmu.IRQFlags &= -9;
return result;
}
internal void Write5011(byte data)
{
if (readMode)
{
return;
}
if (data == 0)
{
irqTrip = true;
}
else
{
irqTrip = false;
if (Outputable)
{
output = data;
}
}
if (PCMIRQenable && irqTrip)
{
NesEmu.IRQFlags |= 8;
}
}
internal void SaveState(ref BinaryWriter stream)
{
stream.Write(readMode);
stream.Write(PCMIRQenable);
stream.Write(irqTrip);
}
internal void LoadState(ref BinaryReader stream)
{
readMode = stream.ReadBoolean();
PCMIRQenable = stream.ReadBoolean();
irqTrip = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
internal class MMC5Pcm
{
internal byte output;
internal bool Outputable;
private bool readMode;
private bool PCMIRQenable;
private bool irqTrip;
internal void HardReset()
{
output = 0;
readMode = false;
PCMIRQenable = false;
irqTrip = false;
}
internal void SoftReset()
{
HardReset();
}
internal void Write5010(byte data)
{
readMode = (data & 1) == 1;
PCMIRQenable = (data & 0x80) == 128;
if (PCMIRQenable && irqTrip)
{
NesEmu.IRQFlags |= 8;
}
}
internal byte Read5010()
{
byte result = (byte)((irqTrip & PCMIRQenable) ? 128 : 0);
irqTrip = false;
NesEmu.IRQFlags &= -9;
return result;
}
internal void Write5011(byte data)
{
if (readMode)
{
return;
}
if (data == 0)
{
irqTrip = true;
}
else
{
irqTrip = false;
if (Outputable)
{
output = data;
}
}
if (PCMIRQenable && irqTrip)
{
NesEmu.IRQFlags |= 8;
}
}
internal void SaveState(ref BinaryWriter stream)
{
stream.Write(readMode);
stream.Write(PCMIRQenable);
stream.Write(irqTrip);
}
internal void LoadState(ref BinaryReader stream)
{
readMode = stream.ReadBoolean();
PCMIRQenable = stream.ReadBoolean();
irqTrip = stream.ReadBoolean();
}
}

425
AxibugEmuOnline.Client/Assets/MyNes.Core/MMC5Sqr.cs
View File

@ -1,214 +1,213 @@
using System.IO;
namespace MyNes.Core
{
internal class MMC5Sqr
{
private byte[][] duty_cycle_sequences = new byte[4][]
{
new byte[8] { 0, 0, 0, 0, 0, 0, 0, 1 },
new byte[8] { 0, 0, 0, 0, 0, 0, 1, 1 },
new byte[8] { 0, 0, 0, 0, 1, 1, 1, 1 },
new byte[8] { 1, 1, 1, 1, 1, 1, 0, 0 }
};
private byte[] duration_table = new byte[32]
{
10, 254, 20, 2, 40, 4, 80, 6, 160, 8,
60, 10, 14, 12, 26, 14, 12, 16, 24, 18,
48, 20, 96, 22, 192, 24, 72, 26, 16, 28,
32, 30
};
private byte duty_cycle;
private bool length_halt;
private bool constant_volume_envelope;
private byte volume_devider_period;
private int timer;
private int period_devider;
private byte seqencer;
private bool length_enabled;
private int length_counter;
private bool envelope_start_flag;
private byte envelope_devider;
private byte envelope_decay_level_counter;
private byte envelope;
internal int output;
internal bool Outputable;
internal void HardReset()
{
duty_cycle = 0;
length_halt = false;
constant_volume_envelope = false;
volume_devider_period = 0;
timer = 0;
period_devider = 0;
seqencer = 0;
length_enabled = false;
length_counter = 0;
envelope_start_flag = false;
envelope_devider = 0;
envelope_decay_level_counter = 0;
envelope = 0;
}
internal void SoftReset()
{
HardReset();
}
internal void Clock()
{
period_devider--;
if (period_devider > 0)
{
return;
}
period_devider = timer + 1;
if (length_counter > 0)
{
if (Outputable)
{
output = duty_cycle_sequences[duty_cycle][seqencer] * envelope;
}
}
else
{
output = 0;
}
if (seqencer == 0)
{
seqencer = 7;
}
else
{
seqencer--;
}
}
internal void ClockLength()
{
if (length_counter > 0 && !length_halt)
{
length_counter--;
}
}
internal void ClockEnvelope()
{
if (envelope_start_flag)
{
envelope_start_flag = false;
envelope_decay_level_counter = 15;
envelope_devider = (byte)(volume_devider_period + 1);
}
else if (envelope_devider > 0)
{
envelope_devider--;
}
else
{
envelope_devider = (byte)(volume_devider_period + 1);
if (envelope_decay_level_counter > 0)
{
envelope_decay_level_counter--;
}
else if (length_halt)
{
envelope_decay_level_counter = 15;
}
}
envelope = (constant_volume_envelope ? volume_devider_period : envelope_decay_level_counter);
}
internal void Write0(ref byte value)
{
duty_cycle = (byte)((value & 0xC0) >> 6);
volume_devider_period = (byte)(value & 0xFu);
length_halt = (value & 0x20) != 0;
constant_volume_envelope = (value & 0x10) != 0;
envelope = (constant_volume_envelope ? volume_devider_period : envelope_decay_level_counter);
}
internal void Write2(ref byte value)
{
timer = (timer & 0xFF00) | value;
}
internal void Write3(ref byte value)
{
timer = (timer & 0xFF) | ((value & 7) << 8);
if (length_enabled)
{
length_counter = duration_table[value >> 3];
}
seqencer = 0;
envelope_start_flag = true;
}
internal void WriteEnabled(bool enabled)
{
length_enabled = enabled;
if (!length_enabled)
{
length_counter = 0;
}
}
internal bool ReadEnable()
{
return length_counter > 0;
}
internal void WriteStateData(ref BinaryWriter bin)
{
bin.Write(duty_cycle);
bin.Write(length_halt);
bin.Write(constant_volume_envelope);
bin.Write(volume_devider_period);
bin.Write(timer);
bin.Write(period_devider);
bin.Write(seqencer);
bin.Write(length_enabled);
bin.Write(length_counter);
bin.Write(envelope_start_flag);
bin.Write(envelope_devider);
bin.Write(envelope_decay_level_counter);
bin.Write(envelope);
bin.Write(output);
}
internal void ReadStateData(ref BinaryReader bin)
{
duty_cycle = bin.ReadByte();
length_halt = bin.ReadBoolean();
constant_volume_envelope = bin.ReadBoolean();
volume_devider_period = bin.ReadByte();
timer = bin.ReadInt32();
period_devider = bin.ReadInt32();
seqencer = bin.ReadByte();
length_enabled = bin.ReadBoolean();
length_counter = bin.ReadInt32();
envelope_start_flag = bin.ReadBoolean();
envelope_devider = bin.ReadByte();
envelope_decay_level_counter = bin.ReadByte();
envelope = bin.ReadByte();
output = bin.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
internal class MMC5Sqr
{
private byte[][] duty_cycle_sequences = new byte[4][]
{
new byte[8] { 0, 0, 0, 0, 0, 0, 0, 1 },
new byte[8] { 0, 0, 0, 0, 0, 0, 1, 1 },
new byte[8] { 0, 0, 0, 0, 1, 1, 1, 1 },
new byte[8] { 1, 1, 1, 1, 1, 1, 0, 0 }
};
private byte[] duration_table = new byte[32]
{
10, 254, 20, 2, 40, 4, 80, 6, 160, 8,
60, 10, 14, 12, 26, 14, 12, 16, 24, 18,
48, 20, 96, 22, 192, 24, 72, 26, 16, 28,
32, 30
};
private byte duty_cycle;
private bool length_halt;
private bool constant_volume_envelope;
private byte volume_devider_period;
private int timer;
private int period_devider;
private byte seqencer;
private bool length_enabled;
private int length_counter;
private bool envelope_start_flag;
private byte envelope_devider;
private byte envelope_decay_level_counter;
private byte envelope;
internal int output;
internal bool Outputable;
internal void HardReset()
{
duty_cycle = 0;
length_halt = false;
constant_volume_envelope = false;
volume_devider_period = 0;
timer = 0;
period_devider = 0;
seqencer = 0;
length_enabled = false;
length_counter = 0;
envelope_start_flag = false;
envelope_devider = 0;
envelope_decay_level_counter = 0;
envelope = 0;
}
internal void SoftReset()
{
HardReset();
}
internal void Clock()
{
period_devider--;
if (period_devider > 0)
{
return;
}
period_devider = timer + 1;
if (length_counter > 0)
{
if (Outputable)
{
output = duty_cycle_sequences[duty_cycle][seqencer] * envelope;
}
}
else
{
output = 0;
}
if (seqencer == 0)
{
seqencer = 7;
}
else
{
seqencer--;
}
}
internal void ClockLength()
{
if (length_counter > 0 && !length_halt)
{
length_counter--;
}
}
internal void ClockEnvelope()
{
if (envelope_start_flag)
{
envelope_start_flag = false;
envelope_decay_level_counter = 15;
envelope_devider = (byte)(volume_devider_period + 1);
}
else if (envelope_devider > 0)
{
envelope_devider--;
}
else
{
envelope_devider = (byte)(volume_devider_period + 1);
if (envelope_decay_level_counter > 0)
{
envelope_decay_level_counter--;
}
else if (length_halt)
{
envelope_decay_level_counter = 15;
}
}
envelope = (constant_volume_envelope ? volume_devider_period : envelope_decay_level_counter);
}
internal void Write0(ref byte value)
{
duty_cycle = (byte)((value & 0xC0) >> 6);
volume_devider_period = (byte)(value & 0xFu);
length_halt = (value & 0x20) != 0;
constant_volume_envelope = (value & 0x10) != 0;
envelope = (constant_volume_envelope ? volume_devider_period : envelope_decay_level_counter);
}
internal void Write2(ref byte value)
{
timer = (timer & 0xFF00) | value;
}
internal void Write3(ref byte value)
{
timer = (timer & 0xFF) | ((value & 7) << 8);
if (length_enabled)
{
length_counter = duration_table[value >> 3];
}
seqencer = 0;
envelope_start_flag = true;
}
internal void WriteEnabled(bool enabled)
{
length_enabled = enabled;
if (!length_enabled)
{
length_counter = 0;
}
}
internal bool ReadEnable()
{
return length_counter > 0;
}
internal void WriteStateData(ref BinaryWriter bin)
{
bin.Write(duty_cycle);
bin.Write(length_halt);
bin.Write(constant_volume_envelope);
bin.Write(volume_devider_period);
bin.Write(timer);
bin.Write(period_devider);
bin.Write(seqencer);
bin.Write(length_enabled);
bin.Write(length_counter);
bin.Write(envelope_start_flag);
bin.Write(envelope_devider);
bin.Write(envelope_decay_level_counter);
bin.Write(envelope);
bin.Write(output);
}
internal void ReadStateData(ref BinaryReader bin)
{
duty_cycle = bin.ReadByte();
length_halt = bin.ReadBoolean();
constant_volume_envelope = bin.ReadBoolean();
volume_devider_period = bin.ReadByte();
timer = bin.ReadInt32();
period_devider = bin.ReadInt32();
seqencer = bin.ReadByte();
length_enabled = bin.ReadBoolean();
length_counter = bin.ReadInt32();
envelope_start_flag = bin.ReadBoolean();
envelope_devider = bin.ReadByte();
envelope_decay_level_counter = bin.ReadByte();
envelope = bin.ReadByte();
output = bin.ReadInt32();
}
}

255
AxibugEmuOnline.Client/Assets/MyNes.Core/MNInterfaceLanguage.cs
View File

@ -1,129 +1,128 @@
namespace MyNes.Core
{
public class MNInterfaceLanguage
{
public static string Message_RomInfoCanBeOnlyShown = "Rom info can be shown only when emulation is on (i.e. game is loaded)";
public static string Message_StateSlotSetTo = "State slot set to";
public static string Message_LoadStateCanBeUsedOnly = "Load state as can be used only when emulation is on (i.e. game is loaded)";
public static string Message_SaveStateCanBeUseOnly = "Save state as can be used only when emulation is on (i.e. game is loaded)";
public static string Message_HardResetCanBeUsedOnly = "Hard reset can be used only when emulation is on (i.e. game is loaded)";
public static string Message_SoftResetCanBeUsedOnly = "Soft reset can be used only when emulation is on (i.e. game is loaded)";
public static string Message_TurboCanBeToggledOnly = "Turbo can be toggled only when emulation is on (i.e. game is loaded)";
public static string Message_GameGenieCanBeConfiguredOnly = "Game Genie can be enabled/configured only when emulation is on (i.e. game is loaded)";
public static string Message_Error1 = "Can't save state, emu is off.";
public static string Message_Error2 = "Can't save state, no rom file is loaded.";
public static string Message_Error3 = "Can't save state while loading a state !";
public static string Message_Error4 = "Already saving state !!";
public static string Message_Error5 = "Can't load state, emu is off.";
public static string Message_Error6 = "Can't load state, no rom file is loaded.";
public static string Message_Error7 = "Can't load state while saving a state !";
public static string Message_Error8 = "Already loading state !!";
public static string Message_Error9 = "No state found in slot";
public static string Message_Error10 = "Unable load state at slot";
public static string Message_Error11 = "Not My Nes State File !";
public static string Message_Error12 = "Not compatible state file version !";
public static string Message_Error13 = "This state file is not for this game; not same SHA1 !";
public static string Message_Error14 = "IS NOT LOCATED, mapper is not supported or unable to find it.";
public static string Message_Error15 = "will be used instead, assigned successfully.";
public static string Message_Error16 = "Game Genie code length cannot be more than 8 letters";
public static string Message_Error17 = "has issues and may not function probably with this game.";
public static string Message_Info1 = "State saved at slot";
public static string Message_Info2 = "State loaded from slot";
public static string Message_Info3 = "Snapshot saved";
public static string Message_Info4 = "Interface language set to";
public static string Message_PleaseRestartToApply = "Please restart My Nes to apply.";
public static string Message_HardReset = "HARD RESET !";
public static string Message_SoftReset = "SOFT RESET !";
public static string Message_Paused = "PAUSED";
public static string Mapper = "Mapper";
public static string IssueMapper5 = "Split screen not implemented.\nUchuu Keibitai SDF game graphic corruption for unknown reason in the intro (not in the split screen).";
public static string IssueMapper6 = "Mapper 6 is not tested, issues may occur";
public static string IssueMapper8 = "Mapper 8 is not tested, issues may occur";
public static string IssueMapper33 = "Mapper 33: Akira is not working for unknown reason.";
public static string IssueMapper44 = "In game Super Big 7 - in - 1 : Double Dragon 3 game does not work.";
public static string IssueMapper53 = "Mapper 53 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper56 = "Mapper 56 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper58 = "Study and Game 32-in-1 (Ch) [!].nes needs keyboard ?";
public static string IssueMapper60 = "Mapper 60 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper85 = "VRC7 sound channels are not supported";
public static string IssueMapper90 = "DipSwitch is not implemented, the irq modes 2-3 are not implemented yet.";
public static string IssueMapper96 = "Mapper 96 does not function probably and needs special controller to be implemented.";
public static string IssueMapper105 = "Game hangs on title screen !";
public static string IssueMapper119 = "Mapper 119 does not function probably";
public static string IssueMapper154 = "Game shows glitches with chr";
public static string IssueMapper180 = "Crazy Climber needs special controller which not implemented yet.";
public static string IssueMapper191 = "Mapper 191 is not tested, issues may occur";
public static string IssueMapper193 = "Game show nothing but fighter sprite !";
public static string IssueMapper202 = "150 in 1: some games not work well. Is it mapper or rom dump ?";
public static string IssueMapper203 = "64-in-1: some games not work, maybe something wrong with the implementation or the rom itself";
public static string IssueMapper207 = "Fudou Myouou Den is not assigned as mapper 207 while it should be !";
public static string IssueMapper222 = "Mapper 222 is not tested, issues may occur";
public static string IssueMapper228 = "Mapper 228 does not function probably";
public static string IssueMapper229 = "Mapper 229 is not tested, issues may occur";
public static string IssueMapper230 = "Only Contra works !?";
public static string IssueMapper243 = "Shows glitches in some games.";
public static string IssueMapper245 = "Graphic glitches, maybe chr switches.";
public static string IssueMapper255 = "Mapper 255 is not tested, issues may occur";
}
namespace MyNes.Core;
public class MNInterfaceLanguage
{
public static string Message_RomInfoCanBeOnlyShown = "Rom info can be shown only when emulation is on (i.e. game is loaded)";
public static string Message_StateSlotSetTo = "State slot set to";
public static string Message_LoadStateCanBeUsedOnly = "Load state as can be used only when emulation is on (i.e. game is loaded)";
public static string Message_SaveStateCanBeUseOnly = "Save state as can be used only when emulation is on (i.e. game is loaded)";
public static string Message_HardResetCanBeUsedOnly = "Hard reset can be used only when emulation is on (i.e. game is loaded)";
public static string Message_SoftResetCanBeUsedOnly = "Soft reset can be used only when emulation is on (i.e. game is loaded)";
public static string Message_TurboCanBeToggledOnly = "Turbo can be toggled only when emulation is on (i.e. game is loaded)";
public static string Message_GameGenieCanBeConfiguredOnly = "Game Genie can be enabled/configured only when emulation is on (i.e. game is loaded)";
public static string Message_Error1 = "Can't save state, emu is off.";
public static string Message_Error2 = "Can't save state, no rom file is loaded.";
public static string Message_Error3 = "Can't save state while loading a state !";
public static string Message_Error4 = "Already saving state !!";
public static string Message_Error5 = "Can't load state, emu is off.";
public static string Message_Error6 = "Can't load state, no rom file is loaded.";
public static string Message_Error7 = "Can't load state while saving a state !";
public static string Message_Error8 = "Already loading state !!";
public static string Message_Error9 = "No state found in slot";
public static string Message_Error10 = "Unable load state at slot";
public static string Message_Error11 = "Not My Nes State File !";
public static string Message_Error12 = "Not compatible state file version !";
public static string Message_Error13 = "This state file is not for this game; not same SHA1 !";
public static string Message_Error14 = "IS NOT LOCATED, mapper is not supported or unable to find it.";
public static string Message_Error15 = "will be used instead, assigned successfully.";
public static string Message_Error16 = "Game Genie code length cannot be more than 8 letters";
public static string Message_Error17 = "has issues and may not function probably with this game.";
public static string Message_Info1 = "State saved at slot";
public static string Message_Info2 = "State loaded from slot";
public static string Message_Info3 = "Snapshot saved";
public static string Message_Info4 = "Interface language set to";
public static string Message_PleaseRestartToApply = "Please restart My Nes to apply.";
public static string Message_HardReset = "HARD RESET !";
public static string Message_SoftReset = "SOFT RESET !";
public static string Message_Paused = "PAUSED";
public static string Mapper = "Mapper";
public static string IssueMapper5 = "Split screen not implemented.\nUchuu Keibitai SDF game graphic corruption for unknown reason in the intro (not in the split screen).";
public static string IssueMapper6 = "Mapper 6 is not tested, issues may occur";
public static string IssueMapper8 = "Mapper 8 is not tested, issues may occur";
public static string IssueMapper33 = "Mapper 33: Akira is not working for unknown reason.";
public static string IssueMapper44 = "In game Super Big 7 - in - 1 : Double Dragon 3 game does not work.";
public static string IssueMapper53 = "Mapper 53 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper56 = "Mapper 56 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper58 = "Study and Game 32-in-1 (Ch) [!].nes needs keyboard ?";
public static string IssueMapper60 = "Mapper 60 does not work with the test roms i have, maybe something wrong with the implementation or the roms themselves";
public static string IssueMapper85 = "VRC7 sound channels are not supported";
public static string IssueMapper90 = "DipSwitch is not implemented, the irq modes 2-3 are not implemented yet.";
public static string IssueMapper96 = "Mapper 96 does not function probably and needs special controller to be implemented.";
public static string IssueMapper105 = "Game hangs on title screen !";
public static string IssueMapper119 = "Mapper 119 does not function probably";
public static string IssueMapper154 = "Game shows glitches with chr";
public static string IssueMapper180 = "Crazy Climber needs special controller which not implemented yet.";
public static string IssueMapper191 = "Mapper 191 is not tested, issues may occur";
public static string IssueMapper193 = "Game show nothing but fighter sprite !";
public static string IssueMapper202 = "150 in 1: some games not work well. Is it mapper or rom dump ?";
public static string IssueMapper203 = "64-in-1: some games not work, maybe something wrong with the implementation or the rom itself";
public static string IssueMapper207 = "Fudou Myouou Den is not assigned as mapper 207 while it should be !";
public static string IssueMapper222 = "Mapper 222 is not tested, issues may occur";
public static string IssueMapper228 = "Mapper 228 does not function probably";
public static string IssueMapper229 = "Mapper 229 is not tested, issues may occur";
public static string IssueMapper230 = "Only Contra works !?";
public static string IssueMapper243 = "Shows glitches in some games.";
public static string IssueMapper245 = "Graphic glitches, maybe chr switches.";
public static string IssueMapper255 = "Mapper 255 is not tested, issues may occur";
}

11
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper000.cs
View File

@ -1,7 +1,6 @@
namespace MyNes.Core
{
[BoardInfo("NROM", 0)]
internal class Mapper000 : Board
{
}
namespace MyNes.Core;
[BoardInfo("NROM", 0)]
internal class Mapper000 : Board
{
}

487
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper001.cs
View File

@ -1,245 +1,244 @@
using System;
using System.IO;
namespace MyNes.Core
{
[BoardInfo("MMC1", 1, 4, 64)]
internal class Mapper001 : Board
{
private int address_reg;
private byte[] reg = new byte[4];
private byte shift = 0;
private byte buffer = 0;
private bool flag_p;
private bool flag_c;
private bool flag_s;
private bool enable_wram_enable;
private int prg_hijackedbit;
private bool use_hijacked;
private bool use_sram_switch;
private int sram_switch_mask;
private int cpuCycles;
internal override void HardReset()
{
base.HardReset();
cpuCycles = 0;
address_reg = 0;
reg = new byte[4];
reg[0] = 12;
flag_c = false;
flag_s = (flag_p = true);
prg_hijackedbit = 0;
reg[1] = (reg[2] = (reg[3] = 0));
buffer = 0;
shift = 0;
if (base.Chips.Contains("MMC1B") || base.Chips.Contains("MMC1B2"))
{
TogglePRGRAMEnable(enable: false);
Console.WriteLine("MMC1: SRAM Disabled.");
}
enable_wram_enable = !base.Chips.Contains("MMC1A");
Console.WriteLine("MMC1: enable_wram_enable = " + enable_wram_enable);
use_hijacked = (PRG_ROM_16KB_Mask & 0x10) == 16;
if (use_hijacked)
{
prg_hijackedbit = 16;
}
use_sram_switch = false;
if (PRG_RAM_08KB_Count > 0)
{
use_sram_switch = true;
sram_switch_mask = (use_hijacked ? 8 : 24);
sram_switch_mask &= PRG_RAM_08KB_Mask << 3;
if (sram_switch_mask == 0)
{
use_sram_switch = false;
}
}
Switch16KPRG(0xF | prg_hijackedbit, PRGArea.AreaC000);
Console.WriteLine("MMC1: use_hijacked = " + use_hijacked);
Console.WriteLine("MMC1: use_sram_switch = " + use_sram_switch);
Console.WriteLine("MMC1: sram_switch_mask = " + sram_switch_mask.ToString("X2"));
}
internal override void WritePRG(ref ushort address, ref byte value)
{
if (cpuCycles > 0)
{
return;
}
cpuCycles = 3;
if ((value & 0x80) == 128)
{
reg[0] |= 12;
flag_s = (flag_p = true);
shift = (buffer = 0);
return;
}
if ((value & 1) == 1)
{
buffer |= (byte)(1 << (int)shift);
}
if (++shift < 5)
{
return;
}
address_reg = (address & 0x7FFF) >> 13;
reg[address_reg] = buffer;
shift = (buffer = 0);
switch (address_reg)
{
case 0:
flag_c = (reg[0] & 0x10) != 0;
flag_p = (reg[0] & 8) != 0;
flag_s = (reg[0] & 4) != 0;
UpdatePRG();
UpdateCHR();
switch (reg[0] & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
}
break;
case 1:
if (!flag_c)
{
Switch08KCHR(reg[1] >> 1);
}
else
{
Switch04KCHR(reg[1], CHRArea.Area0000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[1] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
if (use_hijacked)
{
prg_hijackedbit = reg[1] & 0x10;
UpdatePRG();
}
break;
case 2:
if (flag_c)
{
Switch04KCHR(reg[2], CHRArea.Area1000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[2] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
if (use_hijacked)
{
prg_hijackedbit = reg[2] & 0x10;
UpdatePRG();
}
break;
case 3:
if (enable_wram_enable)
{
TogglePRGRAMEnable((reg[3] & 0x10) == 0);
}
UpdatePRG();
break;
}
}
private void UpdateCHR()
{
if (!flag_c)
{
Switch08KCHR(reg[1] >> 1);
}
else
{
Switch04KCHR(reg[1], CHRArea.Area0000);
Switch04KCHR(reg[2], CHRArea.Area1000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[1] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
}
private void UpdatePRG()
{
if (!flag_p)
{
Switch32KPRG(((reg[3] & 0xF) | prg_hijackedbit) >> 1, PRGArea.Area8000);
}
else if (flag_s)
{
Switch16KPRG((reg[3] & 0xF) | prg_hijackedbit, PRGArea.Area8000);
Switch16KPRG(0xF | prg_hijackedbit, PRGArea.AreaC000);
}
else
{
Switch16KPRG(prg_hijackedbit, PRGArea.Area8000);
Switch16KPRG((reg[3] & 0xF) | prg_hijackedbit, PRGArea.AreaC000);
}
}
internal override void OnCPUClock()
{
if (cpuCycles > 0)
{
cpuCycles--;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(reg);
stream.Write(shift);
stream.Write(buffer);
stream.Write(flag_p);
stream.Write(flag_c);
stream.Write(flag_s);
stream.Write(enable_wram_enable);
stream.Write(prg_hijackedbit);
stream.Write(use_hijacked);
stream.Write(use_sram_switch);
stream.Write(cpuCycles);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
stream.Read(reg, 0, reg.Length);
shift = stream.ReadByte();
buffer = stream.ReadByte();
flag_p = stream.ReadBoolean();
flag_c = stream.ReadBoolean();
flag_s = stream.ReadBoolean();
enable_wram_enable = stream.ReadBoolean();
prg_hijackedbit = stream.ReadInt32();
use_hijacked = stream.ReadBoolean();
use_sram_switch = stream.ReadBoolean();
cpuCycles = stream.ReadInt32();
}
}
using System;
using System.IO;
namespace MyNes.Core;
[BoardInfo("MMC1", 1, 4, 64)]
internal class Mapper001 : Board
{
private int address_reg;
private byte[] reg = new byte[4];
private byte shift;
private byte buffer;
private bool flag_p;
private bool flag_c;
private bool flag_s;
private bool enable_wram_enable;
private int prg_hijackedbit;
private bool use_hijacked;
private bool use_sram_switch;
private int sram_switch_mask;
private int cpuCycles;
internal override void HardReset()
{
base.HardReset();
cpuCycles = 0;
address_reg = 0;
reg = new byte[4];
reg[0] = 12;
flag_c = false;
flag_s = (flag_p = true);
prg_hijackedbit = 0;
reg[1] = (reg[2] = (reg[3] = 0));
buffer = 0;
shift = 0;
if (base.Chips.Contains("MMC1B") || base.Chips.Contains("MMC1B2"))
{
TogglePRGRAMEnable(enable: false);
Console.WriteLine("MMC1: SRAM Disabled.");
}
enable_wram_enable = !base.Chips.Contains("MMC1A");
Console.WriteLine("MMC1: enable_wram_enable = " + enable_wram_enable);
use_hijacked = (PRG_ROM_16KB_Mask & 0x10) == 16;
if (use_hijacked)
{
prg_hijackedbit = 16;
}
use_sram_switch = false;
if (PRG_RAM_08KB_Count > 0)
{
use_sram_switch = true;
sram_switch_mask = (use_hijacked ? 8 : 24);
sram_switch_mask &= PRG_RAM_08KB_Mask << 3;
if (sram_switch_mask == 0)
{
use_sram_switch = false;
}
}
Switch16KPRG(0xF | prg_hijackedbit, PRGArea.AreaC000);
Console.WriteLine("MMC1: use_hijacked = " + use_hijacked);
Console.WriteLine("MMC1: use_sram_switch = " + use_sram_switch);
Console.WriteLine("MMC1: sram_switch_mask = " + sram_switch_mask.ToString("X2"));
}
internal override void WritePRG(ref ushort address, ref byte value)
{
if (cpuCycles > 0)
{
return;
}
cpuCycles = 3;
if ((value & 0x80) == 128)
{
reg[0] |= 12;
flag_s = (flag_p = true);
shift = (buffer = 0);
return;
}
if ((value & 1) == 1)
{
buffer |= (byte)(1 << (int)shift);
}
if (++shift < 5)
{
return;
}
address_reg = (address & 0x7FFF) >> 13;
reg[address_reg] = buffer;
shift = (buffer = 0);
switch (address_reg)
{
case 0:
flag_c = (reg[0] & 0x10) != 0;
flag_p = (reg[0] & 8) != 0;
flag_s = (reg[0] & 4) != 0;
UpdatePRG();
UpdateCHR();
switch (reg[0] & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
}
break;
case 1:
if (!flag_c)
{
Switch08KCHR(reg[1] >> 1);
}
else
{
Switch04KCHR(reg[1], CHRArea.Area0000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[1] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
if (use_hijacked)
{
prg_hijackedbit = reg[1] & 0x10;
UpdatePRG();
}
break;
case 2:
if (flag_c)
{
Switch04KCHR(reg[2], CHRArea.Area1000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[2] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
if (use_hijacked)
{
prg_hijackedbit = reg[2] & 0x10;
UpdatePRG();
}
break;
case 3:
if (enable_wram_enable)
{
TogglePRGRAMEnable((reg[3] & 0x10) == 0);
}
UpdatePRG();
break;
}
}
private void UpdateCHR()
{
if (!flag_c)
{
Switch08KCHR(reg[1] >> 1);
}
else
{
Switch04KCHR(reg[1], CHRArea.Area0000);
Switch04KCHR(reg[2], CHRArea.Area1000);
}
if (use_sram_switch)
{
Switch08KPRG((reg[1] & sram_switch_mask) >> 3, PRGArea.Area6000);
}
}
private void UpdatePRG()
{
if (!flag_p)
{
Switch32KPRG(((reg[3] & 0xF) | prg_hijackedbit) >> 1, PRGArea.Area8000);
}
else if (flag_s)
{
Switch16KPRG((reg[3] & 0xF) | prg_hijackedbit, PRGArea.Area8000);
Switch16KPRG(0xF | prg_hijackedbit, PRGArea.AreaC000);
}
else
{
Switch16KPRG(prg_hijackedbit, PRGArea.Area8000);
Switch16KPRG((reg[3] & 0xF) | prg_hijackedbit, PRGArea.AreaC000);
}
}
internal override void OnCPUClock()
{
if (cpuCycles > 0)
{
cpuCycles--;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(reg);
stream.Write(shift);
stream.Write(buffer);
stream.Write(flag_p);
stream.Write(flag_c);
stream.Write(flag_s);
stream.Write(enable_wram_enable);
stream.Write(prg_hijackedbit);
stream.Write(use_hijacked);
stream.Write(use_sram_switch);
stream.Write(cpuCycles);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
stream.Read(reg, 0, reg.Length);
shift = stream.ReadByte();
buffer = stream.ReadByte();
flag_p = stream.ReadBoolean();
flag_c = stream.ReadBoolean();
flag_s = stream.ReadBoolean();
enable_wram_enable = stream.ReadBoolean();
prg_hijackedbit = stream.ReadInt32();
use_hijacked = stream.ReadBoolean();
use_sram_switch = stream.ReadBoolean();
cpuCycles = stream.ReadInt32();
}
}

31
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper002.cs
View File

@ -1,17 +1,16 @@
namespace MyNes.Core
{
[BoardInfo("UxROM", 2)]
internal class Mapper002 : Board
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
Switch16KPRG(val, PRGArea.Area8000);
}
}
namespace MyNes.Core;
[BoardInfo("UxROM", 2)]
internal class Mapper002 : Board
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
Switch16KPRG(val, PRGArea.Area8000);
}
}

27
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper003.cs
View File

@ -1,15 +1,14 @@
namespace MyNes.Core
{
[BoardInfo("CNROM", 3)]
internal class Mapper003 : Board
{
private byte data_temp;
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out data_temp);
data_temp &= data;
Switch08KCHR(data_temp);
}
}
namespace MyNes.Core;
[BoardInfo("CNROM", 3)]
internal class Mapper003 : Board
{
private byte data_temp;
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out data_temp);
data_temp &= data;
Switch08KCHR(data_temp);
}
}

445
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper004.cs
View File

@ -1,224 +1,223 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("MMC3", 4, true, true)]
internal class Mapper004 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Tracer.WriteWarning("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Tracer.WriteWarning("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Tracer.WriteWarning("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
switch (addr & 0xE001)
{
case 32768:
address_8001 = val & 7;
flag_c = (val & 0x80) != 0;
flag_p = (val & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = val;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = val & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((val & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((val & 0x80) != 0);
TogglePRGRAMWritableEnable((val & 0x40) == 0);
break;
case 49152:
irq_reload = val;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area0000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area0800);
Switch01KCHR(chr_reg[2], CHRArea.Area1000);
Switch01KCHR(chr_reg[3], CHRArea.Area1400);
Switch01KCHR(chr_reg[4], CHRArea.Area1800);
Switch01KCHR(chr_reg[5], CHRArea.Area1C00);
}
else
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area1000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area1800);
Switch01KCHR(chr_reg[2], CHRArea.Area0000);
Switch01KCHR(chr_reg[3], CHRArea.Area0400);
Switch01KCHR(chr_reg[4], CHRArea.Area0800);
Switch01KCHR(chr_reg[5], CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG(prg_reg[flag_p ? 2 : 0], PRGArea.Area8000);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
Switch08KPRG(prg_reg[(!flag_p) ? 2 : 0], PRGArea.AreaC000);
Switch08KPRG(prg_reg[3], PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter bin)
{
base.WriteStateData(ref bin);
bin.Write(flag_c);
bin.Write(flag_p);
bin.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
bin.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
bin.Write(prg_reg[j]);
}
bin.Write(irq_enabled);
bin.Write(irq_counter);
bin.Write(old_irq_counter);
bin.Write(irq_reload);
bin.Write(irq_clear);
bin.Write(mmc3_alt_behavior);
}
internal override void ReadStateData(ref BinaryReader bin)
{
base.ReadStateData(ref bin);
flag_c = bin.ReadBoolean();
flag_p = bin.ReadBoolean();
address_8001 = bin.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = bin.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = bin.ReadInt32();
}
irq_enabled = bin.ReadBoolean();
irq_counter = bin.ReadByte();
old_irq_counter = bin.ReadInt32();
irq_reload = bin.ReadByte();
irq_clear = bin.ReadBoolean();
mmc3_alt_behavior = bin.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("MMC3", 4, true, true)]
internal class Mapper004 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Tracer.WriteWarning("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Tracer.WriteWarning("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Tracer.WriteWarning("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
switch (addr & 0xE001)
{
case 32768:
address_8001 = val & 7;
flag_c = (val & 0x80) != 0;
flag_p = (val & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = val;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = val & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((val & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((val & 0x80) != 0);
TogglePRGRAMWritableEnable((val & 0x40) == 0);
break;
case 49152:
irq_reload = val;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area0000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area0800);
Switch01KCHR(chr_reg[2], CHRArea.Area1000);
Switch01KCHR(chr_reg[3], CHRArea.Area1400);
Switch01KCHR(chr_reg[4], CHRArea.Area1800);
Switch01KCHR(chr_reg[5], CHRArea.Area1C00);
}
else
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area1000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area1800);
Switch01KCHR(chr_reg[2], CHRArea.Area0000);
Switch01KCHR(chr_reg[3], CHRArea.Area0400);
Switch01KCHR(chr_reg[4], CHRArea.Area0800);
Switch01KCHR(chr_reg[5], CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG(prg_reg[flag_p ? 2 : 0], PRGArea.Area8000);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
Switch08KPRG(prg_reg[(!flag_p) ? 2 : 0], PRGArea.AreaC000);
Switch08KPRG(prg_reg[3], PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter bin)
{
base.WriteStateData(ref bin);
bin.Write(flag_c);
bin.Write(flag_p);
bin.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
bin.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
bin.Write(prg_reg[j]);
}
bin.Write(irq_enabled);
bin.Write(irq_counter);
bin.Write(old_irq_counter);
bin.Write(irq_reload);
bin.Write(irq_clear);
bin.Write(mmc3_alt_behavior);
}
internal override void ReadStateData(ref BinaryReader bin)
{
base.ReadStateData(ref bin);
flag_c = bin.ReadBoolean();
flag_p = bin.ReadBoolean();
address_8001 = bin.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = bin.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = bin.ReadInt32();
}
irq_enabled = bin.ReadBoolean();
irq_counter = bin.ReadByte();
old_irq_counter = bin.ReadInt32();
irq_reload = bin.ReadByte();
irq_clear = bin.ReadBoolean();
mmc3_alt_behavior = bin.ReadBoolean();
}
}

1757
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper005.cs
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File diff suppressed because it is too large Load Diff

39
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper006.cs
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@ -1,21 +1,20 @@
namespace MyNes.Core
{
[BoardInfo("FFE F4xxx", 6)]
[HassIssues]
internal class Mapper006 : FFE
{
internal override string Issues => MNInterfaceLanguage.IssueMapper6;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(7, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch08KCHR(data & 3);
Switch16KPRG((data >> 2) & 0xF, PRGArea.Area8000);
}
}
namespace MyNes.Core;
[BoardInfo("FFE F4xxx", 6)]
[HassIssues]
internal class Mapper006 : FFE
{
internal override string Issues => MNInterfaceLanguage.IssueMapper6;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(7, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch08KCHR(data & 3);
Switch16KPRG((data >> 2) & 0xF, PRGArea.Area8000);
}
}

21
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper007.cs
View File

@ -1,12 +1,11 @@
namespace MyNes.Core
{
[BoardInfo("AxROM", 7)]
internal class Mapper007 : Board
{
internal override void WritePRG(ref ushort addr, ref byte val)
{
Switch01KNMTFromMirroring(((val & 0x10) == 16) ? Mirroring.OneScB : Mirroring.OneScA);
Switch32KPRG(val & 7, PRGArea.Area8000);
}
}
namespace MyNes.Core;
[BoardInfo("AxROM", 7)]
internal class Mapper007 : Board
{
internal override void WritePRG(ref ushort addr, ref byte val)
{
Switch01KNMTFromMirroring(((val & 0x10) == 16) ? Mirroring.OneScB : Mirroring.OneScA);
Switch32KPRG(val & 7, PRGArea.Area8000);
}
}

27
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper008.cs
View File

@ -1,15 +1,14 @@
namespace MyNes.Core
{
[BoardInfo("FFE F3xxx", 8)]
[HassIssues]
internal class Mapper008 : FFE
{
internal override string Issues => MNInterfaceLanguage.IssueMapper8;
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch32KPRG((data >> 4) & 3, PRGArea.Area8000);
Switch08KCHR(data & 3);
}
}
namespace MyNes.Core;
[BoardInfo("FFE F3xxx", 8)]
[HassIssues]
internal class Mapper008 : FFE
{
internal override string Issues => MNInterfaceLanguage.IssueMapper8;
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch32KPRG((data >> 4) & 3, PRGArea.Area8000);
Switch08KCHR(data & 3);
}
}

11
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper009.cs
View File

@ -1,7 +1,6 @@
namespace MyNes.Core
{
[BoardInfo("MMC2", 9)]
internal class Mapper009 : MMC2
{
}
namespace MyNes.Core;
[BoardInfo("MMC2", 9)]
internal class Mapper009 : MMC2
{
}

47
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper010.cs
View File

@ -1,25 +1,24 @@
namespace MyNes.Core
{
[BoardInfo("MMC4", 10)]
internal class Mapper010 : MMC2
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(0, PRGArea.Area8000);
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if ((address & 0xF000) == 40960)
{
Switch16KPRG(data, PRGArea.Area8000);
}
else
{
base.WritePRG(ref address, ref data);
}
}
}
namespace MyNes.Core;
[BoardInfo("MMC4", 10)]
internal class Mapper010 : MMC2
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(0, PRGArea.Area8000);
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if ((address & 0xF000) == 40960)
{
Switch16KPRG(data, PRGArea.Area8000);
}
else
{
base.WritePRG(ref address, ref data);
}
}
}

29
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper011.cs
View File

@ -1,16 +1,15 @@
namespace MyNes.Core
{
[BoardInfo("Color Dreams", 11)]
internal class Mapper011 : Board
{
private byte writeData;
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch32KPRG(writeData & 3, PRGArea.Area8000);
Switch08KCHR((writeData >> 4) & 0xF);
}
}
namespace MyNes.Core;
[BoardInfo("Color Dreams", 11)]
internal class Mapper011 : Board
{
private byte writeData;
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch32KPRG(writeData & 3, PRGArea.Area8000);
Switch08KCHR((writeData >> 4) & 0xF);
}
}

39
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper013.cs
View File

@ -1,21 +1,20 @@
namespace MyNes.Core
{
[BoardInfo("CPROM", 13, 1, 16)]
internal class Mapper013 : Board
{
private byte writeData;
internal override void HardReset()
{
base.HardReset();
Toggle08KCHR_RAM(ram: true);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch04KCHR(writeData & 3, CHRArea.Area1000);
}
}
namespace MyNes.Core;
[BoardInfo("CPROM", 13, 1, 16)]
internal class Mapper013 : Board
{
private byte writeData;
internal override void HardReset()
{
base.HardReset();
Toggle08KCHR_RAM(ram: true);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch04KCHR(writeData & 3, CHRArea.Area1000);
}
}

69
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper015.cs
View File

@ -1,36 +1,35 @@
namespace MyNes.Core
{
[BoardInfo("100-in-1 Contra Function 16", 15)]
internal class Mapper015 : Board
{
private int temp;
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 3)
{
case 0:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG((data & 0x3F) | 1, PRGArea.AreaC000);
break;
case 1:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
break;
case 2:
temp = data << 1;
temp = ((data & 0x3F) << 1) | ((data >> 7) & 1);
Switch08KPRG(temp, PRGArea.Area8000);
Switch08KPRG(temp, PRGArea.AreaA000);
Switch08KPRG(temp, PRGArea.AreaC000);
Switch08KPRG(temp, PRGArea.AreaE000);
break;
case 3:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG(data & 0x3F, PRGArea.AreaC000);
break;
}
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
}
}
namespace MyNes.Core;
[BoardInfo("100-in-1 Contra Function 16", 15)]
internal class Mapper015 : Board
{
private int temp;
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 3)
{
case 0:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG((data & 0x3F) | 1, PRGArea.AreaC000);
break;
case 1:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
break;
case 2:
temp = data << 1;
temp = ((data & 0x3F) << 1) | ((data >> 7) & 1);
Switch08KPRG(temp, PRGArea.Area8000);
Switch08KPRG(temp, PRGArea.AreaA000);
Switch08KPRG(temp, PRGArea.AreaC000);
Switch08KPRG(temp, PRGArea.AreaE000);
break;
case 3:
Switch16KPRG(data & 0x3F, PRGArea.Area8000);
Switch16KPRG(data & 0x3F, PRGArea.AreaC000);
break;
}
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
}
}

11
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper016.cs
View File

@ -1,7 +1,6 @@
namespace MyNes.Core
{
[BoardInfo("Bandai", 16)]
internal class Mapper016 : Bandai
{
}
namespace MyNes.Core;
[BoardInfo("Bandai", 16)]
internal class Mapper016 : Bandai
{
}

125
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper017.cs
View File

@ -1,64 +1,63 @@
namespace MyNes.Core
{
[BoardInfo("FFE F8xxx", 17)]
internal class Mapper017 : FFE
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address)
{
case 17668:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 17669:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 17670:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 17671:
Switch08KPRG(data, PRGArea.AreaE000);
break;
case 17680:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 17681:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 17682:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 17683:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 17684:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 17685:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 17686:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 17687:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 17672:
case 17673:
case 17674:
case 17675:
case 17676:
case 17677:
case 17678:
case 17679:
break;
}
}
}
namespace MyNes.Core;
[BoardInfo("FFE F8xxx", 17)]
internal class Mapper017 : FFE
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address)
{
case 17668:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 17669:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 17670:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 17671:
Switch08KPRG(data, PRGArea.AreaE000);
break;
case 17680:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 17681:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 17682:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 17683:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 17684:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 17685:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 17686:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 17687:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 17672:
case 17673:
case 17674:
case 17675:
case 17676:
case 17677:
case 17678:
case 17679:
break;
}
}
}

435
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper018.cs
View File

@ -1,219 +1,218 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Jaleco SS8806", 18)]
internal class Mapper018 : Board
{
private int[] prg_reg;
private int[] chr_reg;
private int irqRelaod;
private int irqCounter;
private bool irqEnable;
private int irqMask;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
prg_reg = new int[3];
chr_reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF003)
{
case 32768:
prg_reg[0] = (prg_reg[0] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[0], PRGArea.Area8000);
break;
case 32769:
prg_reg[0] = (prg_reg[0] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[0], PRGArea.Area8000);
break;
case 32770:
prg_reg[1] = (prg_reg[1] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
break;
case 32771:
prg_reg[1] = (prg_reg[1] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
break;
case 36864:
prg_reg[2] = (prg_reg[2] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
break;
case 36865:
prg_reg[2] = (prg_reg[2] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
break;
case 40960:
chr_reg[0] = (chr_reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
break;
case 40961:
chr_reg[0] = (chr_reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
break;
case 40962:
chr_reg[1] = (chr_reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[1], CHRArea.Area0400);
break;
case 40963:
chr_reg[1] = (chr_reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[1], CHRArea.Area0400);
break;
case 45056:
chr_reg[2] = (chr_reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[2], CHRArea.Area0800);
break;
case 45057:
chr_reg[2] = (chr_reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[2], CHRArea.Area0800);
break;
case 45058:
chr_reg[3] = (chr_reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
break;
case 45059:
chr_reg[3] = (chr_reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
break;
case 49152:
chr_reg[4] = (chr_reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[4], CHRArea.Area1000);
break;
case 49153:
chr_reg[4] = (chr_reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[4], CHRArea.Area1000);
break;
case 49154:
chr_reg[5] = (chr_reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[5], CHRArea.Area1400);
break;
case 49155:
chr_reg[5] = (chr_reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[5], CHRArea.Area1400);
break;
case 53248:
chr_reg[6] = (chr_reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[6], CHRArea.Area1800);
break;
case 53249:
chr_reg[6] = (chr_reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[6], CHRArea.Area1800);
break;
case 53250:
chr_reg[7] = (chr_reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
break;
case 53251:
chr_reg[7] = (chr_reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
break;
case 57344:
irqRelaod = (irqRelaod & 0xFFF0) | (data & 0xF);
break;
case 57345:
irqRelaod = (irqRelaod & 0xFF0F) | ((data & 0xF) << 4);
break;
case 57346:
irqRelaod = (irqRelaod & 0xF0FF) | ((data & 0xF) << 8);
break;
case 57347:
irqRelaod = (irqRelaod & 0xFFF) | ((data & 0xF) << 12);
break;
case 61440:
irqCounter = irqRelaod;
NesEmu.IRQFlags &= -9;
break;
case 61441:
irqEnable = (data & 1) == 1;
if ((data & 8) == 8)
{
irqMask = 15;
}
else if ((data & 4) == 4)
{
irqMask = 255;
}
else if ((data & 2) == 2)
{
irqMask = 4095;
}
else
{
irqMask = 65535;
}
NesEmu.IRQFlags &= -9;
break;
case 61442:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
}
}
internal override void OnCPUClock()
{
if (irqEnable && (irqCounter & irqMask) > 0 && (--irqCounter & irqMask) == 0)
{
irqEnable = false;
NesEmu.IRQFlags |= 8;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < prg_reg.Length; i++)
{
stream.Write(prg_reg[i]);
}
for (int j = 0; j < chr_reg.Length; j++)
{
stream.Write(chr_reg[j]);
}
stream.Write(irqRelaod);
stream.Write(irqCounter);
stream.Write(irqEnable);
stream.Write(irqMask);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < prg_reg.Length; i++)
{
prg_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < chr_reg.Length; j++)
{
chr_reg[j] = stream.ReadInt32();
}
irqRelaod = stream.ReadInt32();
irqCounter = stream.ReadInt32();
irqEnable = stream.ReadBoolean();
irqMask = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Jaleco SS8806", 18)]
internal class Mapper018 : Board
{
private int[] prg_reg;
private int[] chr_reg;
private int irqRelaod;
private int irqCounter;
private bool irqEnable;
private int irqMask;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
prg_reg = new int[3];
chr_reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF003)
{
case 32768:
prg_reg[0] = (prg_reg[0] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[0], PRGArea.Area8000);
break;
case 32769:
prg_reg[0] = (prg_reg[0] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[0], PRGArea.Area8000);
break;
case 32770:
prg_reg[1] = (prg_reg[1] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
break;
case 32771:
prg_reg[1] = (prg_reg[1] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[1], PRGArea.AreaA000);
break;
case 36864:
prg_reg[2] = (prg_reg[2] & 0xF0) | (data & 0xF);
Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
break;
case 36865:
prg_reg[2] = (prg_reg[2] & 0xF) | ((data & 0xF) << 4);
Switch08KPRG(prg_reg[2], PRGArea.AreaC000);
break;
case 40960:
chr_reg[0] = (chr_reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
break;
case 40961:
chr_reg[0] = (chr_reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
break;
case 40962:
chr_reg[1] = (chr_reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[1], CHRArea.Area0400);
break;
case 40963:
chr_reg[1] = (chr_reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[1], CHRArea.Area0400);
break;
case 45056:
chr_reg[2] = (chr_reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[2], CHRArea.Area0800);
break;
case 45057:
chr_reg[2] = (chr_reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[2], CHRArea.Area0800);
break;
case 45058:
chr_reg[3] = (chr_reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
break;
case 45059:
chr_reg[3] = (chr_reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[3], CHRArea.Area0C00);
break;
case 49152:
chr_reg[4] = (chr_reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[4], CHRArea.Area1000);
break;
case 49153:
chr_reg[4] = (chr_reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[4], CHRArea.Area1000);
break;
case 49154:
chr_reg[5] = (chr_reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[5], CHRArea.Area1400);
break;
case 49155:
chr_reg[5] = (chr_reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[5], CHRArea.Area1400);
break;
case 53248:
chr_reg[6] = (chr_reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[6], CHRArea.Area1800);
break;
case 53249:
chr_reg[6] = (chr_reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[6], CHRArea.Area1800);
break;
case 53250:
chr_reg[7] = (chr_reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
break;
case 53251:
chr_reg[7] = (chr_reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
break;
case 57344:
irqRelaod = (irqRelaod & 0xFFF0) | (data & 0xF);
break;
case 57345:
irqRelaod = (irqRelaod & 0xFF0F) | ((data & 0xF) << 4);
break;
case 57346:
irqRelaod = (irqRelaod & 0xF0FF) | ((data & 0xF) << 8);
break;
case 57347:
irqRelaod = (irqRelaod & 0xFFF) | ((data & 0xF) << 12);
break;
case 61440:
irqCounter = irqRelaod;
NesEmu.IRQFlags &= -9;
break;
case 61441:
irqEnable = (data & 1) == 1;
if ((data & 8) == 8)
{
irqMask = 15;
}
else if ((data & 4) == 4)
{
irqMask = 255;
}
else if ((data & 2) == 2)
{
irqMask = 4095;
}
else
{
irqMask = 65535;
}
NesEmu.IRQFlags &= -9;
break;
case 61442:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
}
}
internal override void OnCPUClock()
{
if (irqEnable && (irqCounter & irqMask) > 0 && (--irqCounter & irqMask) == 0)
{
irqEnable = false;
NesEmu.IRQFlags |= 8;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < prg_reg.Length; i++)
{
stream.Write(prg_reg[i]);
}
for (int j = 0; j < chr_reg.Length; j++)
{
stream.Write(chr_reg[j]);
}
stream.Write(irqRelaod);
stream.Write(irqCounter);
stream.Write(irqEnable);
stream.Write(irqMask);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < prg_reg.Length; i++)
{
prg_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < chr_reg.Length; j++)
{
chr_reg[j] = stream.ReadInt32();
}
irqRelaod = stream.ReadInt32();
irqCounter = stream.ReadInt32();
irqEnable = stream.ReadBoolean();
irqMask = stream.ReadInt32();
}
}

11
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper019.cs
View File

@ -1,7 +1,6 @@
namespace MyNes.Core
{
[BoardInfo("Namcot 106", 19, 1, 256)]
internal class Mapper019 : Namcot106
{
}
namespace MyNes.Core;
[BoardInfo("Namcot 106", 19, 1, 256)]
internal class Mapper019 : Namcot106
{
}

505
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper021.cs
View File

@ -1,254 +1,253 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC4", 21)]
internal class Mapper021 : Board
{
private bool prg_mode;
private byte prg_reg0;
private int[] chr_Reg;
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
prescaler = 341;
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32770:
case 32772:
case 32774:
case 32832:
case 32896:
case 32960:
prg_reg0 = data;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36866:
case 36928:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 36868:
case 36870:
case 36992:
case 37056:
prg_mode = (data & 2) == 2;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 40960:
case 40962:
case 40964:
case 40966:
case 41024:
case 41088:
case 41152:
Switch08KPRG(data & 0x1F, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
case 45120:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45060:
case 45184:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45062:
case 45248:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
case 49216:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49156:
case 49280:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49158:
case 49344:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
case 53312:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53252:
case 53376:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53254:
case 53440:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
case 57408:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57348:
case 57472:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57350:
case 57536:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 61440:
irq_reload = (irq_reload & 0xF0) | (data & 0xF);
break;
case 61442:
case 61504:
irq_reload = (irq_reload & 0xF) | ((data & 0xF) << 4);
break;
case 61444:
case 61568:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61446:
case 61632:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC4", 21)]
internal class Mapper021 : Board
{
private bool prg_mode;
private byte prg_reg0;
private int[] chr_Reg;
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
prescaler = 341;
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32770:
case 32772:
case 32774:
case 32832:
case 32896:
case 32960:
prg_reg0 = data;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36866:
case 36928:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 36868:
case 36870:
case 36992:
case 37056:
prg_mode = (data & 2) == 2;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 40960:
case 40962:
case 40964:
case 40966:
case 41024:
case 41088:
case 41152:
Switch08KPRG(data & 0x1F, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
case 45120:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45060:
case 45184:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45062:
case 45248:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
case 49216:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49156:
case 49280:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49158:
case 49344:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
case 53312:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53252:
case 53376:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53254:
case 53440:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
case 57408:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57348:
case 57472:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57350:
case 57536:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 61440:
irq_reload = (irq_reload & 0xF0) | (data & 0xF);
break;
case 61442:
case 61504:
irq_reload = (irq_reload & 0xF) | ((data & 0xF) << 4);
break;
case 61444:
case 61568:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61446:
case 61632:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
}
}

273
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper022.cs
View File

@ -1,138 +1,137 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC2", 22)]
internal class Mapper022 : Board
{
private int[] chr_Reg;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch08KPRG(data & 0xF, PRGArea.Area8000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
Switch08KPRG(data & 0xF, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0] >> 1, CHRArea.Area0000);
break;
case 45058:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0] >> 1, CHRArea.Area0000);
break;
case 45057:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1] >> 1, CHRArea.Area0400);
break;
case 45059:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1] >> 1, CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2] >> 1, CHRArea.Area0800);
break;
case 49154:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2] >> 1, CHRArea.Area0800);
break;
case 49153:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3] >> 1, CHRArea.Area0C00);
break;
case 49155:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3] >> 1, CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4] >> 1, CHRArea.Area1000);
break;
case 53250:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4] >> 1, CHRArea.Area1000);
break;
case 53249:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5] >> 1, CHRArea.Area1400);
break;
case 53251:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5] >> 1, CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6] >> 1, CHRArea.Area1800);
break;
case 57346:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6] >> 1, CHRArea.Area1800);
break;
case 57345:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7] >> 1, CHRArea.Area1C00);
break;
case 57347:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7] >> 1, CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC2", 22)]
internal class Mapper022 : Board
{
private int[] chr_Reg;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch08KPRG(data & 0xF, PRGArea.Area8000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
Switch08KPRG(data & 0xF, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0] >> 1, CHRArea.Area0000);
break;
case 45058:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0] >> 1, CHRArea.Area0000);
break;
case 45057:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1] >> 1, CHRArea.Area0400);
break;
case 45059:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1] >> 1, CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2] >> 1, CHRArea.Area0800);
break;
case 49154:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2] >> 1, CHRArea.Area0800);
break;
case 49153:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3] >> 1, CHRArea.Area0C00);
break;
case 49155:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3] >> 1, CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4] >> 1, CHRArea.Area1000);
break;
case 53250:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4] >> 1, CHRArea.Area1000);
break;
case 53249:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5] >> 1, CHRArea.Area1400);
break;
case 53251:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5] >> 1, CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6] >> 1, CHRArea.Area1800);
break;
case 57346:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6] >> 1, CHRArea.Area1800);
break;
case 57345:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7] >> 1, CHRArea.Area1C00);
break;
case 57347:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7] >> 1, CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
}
}

323
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper023.cs
View File

@ -1,163 +1,162 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC2", 23)]
internal class Mapper023 : Board
{
private int[] chr_Reg;
private byte security;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
chr_Reg = new int[8];
security = 0;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (address == 24576)
{
security = (byte)(data & 1u);
}
}
internal override void ReadSRM(ref ushort address, out byte data)
{
if (address == 24576)
{
data = security;
}
else
{
data = 0;
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch08KPRG(data & 0xF, PRGArea.Area8000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
Switch08KPRG(data & 0xF, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45057:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45059:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49153:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49155:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53249:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53251:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57345:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57347:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(security);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
security = stream.ReadByte();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC2", 23)]
internal class Mapper023 : Board
{
private int[] chr_Reg;
private byte security;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
chr_Reg = new int[8];
security = 0;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (address == 24576)
{
security = (byte)(data & 1u);
}
}
internal override void ReadSRM(ref ushort address, out byte data)
{
if (address == 24576)
{
data = security;
}
else
{
data = 0;
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch08KPRG(data & 0xF, PRGArea.Area8000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
Switch08KPRG(data & 0xF, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45057:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45059:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49153:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49155:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53249:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53251:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57345:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57347:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(security);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
security = stream.ReadByte();
}
}

487
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper024.cs
View File

@ -1,245 +1,244 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC6", 24)]
[WithExternalSound]
internal class Mapper024 : Board
{
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
private VRC6Pulse snd_1;
private VRC6Pulse snd_2;
private VRC6Sawtooth snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new VRC6Pulse();
snd_2 = new VRC6Pulse();
snd_3 = new VRC6Sawtooth();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 36864:
snd_1.Write0(ref data);
break;
case 36865:
snd_1.Write1(ref data);
break;
case 36866:
snd_1.Write2(ref data);
break;
case 40960:
snd_2.Write0(ref data);
break;
case 40961:
snd_2.Write1(ref data);
break;
case 40962:
snd_2.Write2(ref data);
break;
case 45056:
snd_3.Write0(ref data);
break;
case 45057:
snd_3.Write1(ref data);
break;
case 45058:
snd_3.Write2(ref data);
break;
case 45059:
switch ((data & 0xC) >> 2)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 49152:
case 49153:
case 49154:
case 49155:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 53248:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 53249:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 53250:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 53251:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 57344:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 57345:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 57346:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 57347:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 61440:
irq_reload = data;
break;
case 61441:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61442:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SAW;
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC6", 24)]
[WithExternalSound]
internal class Mapper024 : Board
{
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
private VRC6Pulse snd_1;
private VRC6Pulse snd_2;
private VRC6Sawtooth snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new VRC6Pulse();
snd_2 = new VRC6Pulse();
snd_3 = new VRC6Sawtooth();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 36864:
snd_1.Write0(ref data);
break;
case 36865:
snd_1.Write1(ref data);
break;
case 36866:
snd_1.Write2(ref data);
break;
case 40960:
snd_2.Write0(ref data);
break;
case 40961:
snd_2.Write1(ref data);
break;
case 40962:
snd_2.Write2(ref data);
break;
case 45056:
snd_3.Write0(ref data);
break;
case 45057:
snd_3.Write1(ref data);
break;
case 45058:
snd_3.Write2(ref data);
break;
case 45059:
switch ((data & 0xC) >> 2)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 49152:
case 49153:
case 49154:
case 49155:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 53248:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 53249:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 53250:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 53251:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 57344:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 57345:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 57346:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 57347:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 61440:
irq_reload = data;
break;
case 61441:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61442:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SAW;
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}

505
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper025.cs
View File

@ -1,254 +1,253 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC4", 25)]
internal class Mapper025 : Board
{
private bool prg_mode;
private byte prg_reg0;
private int[] chr_Reg;
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
prescaler = 341;
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
case 32772:
case 32776:
case 32780:
prg_reg0 = data;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36866:
case 36872:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 36865:
case 36867:
case 36868:
case 36876:
prg_mode = (data & 2) == 2;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 40960:
case 40961:
case 40962:
case 40963:
case 40964:
case 40968:
case 40972:
Switch08KPRG(data & 0x1F, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
case 45064:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45057:
case 45060:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45059:
case 45068:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
case 49160:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49153:
case 49156:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49155:
case 49164:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
case 53256:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53249:
case 53252:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53251:
case 53260:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
case 57352:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57345:
case 57348:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57347:
case 57356:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 61440:
irq_reload = (irq_reload & 0xF0) | (data & 0xF);
break;
case 61442:
case 61448:
irq_reload = (irq_reload & 0xF) | ((data & 0xF) << 4);
break;
case 61441:
case 61444:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61443:
case 61452:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC4", 25)]
internal class Mapper025 : Board
{
private bool prg_mode;
private byte prg_reg0;
private int[] chr_Reg;
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
prescaler = 341;
chr_Reg = new int[8];
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
case 32772:
case 32776:
case 32780:
prg_reg0 = data;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36866:
case 36872:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 36865:
case 36867:
case 36868:
case 36876:
prg_mode = (data & 2) == 2;
Switch08KPRG(prg_mode ? (PRG_ROM_08KB_Mask - 1) : (prg_reg0 & 0x1F), PRGArea.Area8000);
Switch08KPRG(prg_mode ? (prg_reg0 & 0x1F) : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 40960:
case 40961:
case 40962:
case 40963:
case 40964:
case 40968:
case 40972:
Switch08KPRG(data & 0x1F, PRGArea.AreaA000);
break;
case 45056:
chr_Reg[0] = (chr_Reg[0] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45058:
case 45064:
chr_Reg[0] = (chr_Reg[0] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[0], CHRArea.Area0000);
break;
case 45057:
case 45060:
chr_Reg[1] = (chr_Reg[1] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 45059:
case 45068:
chr_Reg[1] = (chr_Reg[1] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[1], CHRArea.Area0400);
break;
case 49152:
chr_Reg[2] = (chr_Reg[2] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49154:
case 49160:
chr_Reg[2] = (chr_Reg[2] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[2], CHRArea.Area0800);
break;
case 49153:
case 49156:
chr_Reg[3] = (chr_Reg[3] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 49155:
case 49164:
chr_Reg[3] = (chr_Reg[3] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[3], CHRArea.Area0C00);
break;
case 53248:
chr_Reg[4] = (chr_Reg[4] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53250:
case 53256:
chr_Reg[4] = (chr_Reg[4] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[4], CHRArea.Area1000);
break;
case 53249:
case 53252:
chr_Reg[5] = (chr_Reg[5] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 53251:
case 53260:
chr_Reg[5] = (chr_Reg[5] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[5], CHRArea.Area1400);
break;
case 57344:
chr_Reg[6] = (chr_Reg[6] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57346:
case 57352:
chr_Reg[6] = (chr_Reg[6] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[6], CHRArea.Area1800);
break;
case 57345:
case 57348:
chr_Reg[7] = (chr_Reg[7] & 0xF0) | (data & 0xF);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 57347:
case 57356:
chr_Reg[7] = (chr_Reg[7] & 0xF) | ((data & 0xF) << 4);
Switch01KCHR(chr_Reg[7], CHRArea.Area1C00);
break;
case 61440:
irq_reload = (irq_reload & 0xF0) | (data & 0xF);
break;
case 61442:
case 61448:
irq_reload = (irq_reload & 0xF) | ((data & 0xF) << 4);
break;
case 61441:
case 61444:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61443:
case 61452:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
for (int i = 0; i < chr_Reg.Length; i++)
{
stream.Write(chr_Reg[i]);
}
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
for (int i = 0; i < chr_Reg.Length; i++)
{
chr_Reg[i] = stream.ReadInt32();
}
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
}
}

487
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper026.cs
View File

@ -1,245 +1,244 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("VRC6", 26)]
[WithExternalSound]
internal class Mapper026 : Board
{
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
private VRC6Pulse snd_1;
private VRC6Pulse snd_2;
private VRC6Sawtooth snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new VRC6Pulse();
snd_2 = new VRC6Pulse();
snd_3 = new VRC6Sawtooth();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 36864:
snd_1.Write0(ref data);
break;
case 36866:
snd_1.Write1(ref data);
break;
case 36865:
snd_1.Write2(ref data);
break;
case 40960:
snd_2.Write0(ref data);
break;
case 40962:
snd_2.Write1(ref data);
break;
case 40961:
snd_2.Write2(ref data);
break;
case 45056:
snd_3.Write0(ref data);
break;
case 45058:
snd_3.Write1(ref data);
break;
case 45057:
snd_3.Write2(ref data);
break;
case 45059:
switch ((data & 0xC) >> 2)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 49152:
case 49153:
case 49154:
case 49155:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 53248:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 53250:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 53249:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 53251:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 57344:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 57346:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 57345:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 57347:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 61440:
irq_reload = data;
break;
case 61442:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61441:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SAW;
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("VRC6", 26)]
[WithExternalSound]
internal class Mapper026 : Board
{
private int irq_reload;
private int irq_counter;
private int prescaler;
private bool irq_mode_cycle;
private bool irq_enable;
private bool irq_enable_on_ak;
private VRC6Pulse snd_1;
private VRC6Pulse snd_2;
private VRC6Sawtooth snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new VRC6Pulse();
snd_2 = new VRC6Pulse();
snd_3 = new VRC6Sawtooth();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
case 32769:
case 32770:
case 32771:
Switch16KPRG(data, PRGArea.Area8000);
break;
case 36864:
snd_1.Write0(ref data);
break;
case 36866:
snd_1.Write1(ref data);
break;
case 36865:
snd_1.Write2(ref data);
break;
case 40960:
snd_2.Write0(ref data);
break;
case 40962:
snd_2.Write1(ref data);
break;
case 40961:
snd_2.Write2(ref data);
break;
case 45056:
snd_3.Write0(ref data);
break;
case 45058:
snd_3.Write1(ref data);
break;
case 45057:
snd_3.Write2(ref data);
break;
case 45059:
switch ((data & 0xC) >> 2)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 49152:
case 49153:
case 49154:
case 49155:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 53248:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 53250:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 53249:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 53251:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 57344:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 57346:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 57345:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 57347:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 61440:
irq_reload = data;
break;
case 61442:
irq_mode_cycle = (data & 4) == 4;
irq_enable = (data & 2) == 2;
irq_enable_on_ak = (data & 1) == 1;
if (irq_enable)
{
irq_counter = irq_reload;
prescaler = 341;
}
NesEmu.IRQFlags &= -9;
break;
case 61441:
NesEmu.IRQFlags &= -9;
irq_enable = irq_enable_on_ak;
break;
}
}
internal override void OnCPUClock()
{
if (!irq_enable)
{
return;
}
if (!irq_mode_cycle)
{
if (prescaler > 0)
{
prescaler -= 3;
return;
}
prescaler = 341;
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
else
{
irq_counter++;
if (irq_counter == 255)
{
NesEmu.IRQFlags |= 8;
irq_counter = irq_reload;
}
}
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SQ2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_VRC6_SAW;
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_reload);
stream.Write(irq_counter);
stream.Write(prescaler);
stream.Write(irq_mode_cycle);
stream.Write(irq_enable);
stream.Write(irq_enable_on_ak);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_reload = stream.ReadInt32();
irq_counter = stream.ReadInt32();
prescaler = stream.ReadInt32();
irq_mode_cycle = stream.ReadBoolean();
irq_enable = stream.ReadBoolean();
irq_enable_on_ak = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}

215
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper032.cs
View File

@ -1,109 +1,108 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Irem G-101", 32)]
internal class Mapper032 : Board
{
private bool prg_mode;
private byte prg_reg0;
private bool enable_mirroring_switch;
internal override void HardReset()
{
base.HardReset();
enable_mirroring_switch = true;
if (SHA1 == "7E4180432726A433C46BA2206D9E13B32761C11E")
{
enable_mirroring_switch = false;
Switch01KNMTFromMirroring(Mirroring.OneScA);
}
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF007)
{
case 32768:
case 32769:
case 32770:
case 32771:
case 32772:
case 32773:
case 32774:
case 32775:
prg_reg0 = data;
Switch08KPRG((!prg_mode) ? prg_reg0 : 0, PRGArea.Area8000);
Switch08KPRG(prg_mode ? prg_reg0 : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
case 36868:
case 36869:
case 36870:
case 36871:
prg_mode = (data & 2) == 2;
Switch08KPRG((!prg_mode) ? prg_reg0 : 0, PRGArea.Area8000);
Switch08KPRG(prg_mode ? prg_reg0 : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
if (enable_mirroring_switch)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
case 40964:
case 40965:
case 40966:
case 40967:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 45056:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 45057:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 45058:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 45059:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 45060:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 45061:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 45062:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 45063:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Irem G-101", 32)]
internal class Mapper032 : Board
{
private bool prg_mode;
private byte prg_reg0;
private bool enable_mirroring_switch;
internal override void HardReset()
{
base.HardReset();
enable_mirroring_switch = true;
if (SHA1 == "7E4180432726A433C46BA2206D9E13B32761C11E")
{
enable_mirroring_switch = false;
Switch01KNMTFromMirroring(Mirroring.OneScA);
}
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF007)
{
case 32768:
case 32769:
case 32770:
case 32771:
case 32772:
case 32773:
case 32774:
case 32775:
prg_reg0 = data;
Switch08KPRG((!prg_mode) ? prg_reg0 : 0, PRGArea.Area8000);
Switch08KPRG(prg_mode ? prg_reg0 : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
break;
case 36864:
case 36865:
case 36866:
case 36867:
case 36868:
case 36869:
case 36870:
case 36871:
prg_mode = (data & 2) == 2;
Switch08KPRG((!prg_mode) ? prg_reg0 : 0, PRGArea.Area8000);
Switch08KPRG(prg_mode ? prg_reg0 : (PRG_ROM_08KB_Mask - 1), PRGArea.AreaC000);
if (enable_mirroring_switch)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40960:
case 40961:
case 40962:
case 40963:
case 40964:
case 40965:
case 40966:
case 40967:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 45056:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 45057:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 45058:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 45059:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 45060:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 45061:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 45062:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 45063:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_mode);
stream.Write(prg_reg0);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_mode = stream.ReadBoolean();
prg_reg0 = stream.ReadByte();
}
}

351
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper033.cs
View File

@ -1,177 +1,176 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Taito TC0190/TC0350", 33)]
[HassIssues]
internal class Mapper033 : Board
{
private bool MODE;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override string Issues => MNInterfaceLanguage.IssueMapper33;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
MODE = true;
if (IsGameFoundOnDB)
{
foreach (string chip in base.Chips)
{
if (chip.Contains("TC0190"))
{
MODE = false;
ppuA12TogglesOnRaisingEdge = true;
enabled_ppuA12ToggleTimer = true;
break;
}
}
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (!MODE)
{
switch (address & 0xE003)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 49152:
irq_reload = (byte)(data ^ 0xFFu);
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 49154:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 49155:
irq_enabled = true;
break;
case 57344:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
else
{
switch (address & 0xA003)
{
case 32768:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
Switch08KPRG(data & 0x3F, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data & 0x3F, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
}
internal override void OnPPUA12RaisingEdge()
{
if (!MODE)
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Taito TC0190/TC0350", 33)]
[HassIssues]
internal class Mapper033 : Board
{
private bool MODE;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override string Issues => MNInterfaceLanguage.IssueMapper33;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
MODE = true;
if (IsGameFoundOnDB)
{
foreach (string chip in base.Chips)
{
if (chip.Contains("TC0190"))
{
MODE = false;
ppuA12TogglesOnRaisingEdge = true;
enabled_ppuA12ToggleTimer = true;
break;
}
}
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (!MODE)
{
switch (address & 0xE003)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 49152:
irq_reload = (byte)(data ^ 0xFFu);
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 49154:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 49155:
irq_enabled = true;
break;
case 57344:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
else
{
switch (address & 0xA003)
{
case 32768:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
Switch08KPRG(data & 0x3F, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data & 0x3F, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
}
internal override void OnPPUA12RaisingEdge()
{
if (!MODE)
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
}
}

97
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper034.cs
View File

@ -1,50 +1,49 @@
namespace MyNes.Core
{
[BoardInfo("BxROM/NINA-001", 34)]
internal class Mapper034 : Board
{
private bool BxROM;
private byte writeData;
internal override void HardReset()
{
base.HardReset();
BxROM = true;
if (base.BoardType.Contains("NINA"))
{
BxROM = false;
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
base.WriteSRM(ref address, ref data);
if (!BxROM)
{
switch (address)
{
case 32765:
Switch32KPRG(data, PRGArea.Area8000);
break;
case 32766:
Switch04KCHR(data, CHRArea.Area0000);
break;
case 32767:
Switch04KCHR(data, CHRArea.Area1000);
break;
}
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (BxROM)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch32KPRG(writeData, PRGArea.Area8000);
}
}
}
namespace MyNes.Core;
[BoardInfo("BxROM/NINA-001", 34)]
internal class Mapper034 : Board
{
private bool BxROM;
private byte writeData;
internal override void HardReset()
{
base.HardReset();
BxROM = true;
if (base.BoardType.Contains("NINA"))
{
BxROM = false;
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
base.WriteSRM(ref address, ref data);
if (!BxROM)
{
switch (address)
{
case 32765:
Switch32KPRG(data, PRGArea.Area8000);
break;
case 32766:
Switch04KCHR(data, CHRArea.Area0000);
break;
case 32767:
Switch04KCHR(data, CHRArea.Area1000);
break;
}
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (BxROM)
{
ReadPRG(ref address, out writeData);
writeData &= data;
Switch32KPRG(writeData, PRGArea.Area8000);
}
}
}

113
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper041.cs
View File

@ -1,58 +1,57 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Caltron 6-in-1", 41)]
internal class Mapper041 : Board
{
private bool enableReg = false;
private int vromReg = 0;
internal override void HardReset()
{
base.HardReset();
vromReg = 0;
enableReg = true;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (address <= 26623)
{
Switch32KPRG(address & 7, PRGArea.Area8000);
enableReg = (address & 4) == 4;
vromReg = (vromReg & 3) | ((address >> 1) & 0xC);
Switch08KCHR(vromReg);
Switch01KNMTFromMirroring(((address & 0x20) == 32) ? Mirroring.Horz : Mirroring.Vert);
}
else
{
base.WriteSRM(ref address, ref data);
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (enableReg)
{
vromReg = (vromReg & 0xC) | (data & 3);
Switch08KCHR(vromReg);
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(enableReg);
stream.Write(vromReg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
enableReg = stream.ReadBoolean();
vromReg = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Caltron 6-in-1", 41)]
internal class Mapper041 : Board
{
private bool enableReg;
private int vromReg;
internal override void HardReset()
{
base.HardReset();
vromReg = 0;
enableReg = true;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (address <= 26623)
{
Switch32KPRG(address & 7, PRGArea.Area8000);
enableReg = (address & 4) == 4;
vromReg = (vromReg & 3) | ((address >> 1) & 0xC);
Switch08KCHR(vromReg);
Switch01KNMTFromMirroring(((address & 0x20) == 32) ? Mirroring.Horz : Mirroring.Vert);
}
else
{
base.WriteSRM(ref address, ref data);
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (enableReg)
{
vromReg = (vromReg & 0xC) | (data & 3);
Switch08KCHR(vromReg);
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(enableReg);
stream.Write(vromReg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
enableReg = stream.ReadBoolean();
vromReg = stream.ReadInt32();
}
}

185
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper042.cs
View File

@ -1,94 +1,93 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Mario Baby", 42)]
internal class Mapper042 : Board
{
private int SRAM_PRG_Page = 0;
private bool irqEnable = false;
private int irqCounter = 0;
internal override void HardReset()
{
base.HardReset();
Switch32KPRG(PRG_ROM_32KB_Mask, PRGArea.Area8000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (address == 32768)
{
Switch08KCHR(data);
return;
}
if (address == 61440)
{
SRAM_PRG_Page = data << 13;
return;
}
switch (address & 0xE003)
{
case 57344:
Switch08KPRG(data, PRGArea.Area6000);
break;
case 57345:
if ((data & 8) == 8)
{
Switch01KNMTFromMirroring(Mirroring.Horz);
}
else
{
Switch01KNMTFromMirroring(Mirroring.Vert);
}
break;
case 57346:
irqEnable = (data & 2) == 2;
if (!irqEnable)
{
irqCounter = 0;
}
NesEmu.IRQFlags &= -9;
break;
}
}
internal override void OnCPUClock()
{
if (!irqEnable)
{
return;
}
int num = irqCounter++;
if ((irqCounter & 0x6000) != (num & 0x6000))
{
if ((irqCounter & 0x6000) == 24576)
{
NesEmu.IRQFlags |= 8;
}
else
{
NesEmu.IRQFlags &= -9;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(SRAM_PRG_Page);
stream.Write(irqEnable);
stream.Write(irqCounter);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
SRAM_PRG_Page = stream.ReadInt32();
irqEnable = stream.ReadBoolean();
irqCounter = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Mario Baby", 42)]
internal class Mapper042 : Board
{
private int SRAM_PRG_Page;
private bool irqEnable;
private int irqCounter;
internal override void HardReset()
{
base.HardReset();
Switch32KPRG(PRG_ROM_32KB_Mask, PRGArea.Area8000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (address == 32768)
{
Switch08KCHR(data);
return;
}
if (address == 61440)
{
SRAM_PRG_Page = data << 13;
return;
}
switch (address & 0xE003)
{
case 57344:
Switch08KPRG(data, PRGArea.Area6000);
break;
case 57345:
if ((data & 8) == 8)
{
Switch01KNMTFromMirroring(Mirroring.Horz);
}
else
{
Switch01KNMTFromMirroring(Mirroring.Vert);
}
break;
case 57346:
irqEnable = (data & 2) == 2;
if (!irqEnable)
{
irqCounter = 0;
}
NesEmu.IRQFlags &= -9;
break;
}
}
internal override void OnCPUClock()
{
if (!irqEnable)
{
return;
}
int num = irqCounter++;
if ((irqCounter & 0x6000) != (num & 0x6000))
{
if ((irqCounter & 0x6000) == 24576)
{
NesEmu.IRQFlags |= 8;
}
else
{
NesEmu.IRQFlags &= -9;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(SRAM_PRG_Page);
stream.Write(irqEnable);
stream.Write(irqCounter);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
SRAM_PRG_Page = stream.ReadInt32();
irqEnable = stream.ReadBoolean();
irqCounter = stream.ReadInt32();
}
}

467
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper044.cs
View File

@ -1,235 +1,234 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("7-in-1 MMC3 Port A001h", 44, true, true)]
[HassIssues]
internal class Mapper044 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int block;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override string Issues => MNInterfaceLanguage.IssueMapper44;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
block = data & 7;
prg_and = ((block > 5) ? 31 : 15);
prg_or = ((block < 5) ? (block << 4) : 96);
chr_and = ((block > 5) ? 255 : 127);
chr_or = ((block < 5) ? (block << 7) : 768);
SetupPRG();
SetupCHR();
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
stream.Write(block);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
block = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("7-in-1 MMC3 Port A001h", 44, true, true)]
[HassIssues]
internal class Mapper044 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int block;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override string Issues => MNInterfaceLanguage.IssueMapper44;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
block = data & 7;
prg_and = ((block > 5) ? 31 : 15);
prg_or = ((block < 5) ? (block << 4) : 96);
chr_and = ((block > 5) ? 255 : 127);
chr_or = ((block < 5) ? (block << 7) : 768);
SetupPRG();
SetupCHR();
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
stream.Write(block);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
block = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
}
}

585
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper045.cs
View File

@ -1,294 +1,293 @@
using System;
using System.IO;
namespace MyNes.Core
{
[BoardInfo("X-in-1 MMC3 Port 6000hx4", 45, true, true)]
internal class Mapper045 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private bool locked;
private int regCounter;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 63;
prg_or = 0;
chr_and = 4095;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
locked = false;
regCounter = 0;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (locked)
{
base.WriteSRM(ref address, ref data);
return;
}
switch (regCounter)
{
case 0:
chr_or = (chr_or & 0xFF00) | data;
SetupCHR();
break;
case 1:
prg_or = data;
SetupPRG();
break;
case 2:
if ((data & 8) == 8)
{
chr_and = (1 << (data & 7) + 1) - 1;
}
else
{
chr_and = ((data <= 0) ? (-1) : 0);
}
chr_or = (chr_or & 0xFF) | ((data & 0xF0) << 4);
SetupCHR();
break;
case 3:
locked = (data & 0x40) == 64;
prg_and = (data & 0x3F) ^ 0x3F;
SetupPRG();
break;
}
regCounter++;
if (regCounter > 3)
{
regCounter = 0;
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(locked);
stream.Write(regCounter);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
locked = stream.ReadBoolean();
regCounter = stream.ReadInt32();
}
}
using System;
using System.IO;
namespace MyNes.Core;
[BoardInfo("X-in-1 MMC3 Port 6000hx4", 45, true, true)]
internal class Mapper045 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private bool locked;
private int regCounter;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 63;
prg_or = 0;
chr_and = 4095;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
locked = false;
regCounter = 0;
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (locked)
{
base.WriteSRM(ref address, ref data);
return;
}
switch (regCounter)
{
case 0:
chr_or = (chr_or & 0xFF00) | data;
SetupCHR();
break;
case 1:
prg_or = data;
SetupPRG();
break;
case 2:
if ((data & 8) == 8)
{
chr_and = (1 << (data & 7) + 1) - 1;
}
else
{
chr_and = ((data <= 0) ? (-1) : 0);
}
chr_or = (chr_or & 0xFF) | ((data & 0xF0) << 4);
SetupCHR();
break;
case 3:
locked = (data & 0x40) == 64;
prg_and = (data & 0x3F) ^ 0x3F;
SetupPRG();
break;
}
regCounter++;
if (regCounter > 3)
{
regCounter = 0;
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(locked);
stream.Write(regCounter);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
locked = stream.ReadBoolean();
regCounter = stream.ReadInt32();
}
}

81
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper046.cs
View File

@ -1,42 +1,41 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("15-in-1 Color Dreams", 46)]
internal class Mapper046 : Board
{
private int prg_reg;
private int chr_reg;
internal override void WriteSRM(ref ushort address, ref byte data)
{
prg_reg = (prg_reg & 1) | ((data << 1) & 0x1E);
chr_reg = (chr_reg & 7) | ((data >> 1) & 0x78);
Switch08KCHR(chr_reg);
Switch32KPRG(prg_reg, PRGArea.Area8000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
prg_reg = (data & 1) | (prg_reg & 0x1E);
chr_reg = ((data >> 4) & 7) | (chr_reg & 0x78);
Switch08KCHR(chr_reg);
Switch32KPRG(prg_reg, PRGArea.Area8000);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_reg);
stream.Write(chr_reg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_reg = stream.ReadInt32();
chr_reg = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("15-in-1 Color Dreams", 46)]
internal class Mapper046 : Board
{
private int prg_reg;
private int chr_reg;
internal override void WriteSRM(ref ushort address, ref byte data)
{
prg_reg = (prg_reg & 1) | ((data << 1) & 0x1E);
chr_reg = (chr_reg & 7) | ((data >> 1) & 0x78);
Switch08KCHR(chr_reg);
Switch32KPRG(prg_reg, PRGArea.Area8000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
prg_reg = (data & 1) | (prg_reg & 0x1E);
chr_reg = ((data >> 4) & 7) | (chr_reg & 0x78);
Switch08KCHR(chr_reg);
Switch32KPRG(prg_reg, PRGArea.Area8000);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_reg);
stream.Write(chr_reg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_reg = stream.ReadInt32();
chr_reg = stream.ReadInt32();
}
}

513
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper047.cs
View File

@ -1,258 +1,257 @@
using System;
using System.IO;
namespace MyNes.Core
{
[BoardInfo("2-in-1 MMC3 Port 6000h", 47, true, true)]
internal class Mapper047 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int block;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
block = data & 1;
prg_or = block << 4;
chr_or = block << 7;
SetupCHR();
SetupPRG();
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
stream.Write(block);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(irq_enabled);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
block = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
irq_enabled = stream.ReadBoolean();
}
}
using System;
using System.IO;
namespace MyNes.Core;
[BoardInfo("2-in-1 MMC3 Port 6000h", 47, true, true)]
internal class Mapper047 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int block;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
block = data & 1;
prg_or = block << 4;
chr_or = block << 7;
SetupCHR();
SetupPRG();
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
stream.Write(block);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(irq_enabled);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
block = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
irq_enabled = stream.ReadBoolean();
}
}

341
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper048.cs
View File

@ -1,172 +1,171 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Taito TC0190/TC0350", 48, true, true)]
internal class Mapper048 : Board
{
private bool MODE;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
MODE = false;
if (IsGameFoundOnDB)
{
foreach (string chip in base.Chips)
{
if (chip.Contains("TC0350"))
{
MODE = true;
break;
}
}
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (!MODE)
{
switch (address & 0xE003)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 49152:
irq_reload = (byte)(data ^ 0xFFu);
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 49154:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 49155:
irq_enabled = true;
break;
case 57344:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
else
{
switch (address & 0xA003)
{
case 32768:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
Switch08KPRG(data & 0x3F, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data & 0x3F, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
}
internal override void OnPPUA12RaisingEdge()
{
if (!MODE)
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Taito TC0190/TC0350", 48, true, true)]
internal class Mapper048 : Board
{
private bool MODE;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
MODE = false;
if (IsGameFoundOnDB)
{
foreach (string chip in base.Chips)
{
if (chip.Contains("TC0350"))
{
MODE = true;
break;
}
}
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
mmc3_alt_behavior = false;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (!MODE)
{
switch (address & 0xE003)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 49152:
irq_reload = (byte)(data ^ 0xFFu);
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 49154:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 49155:
irq_enabled = true;
break;
case 57344:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
break;
}
}
else
{
switch (address & 0xA003)
{
case 32768:
Switch01KNMTFromMirroring(((data & 0x40) == 64) ? Mirroring.Horz : Mirroring.Vert);
Switch08KPRG(data & 0x3F, PRGArea.Area8000);
break;
case 32769:
Switch08KPRG(data & 0x3F, PRGArea.AreaA000);
break;
case 32770:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 32771:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 40961:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 40962:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 40963:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
}
internal override void OnPPUA12RaisingEdge()
{
if (!MODE)
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
}
}

541
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper049.cs
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@ -1,272 +1,271 @@
using System;
using System.IO;
namespace MyNes.Core
{
[BoardInfo("4-in-1 MMC3 Port 6xxxh", 49, true, true)]
internal class Mapper049 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private bool prg_32Mode;
private int prg_32Page;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
prg_32Mode = false;
prg_32Page = 0;
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
prg_32Mode = (data & 1) == 1;
prg_or = (data >> 2) & 0x30;
chr_or = (data & 0xC0) << 1;
prg_32Page = (data >> 4) & 3;
SetupCHR();
SetupPRG();
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
if (prg_32Mode)
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
else
{
Switch32KPRG(prg_32Page, PRGArea.Area8000);
}
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(prg_32Mode);
stream.Write(prg_32Page);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
prg_32Mode = stream.ReadBoolean();
prg_32Page = stream.ReadInt32();
}
}
using System;
using System.IO;
namespace MyNes.Core;
[BoardInfo("4-in-1 MMC3 Port 6xxxh", 49, true, true)]
internal class Mapper049 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private bool prg_32Mode;
private int prg_32Page;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
prg_32Mode = false;
prg_32Page = 0;
address_8001 = 0;
prg_and = 15;
prg_or = 0;
chr_and = 127;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
prg_32Mode = (data & 1) == 1;
prg_or = (data >> 2) & 0x30;
chr_or = (data & 0xC0) << 1;
prg_32Page = (data >> 4) & 3;
SetupCHR();
SetupPRG();
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
if (prg_32Mode)
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
else
{
Switch32KPRG(prg_32Page, PRGArea.Area8000);
}
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(prg_32Mode);
stream.Write(prg_32Page);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
prg_32Mode = stream.ReadBoolean();
prg_32Page = stream.ReadInt32();
}
}

139
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper050.cs
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@ -1,71 +1,70 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("FDS-Port - Alt. Levels", 50)]
internal class Mapper050 : Board
{
private int prg_page;
private int irq_counter;
private bool irq_enabled;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(15, PRGArea.Area6000);
Switch08KPRG(8, PRGArea.Area8000);
Switch08KPRG(9, PRGArea.AreaA000);
Switch08KPRG(11, PRGArea.AreaE000);
}
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address & 0x4120)
{
case 16416:
prg_page = (data & 8) | ((data & 1) << 2) | ((data >> 1) & 3);
Switch08KPRG(prg_page, PRGArea.AreaC000);
break;
case 16672:
irq_enabled = (data & 1) == 1;
if (!irq_enabled)
{
irq_counter = 0;
NesEmu.IRQFlags &= -9;
}
break;
}
}
internal override void OnCPUClock()
{
if (irq_enabled)
{
irq_counter++;
if (irq_counter == 4096)
{
NesEmu.IRQFlags |= 8;
irq_counter = 0;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_page);
stream.Write(irq_counter);
stream.Write(irq_enabled);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_page = stream.ReadInt32();
irq_counter = stream.ReadInt32();
irq_enabled = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("FDS-Port - Alt. Levels", 50)]
internal class Mapper050 : Board
{
private int prg_page;
private int irq_counter;
private bool irq_enabled;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(15, PRGArea.Area6000);
Switch08KPRG(8, PRGArea.Area8000);
Switch08KPRG(9, PRGArea.AreaA000);
Switch08KPRG(11, PRGArea.AreaE000);
}
internal override void WriteEX(ref ushort address, ref byte data)
{
switch (address & 0x4120)
{
case 16416:
prg_page = (data & 8) | ((data & 1) << 2) | ((data >> 1) & 3);
Switch08KPRG(prg_page, PRGArea.AreaC000);
break;
case 16672:
irq_enabled = (data & 1) == 1;
if (!irq_enabled)
{
irq_counter = 0;
NesEmu.IRQFlags &= -9;
}
break;
}
}
internal override void OnCPUClock()
{
if (irq_enabled)
{
irq_counter++;
if (irq_counter == 4096)
{
NesEmu.IRQFlags |= 8;
irq_counter = 0;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(prg_page);
stream.Write(irq_counter);
stream.Write(irq_enabled);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
prg_page = stream.ReadInt32();
irq_counter = stream.ReadInt32();
irq_enabled = stream.ReadBoolean();
}
}

155
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper051.cs
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@ -1,79 +1,78 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("11-in-1", 51)]
internal class Mapper051 : Board
{
private int bank = 0;
private int mode = 1;
private int offset;
internal override void HardReset()
{
base.HardReset();
bank = 0;
mode = 1;
offset = 0;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE000)
{
case 32768:
case 57344:
bank = data & 0xF;
UpdateBanks();
break;
case 49152:
bank = data & 0xF;
mode = ((data >> 3) & 2) | (mode & 1);
UpdateBanks();
break;
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
mode = ((data >> 3) & 2) | ((data >> 1) & 1);
UpdateBanks();
}
private void UpdateBanks()
{
offset = 0;
if ((mode & 1) == 1)
{
Switch32KPRG(bank, PRGArea.Area8000);
offset = 35;
}
else
{
Switch08KPRG((bank << 1) | (mode >> 1), PRGArea.Area8000);
Switch08KPRG((bank << 1) | 7, PRGArea.Area8000);
offset = 47;
}
Switch08KPRG(offset | (bank << 2), PRGArea.Area6000);
Switch01KNMTFromMirroring((mode == 3) ? Mirroring.Horz : Mirroring.Vert);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(bank);
stream.Write(mode);
stream.Write(offset);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
bank = stream.ReadInt32();
mode = stream.ReadInt32();
offset = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("11-in-1", 51)]
internal class Mapper051 : Board
{
private int bank;
private int mode = 1;
private int offset;
internal override void HardReset()
{
base.HardReset();
bank = 0;
mode = 1;
offset = 0;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE000)
{
case 32768:
case 57344:
bank = data & 0xF;
UpdateBanks();
break;
case 49152:
bank = data & 0xF;
mode = ((data >> 3) & 2) | (mode & 1);
UpdateBanks();
break;
}
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
mode = ((data >> 3) & 2) | ((data >> 1) & 1);
UpdateBanks();
}
private void UpdateBanks()
{
offset = 0;
if ((mode & 1) == 1)
{
Switch32KPRG(bank, PRGArea.Area8000);
offset = 35;
}
else
{
Switch08KPRG((bank << 1) | (mode >> 1), PRGArea.Area8000);
Switch08KPRG((bank << 1) | 7, PRGArea.Area8000);
offset = 47;
}
Switch08KPRG(offset | (bank << 2), PRGArea.Area6000);
Switch01KNMTFromMirroring((mode == 3) ? Mirroring.Horz : Mirroring.Vert);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(bank);
stream.Write(mode);
stream.Write(offset);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
bank = stream.ReadInt32();
mode = stream.ReadInt32();
offset = stream.ReadInt32();
}
}

543
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper052.cs
View File

@ -1,273 +1,272 @@
using System;
using System.IO;
namespace MyNes.Core
{
[BoardInfo("7-in-1 MMC3 Port 6800h with SRAM", 52, true, true)]
internal class Mapper052 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
private bool locked;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
locked = false;
address_8001 = 0;
prg_and = 31;
prg_or = 0;
chr_and = 255;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void SoftReset()
{
HardReset();
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (!locked)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
locked = true;
prg_and = ((data << 1) & 0x10) ^ 0x1F;
prg_or = ((data & 6) | ((data >> 3) & data & 1)) << 4;
chr_and = ((data & 0x40) << 1) ^ 0xFF;
chr_or = (((data >> 3) & 4) | ((data >> 1) & 2) | ((data >> 6) & (data >> 4) & 1)) << 7;
SetupCHR();
SetupPRG();
}
}
else
{
base.WriteSRM(ref address, ref data);
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(locked);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
locked = stream.ReadBoolean();
}
}
using System;
using System.IO;
namespace MyNes.Core;
[BoardInfo("7-in-1 MMC3 Port 6800h with SRAM", 52, true, true)]
internal class Mapper052 : Board
{
private bool flag_c;
private bool flag_p;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private int old_irq_counter;
private byte irq_reload;
private bool irq_clear;
private bool mmc3_alt_behavior;
private int prg_and;
private int prg_or;
private int chr_and;
private int chr_or;
private bool locked;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = false);
locked = false;
address_8001 = 0;
prg_and = 31;
prg_or = 0;
chr_and = 255;
chr_or = 0;
prg_reg = new int[4];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = PRG_ROM_08KB_Mask - 1;
prg_reg[3] = PRG_ROM_08KB_Mask;
SetupPRG();
chr_reg = new int[6];
for (int i = 0; i < 6; i++)
{
chr_reg[i] = 0;
}
irq_enabled = false;
irq_counter = 0;
irq_reload = byte.MaxValue;
old_irq_counter = 0;
irq_clear = false;
if (IsGameFoundOnDB)
{
switch (GameCartInfo.chip_type[0].ToLower())
{
case "mmc3a":
mmc3_alt_behavior = true;
Console.WriteLine("Chip= MMC3 A, MMC3 IQR mode switched to RevA");
break;
case "mmc3b":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 B, MMC3 IQR mode switched to RevB");
break;
case "mmc3c":
mmc3_alt_behavior = false;
Console.WriteLine("Chip= MMC3 C, MMC3 IQR mode switched to RevB");
break;
}
}
}
internal override void SoftReset()
{
HardReset();
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
if (!locked)
{
if (PRG_RAM_ENABLED[PRG_AREA_BLK_INDEX[0]] && PRG_RAM_WRITABLE[PRG_AREA_BLK_INDEX[0]])
{
locked = true;
prg_and = ((data << 1) & 0x10) ^ 0x1F;
prg_or = ((data & 6) | ((data >> 3) & data & 1)) << 4;
chr_and = ((data & 0x40) << 1) ^ 0xFF;
chr_or = (((data >> 3) & 4) | ((data >> 1) & 2) | ((data >> 6) & (data >> 4) & 1)) << 7;
SetupCHR();
SetupPRG();
}
}
else
{
base.WriteSRM(ref address, ref data);
}
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 7;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data & PRG_ROM_08KB_Mask;
SetupPRG();
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 40961:
TogglePRGRAMEnable((data & 0x80) != 0);
TogglePRGRAMWritableEnable((data & 0x40) == 0);
break;
case 49152:
irq_reload = data;
break;
case 49153:
if (mmc3_alt_behavior)
{
irq_clear = true;
}
irq_counter = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area0000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area0800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area1000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area1400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area1800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area1C00);
}
else
{
Switch02KCHR(((chr_reg[0] & chr_and) | chr_or) >> 1, CHRArea.Area1000);
Switch02KCHR(((chr_reg[1] & chr_and) | chr_or) >> 1, CHRArea.Area1800);
Switch01KCHR((chr_reg[2] & chr_and) | chr_or, CHRArea.Area0000);
Switch01KCHR((chr_reg[3] & chr_and) | chr_or, CHRArea.Area0400);
Switch01KCHR((chr_reg[4] & chr_and) | chr_or, CHRArea.Area0800);
Switch01KCHR((chr_reg[5] & chr_and) | chr_or, CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG((prg_reg[flag_p ? 2 : 0] & prg_and) | prg_or, PRGArea.Area8000);
Switch08KPRG((prg_reg[1] & prg_and) | prg_or, PRGArea.AreaA000);
Switch08KPRG((prg_reg[(!flag_p) ? 2 : 0] & prg_and) | prg_or, PRGArea.AreaC000);
Switch08KPRG((prg_reg[3] & prg_and) | prg_or, PRGArea.AreaE000);
}
internal override void OnPPUA12RaisingEdge()
{
old_irq_counter = irq_counter;
if (irq_counter == 0 || irq_clear)
{
irq_counter = irq_reload;
}
else
{
irq_counter--;
}
if ((!mmc3_alt_behavior || old_irq_counter != 0 || irq_clear) && irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
irq_clear = false;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(old_irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(prg_and);
stream.Write(prg_or);
stream.Write(chr_and);
stream.Write(chr_or);
stream.Write(locked);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
old_irq_counter = stream.ReadInt32();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
prg_and = stream.ReadInt32();
prg_or = stream.ReadInt32();
chr_and = stream.ReadInt32();
chr_or = stream.ReadInt32();
locked = stream.ReadBoolean();
}
}

113
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper053.cs
View File

@ -1,58 +1,57 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Unknown", 53)]
[HassIssues]
internal class Mapper053 : Board
{
private byte[] regs = new byte[2];
private bool epromFirst;
internal override string Issues => MNInterfaceLanguage.IssueMapper53;
internal override void HardReset()
{
base.HardReset();
regs = new byte[2];
epromFirst = true;
Switch08KPRG(0, PRGArea.Area6000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
regs[1] = data;
UpdatePrg();
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
regs[0] = data;
UpdatePrg();
Switch01KNMTFromMirroring(((data & 0x20) == 32) ? Mirroring.Horz : Mirroring.Vert);
}
private void UpdatePrg()
{
int num = (regs[0] << 3) & 0x78;
Switch08KPRG(((num << 1) | 0xF) + (epromFirst ? 4 : 0), PRGArea.Area6000);
Switch16KPRG(((regs[0] & 0x10) == 16) ? ((num | (regs[1] & 7)) + (epromFirst ? 2 : 0)) : ((!epromFirst) ? 128 : 0), PRGArea.Area8000);
Switch16KPRG(((regs[0] & 0x10) == 16) ? ((num | 7) + (epromFirst ? 2 : 0)) : (epromFirst ? 1 : 129), PRGArea.AreaC000);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(regs);
stream.Write(epromFirst);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
stream.Read(regs, 0, 2);
epromFirst = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Unknown", 53)]
[HassIssues]
internal class Mapper053 : Board
{
private byte[] regs = new byte[2];
private bool epromFirst;
internal override string Issues => MNInterfaceLanguage.IssueMapper53;
internal override void HardReset()
{
base.HardReset();
regs = new byte[2];
epromFirst = true;
Switch08KPRG(0, PRGArea.Area6000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
regs[1] = data;
UpdatePrg();
}
internal override void WriteSRM(ref ushort address, ref byte data)
{
regs[0] = data;
UpdatePrg();
Switch01KNMTFromMirroring(((data & 0x20) == 32) ? Mirroring.Horz : Mirroring.Vert);
}
private void UpdatePrg()
{
int num = (regs[0] << 3) & 0x78;
Switch08KPRG(((num << 1) | 0xF) + (epromFirst ? 4 : 0), PRGArea.Area6000);
Switch16KPRG(((regs[0] & 0x10) == 16) ? ((num | (regs[1] & 7)) + (epromFirst ? 2 : 0)) : ((!epromFirst) ? 128 : 0), PRGArea.Area8000);
Switch16KPRG(((regs[0] & 0x10) == 16) ? ((num | 7) + (epromFirst ? 2 : 0)) : (epromFirst ? 1 : 129), PRGArea.AreaC000);
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(regs);
stream.Write(epromFirst);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
stream.Read(regs, 0, 2);
epromFirst = stream.ReadBoolean();
}
}

191
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper056.cs
View File

@ -1,97 +1,96 @@
namespace MyNes.Core
{
[BoardInfo("Pirate SMB3", 56)]
internal class Mapper056 : Board
{
private int irqCounter = 0;
private int irqLatch = 0;
private bool irqEnabled = false;
private int irqControl = 0;
private int switchControl = 0;
internal override string Issues => MNInterfaceLanguage.IssueMapper56;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
irqLatch = 0;
irqCounter = 0;
irqControl = 0;
irqEnabled = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (address < 61440)
{
switch (address & 0xE000)
{
case 32768:
irqLatch = (irqLatch & 0xFFF0) | (data & 0xF);
break;
case 36864:
irqLatch = (irqLatch & 0xFF0F) | ((data & 0xF) << 4);
break;
case 40960:
irqLatch = (irqLatch & 0xF0FF) | ((data & 0xF) << 8);
break;
case 45056:
irqLatch = (irqLatch & 0xFFF) | ((data & 0xF) << 12);
break;
case 49152:
irqControl = data & 5;
irqEnabled = (data & 2) == 2;
if (irqEnabled)
{
irqCounter = irqLatch;
}
NesEmu.IRQFlags &= -9;
break;
case 53248:
irqEnabled = (irqControl & 1) == 1;
NesEmu.IRQFlags &= -9;
break;
case 57344:
switchControl = data;
break;
}
return;
}
int num = (switchControl & 0xF) - 1;
if (num < 3)
{
Switch08KPRG((data & 0xF) | (PRG_AREA_BLK_INDEX[(num >> 13) + 1] & 0x10), (PRGArea)num);
}
switch (address & 0xC00)
{
case 0:
address &= 3;
if (address < 3)
{
Switch08KPRG((data & 0xF) | (PRG_AREA_BLK_INDEX[(num >> 13) + 1] & 0x10), (PRGArea)address);
}
break;
case 2048:
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Vert : Mirroring.Horz);
break;
case 3072:
Switch01KCHR(data, (CHRArea)(address & 7u));
break;
}
}
internal override void OnCPUClock()
{
if (irqEnabled && irqCounter++ == 65535)
{
irqCounter = irqLatch;
NesEmu.IRQFlags |= 8;
}
}
}
namespace MyNes.Core;
[BoardInfo("Pirate SMB3", 56)]
internal class Mapper056 : Board
{
private int irqCounter;
private int irqLatch;
private bool irqEnabled;
private int irqControl;
private int switchControl;
internal override string Issues => MNInterfaceLanguage.IssueMapper56;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
irqLatch = 0;
irqCounter = 0;
irqControl = 0;
irqEnabled = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
if (address < 61440)
{
switch (address & 0xE000)
{
case 32768:
irqLatch = (irqLatch & 0xFFF0) | (data & 0xF);
break;
case 36864:
irqLatch = (irqLatch & 0xFF0F) | ((data & 0xF) << 4);
break;
case 40960:
irqLatch = (irqLatch & 0xF0FF) | ((data & 0xF) << 8);
break;
case 45056:
irqLatch = (irqLatch & 0xFFF) | ((data & 0xF) << 12);
break;
case 49152:
irqControl = data & 5;
irqEnabled = (data & 2) == 2;
if (irqEnabled)
{
irqCounter = irqLatch;
}
NesEmu.IRQFlags &= -9;
break;
case 53248:
irqEnabled = (irqControl & 1) == 1;
NesEmu.IRQFlags &= -9;
break;
case 57344:
switchControl = data;
break;
}
return;
}
int num = (switchControl & 0xF) - 1;
if (num < 3)
{
Switch08KPRG((data & 0xF) | (PRG_AREA_BLK_INDEX[(num >> 13) + 1] & 0x10), (PRGArea)num);
}
switch (address & 0xC00)
{
case 0:
address &= 3;
if (address < 3)
{
Switch08KPRG((data & 0xF) | (PRG_AREA_BLK_INDEX[(num >> 13) + 1] & 0x10), (PRGArea)address);
}
break;
case 2048:
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Vert : Mirroring.Horz);
break;
case 3072:
Switch01KCHR(data, (CHRArea)(address & 7u));
break;
}
}
internal override void OnCPUClock()
{
if (irqEnabled && irqCounter++ == 65535)
{
irqCounter = irqLatch;
NesEmu.IRQFlags |= 8;
}
}
}

107
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper057.cs
View File

@ -1,55 +1,54 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("6-in-1 (SuperGK)", 57)]
internal class Mapper057 : Board
{
private int chr_aaa;
private int chr_bbb;
private int chr_hhh;
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0x8800)
{
case 32768:
chr_aaa = data & 7;
chr_hhh = (data & 0x40) >> 3;
break;
case 34816:
chr_bbb = data & 7;
if ((data & 0x10) == 16)
{
Switch32KPRG((data & 0xE0) >> 6, PRGArea.Area8000);
}
else
{
Switch16KPRG((data & 0xE0) >> 5, PRGArea.Area8000);
Switch16KPRG((data & 0xE0) >> 5, PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((data & 8) == 8) ? Mirroring.Horz : Mirroring.Vert);
break;
}
Switch08KCHR(chr_hhh | (chr_aaa | chr_bbb));
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_aaa);
stream.Write(chr_bbb);
stream.Write(chr_hhh);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_aaa = stream.ReadInt32();
chr_bbb = stream.ReadInt32();
chr_hhh = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("6-in-1 (SuperGK)", 57)]
internal class Mapper057 : Board
{
private int chr_aaa;
private int chr_bbb;
private int chr_hhh;
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0x8800)
{
case 32768:
chr_aaa = data & 7;
chr_hhh = (data & 0x40) >> 3;
break;
case 34816:
chr_bbb = data & 7;
if ((data & 0x10) == 16)
{
Switch32KPRG((data & 0xE0) >> 6, PRGArea.Area8000);
}
else
{
Switch16KPRG((data & 0xE0) >> 5, PRGArea.Area8000);
Switch16KPRG((data & 0xE0) >> 5, PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((data & 8) == 8) ? Mirroring.Horz : Mirroring.Vert);
break;
}
Switch08KCHR(chr_hhh | (chr_aaa | chr_bbb));
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_aaa);
stream.Write(chr_bbb);
stream.Write(chr_hhh);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_aaa = stream.ReadInt32();
chr_bbb = stream.ReadInt32();
chr_hhh = stream.ReadInt32();
}
}

45
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper058.cs
View File

@ -1,24 +1,23 @@
namespace MyNes.Core
{
[BoardInfo("68-in-1 (Game Star)", 58)]
[HassIssues]
internal class Mapper058 : Board
{
internal override string Issues => MNInterfaceLanguage.IssueMapper58;
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch08KCHR((address >> 3) & 7);
if ((address & 0x40) == 0)
{
Switch32KPRG((address & 7) >> 1, PRGArea.Area8000);
}
else
{
Switch16KPRG(address & 7, PRGArea.Area8000);
Switch16KPRG(address & 7, PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}
namespace MyNes.Core;
[BoardInfo("68-in-1 (Game Star)", 58)]
[HassIssues]
internal class Mapper058 : Board
{
internal override string Issues => MNInterfaceLanguage.IssueMapper58;
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch08KCHR((address >> 3) & 7);
if ((address & 0x40) == 0)
{
Switch32KPRG((address & 7) >> 1, PRGArea.Area8000);
}
else
{
Switch16KPRG(address & 7, PRGArea.Area8000);
Switch16KPRG(address & 7, PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}

131
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper060.cs
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@ -1,67 +1,66 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Unknown", 60)]
[HassIssues]
internal class Mapper060 : Board
{
private int latch = 0;
private byte menu = 0;
internal override string Issues => MNInterfaceLanguage.IssueMapper60;
internal override void HardReset()
{
base.HardReset();
latch = 0;
menu = 0;
}
internal override void SoftReset()
{
base.SoftReset();
latch = 0;
menu = (byte)((uint)(menu + 1) & 3u);
Switch08KCHR(menu);
Switch16KPRG(menu, PRGArea.Area8000);
Switch16KPRG(menu, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
latch = address & 0x100;
Switch01KNMTFromMirroring(((address & 8) == 8) ? Mirroring.Horz : Mirroring.Vert);
Switch16KPRG((address >> 4) & ~((~address >> 7) & 1), PRGArea.Area8000);
Switch16KPRG((address >> 4) | ((~address >> 7) & 1), PRGArea.AreaC000);
Switch08KCHR(address);
}
internal override void ReadPRG(ref ushort address, out byte data)
{
if (latch == 0)
{
base.ReadPRG(ref address, out data);
}
else
{
data = menu;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(latch);
stream.Write(menu);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
latch = stream.ReadInt32();
menu = stream.ReadByte();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Unknown", 60)]
[HassIssues]
internal class Mapper060 : Board
{
private int latch;
private byte menu;
internal override string Issues => MNInterfaceLanguage.IssueMapper60;
internal override void HardReset()
{
base.HardReset();
latch = 0;
menu = 0;
}
internal override void SoftReset()
{
base.SoftReset();
latch = 0;
menu = (byte)((uint)(menu + 1) & 3u);
Switch08KCHR(menu);
Switch16KPRG(menu, PRGArea.Area8000);
Switch16KPRG(menu, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
latch = address & 0x100;
Switch01KNMTFromMirroring(((address & 8) == 8) ? Mirroring.Horz : Mirroring.Vert);
Switch16KPRG((address >> 4) & ~((~address >> 7) & 1), PRGArea.Area8000);
Switch16KPRG((address >> 4) | ((~address >> 7) & 1), PRGArea.AreaC000);
Switch08KCHR(address);
}
internal override void ReadPRG(ref ushort address, out byte data)
{
if (latch == 0)
{
base.ReadPRG(ref address, out data);
}
else
{
data = menu;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(latch);
stream.Write(menu);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
latch = stream.ReadInt32();
menu = stream.ReadByte();
}
}

37
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper061.cs
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@ -1,20 +1,19 @@
namespace MyNes.Core
{
[BoardInfo("20-in-1", 61)]
internal class Mapper061 : Board
{
internal override void WritePRG(ref ushort address, ref byte data)
{
if ((address & 0x10) == 0)
{
Switch32KPRG(address & 0xF, PRGArea.Area8000);
}
else
{
Switch16KPRG(((address & 0xF) << 1) | ((address & 0x20) >> 5), PRGArea.Area8000);
Switch16KPRG(((address & 0xF) << 1) | ((address & 0x20) >> 5), PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}
namespace MyNes.Core;
[BoardInfo("20-in-1", 61)]
internal class Mapper061 : Board
{
internal override void WritePRG(ref ushort address, ref byte data)
{
if ((address & 0x10) == 0)
{
Switch32KPRG(address & 0xF, PRGArea.Area8000);
}
else
{
Switch16KPRG(((address & 0xF) << 1) | ((address & 0x20) >> 5), PRGArea.Area8000);
Switch16KPRG(((address & 0xF) << 1) | ((address & 0x20) >> 5), PRGArea.AreaC000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}

45
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper062.cs
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@ -1,24 +1,23 @@
namespace MyNes.Core
{
[BoardInfo("Super 700-in-1", 62)]
internal class Mapper062 : Board
{
private int prg_page;
internal override void WritePRG(ref ushort address, ref byte data)
{
prg_page = ((address & 0x3F00) >> 8) | (address & 0x40);
Switch08KCHR(((address & 0x1F) << 2) | (data & 3));
if ((address & 0x20) == 32)
{
Switch16KPRG(prg_page, PRGArea.Area8000);
Switch16KPRG(prg_page, PRGArea.AreaC000);
}
else
{
Switch32KPRG(prg_page >> 1, PRGArea.Area8000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}
namespace MyNes.Core;
[BoardInfo("Super 700-in-1", 62)]
internal class Mapper062 : Board
{
private int prg_page;
internal override void WritePRG(ref ushort address, ref byte data)
{
prg_page = ((address & 0x3F00) >> 8) | (address & 0x40);
Switch08KCHR(((address & 0x1F) << 2) | (data & 3));
if ((address & 0x20) == 32)
{
Switch16KPRG(prg_page, PRGArea.Area8000);
Switch16KPRG(prg_page, PRGArea.AreaC000);
}
else
{
Switch32KPRG(prg_page >> 1, PRGArea.Area8000);
}
Switch01KNMTFromMirroring(((address & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
}
}

513
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper064.cs
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@ -1,258 +1,257 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Tengen RAMBO-1", 64, true, true)]
internal class Mapper064 : Board
{
private bool flag_c;
private bool flag_p;
private bool flag_k;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private byte irq_reload;
private bool irq_mode;
private bool irq_clear;
private int irq_prescaler;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = (flag_k = false));
address_8001 = 0;
prg_reg = new int[3];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = 2;
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
SetupPRG();
chr_reg = new int[8];
for (int i = 0; i < 8; i++)
{
chr_reg[i] = i;
}
SetupCHR();
irq_enabled = false;
irq_counter = 0;
irq_prescaler = 0;
irq_mode = false;
irq_reload = byte.MaxValue;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 0xF;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
flag_k = (data & 0x20) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data;
SetupPRG();
break;
case 8:
chr_reg[6] = data;
SetupCHR();
break;
case 9:
chr_reg[7] = data;
SetupCHR();
break;
case 15:
prg_reg[2] = data;
SetupPRG();
break;
case 10:
case 11:
case 12:
case 13:
case 14:
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 49152:
irq_reload = data;
break;
case 49153:
irq_mode = (data & 1) == 1;
irq_clear = true;
irq_prescaler = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
if (!flag_k)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area0000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area0800);
}
else
{
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
Switch01KCHR(chr_reg[6], CHRArea.Area0400);
Switch01KCHR(chr_reg[1], CHRArea.Area0800);
Switch01KCHR(chr_reg[7], CHRArea.Area0C00);
}
Switch01KCHR(chr_reg[2], CHRArea.Area1000);
Switch01KCHR(chr_reg[3], CHRArea.Area1400);
Switch01KCHR(chr_reg[4], CHRArea.Area1800);
Switch01KCHR(chr_reg[5], CHRArea.Area1C00);
}
else
{
if (!flag_k)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area1000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area1800);
}
else
{
Switch01KCHR(chr_reg[0], CHRArea.Area1000);
Switch01KCHR(chr_reg[6], CHRArea.Area1400);
Switch01KCHR(chr_reg[1], CHRArea.Area1800);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
}
Switch01KCHR(chr_reg[2], CHRArea.Area0000);
Switch01KCHR(chr_reg[3], CHRArea.Area0400);
Switch01KCHR(chr_reg[4], CHRArea.Area0800);
Switch01KCHR(chr_reg[5], CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG(prg_reg[flag_p ? 2 : 0], PRGArea.Area8000);
Switch08KPRG(prg_reg[(!flag_p) ? 1u : 0u], PRGArea.AreaA000);
Switch08KPRG(prg_reg[flag_p ? 1 : 2], PRGArea.AreaC000);
}
internal override void OnPPUA12RaisingEdge()
{
ClockIRQ();
}
internal override void OnCPUClock()
{
if (irq_mode)
{
irq_prescaler++;
if (irq_prescaler == 4)
{
irq_prescaler = 0;
ClockIRQ();
}
}
}
private void ClockIRQ()
{
if (irq_clear)
{
irq_counter = (byte)(irq_reload + 1);
irq_clear = false;
}
else if (irq_counter == 0)
{
irq_counter = irq_reload;
}
else if (--irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(irq_prescaler);
stream.Write(irq_mode);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
irq_prescaler = stream.ReadInt32();
irq_mode = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Tengen RAMBO-1", 64, true, true)]
internal class Mapper064 : Board
{
private bool flag_c;
private bool flag_p;
private bool flag_k;
private int address_8001;
private int[] chr_reg;
private int[] prg_reg;
private bool irq_enabled;
private byte irq_counter;
private byte irq_reload;
private bool irq_mode;
private bool irq_clear;
private int irq_prescaler;
internal override void HardReset()
{
base.HardReset();
flag_c = (flag_p = (flag_k = false));
address_8001 = 0;
prg_reg = new int[3];
prg_reg[0] = 0;
prg_reg[1] = 1;
prg_reg[2] = 2;
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
SetupPRG();
chr_reg = new int[8];
for (int i = 0; i < 8; i++)
{
chr_reg[i] = i;
}
SetupCHR();
irq_enabled = false;
irq_counter = 0;
irq_prescaler = 0;
irq_mode = false;
irq_reload = byte.MaxValue;
irq_clear = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE001)
{
case 32768:
address_8001 = data & 0xF;
flag_c = (data & 0x80) != 0;
flag_p = (data & 0x40) != 0;
flag_k = (data & 0x20) != 0;
SetupCHR();
SetupPRG();
break;
case 32769:
switch (address_8001)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
chr_reg[address_8001] = data;
SetupCHR();
break;
case 6:
case 7:
prg_reg[address_8001 - 6] = data;
SetupPRG();
break;
case 8:
chr_reg[6] = data;
SetupCHR();
break;
case 9:
chr_reg[7] = data;
SetupCHR();
break;
case 15:
prg_reg[2] = data;
SetupPRG();
break;
case 10:
case 11:
case 12:
case 13:
case 14:
break;
}
break;
case 40960:
if (NMT_DEFAULT_MIRROR != Mirroring.Full)
{
Switch01KNMTFromMirroring(((data & 1) == 1) ? Mirroring.Horz : Mirroring.Vert);
}
break;
case 49152:
irq_reload = data;
break;
case 49153:
irq_mode = (data & 1) == 1;
irq_clear = true;
irq_prescaler = 0;
break;
case 57344:
irq_enabled = false;
NesEmu.IRQFlags &= -9;
break;
case 57345:
irq_enabled = true;
break;
}
}
private void SetupCHR()
{
if (!flag_c)
{
if (!flag_k)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area0000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area0800);
}
else
{
Switch01KCHR(chr_reg[0], CHRArea.Area0000);
Switch01KCHR(chr_reg[6], CHRArea.Area0400);
Switch01KCHR(chr_reg[1], CHRArea.Area0800);
Switch01KCHR(chr_reg[7], CHRArea.Area0C00);
}
Switch01KCHR(chr_reg[2], CHRArea.Area1000);
Switch01KCHR(chr_reg[3], CHRArea.Area1400);
Switch01KCHR(chr_reg[4], CHRArea.Area1800);
Switch01KCHR(chr_reg[5], CHRArea.Area1C00);
}
else
{
if (!flag_k)
{
Switch02KCHR(chr_reg[0] >> 1, CHRArea.Area1000);
Switch02KCHR(chr_reg[1] >> 1, CHRArea.Area1800);
}
else
{
Switch01KCHR(chr_reg[0], CHRArea.Area1000);
Switch01KCHR(chr_reg[6], CHRArea.Area1400);
Switch01KCHR(chr_reg[1], CHRArea.Area1800);
Switch01KCHR(chr_reg[7], CHRArea.Area1C00);
}
Switch01KCHR(chr_reg[2], CHRArea.Area0000);
Switch01KCHR(chr_reg[3], CHRArea.Area0400);
Switch01KCHR(chr_reg[4], CHRArea.Area0800);
Switch01KCHR(chr_reg[5], CHRArea.Area0C00);
}
}
private void SetupPRG()
{
Switch08KPRG(prg_reg[flag_p ? 2 : 0], PRGArea.Area8000);
Switch08KPRG(prg_reg[(!flag_p) ? 1u : 0u], PRGArea.AreaA000);
Switch08KPRG(prg_reg[flag_p ? 1 : 2], PRGArea.AreaC000);
}
internal override void OnPPUA12RaisingEdge()
{
ClockIRQ();
}
internal override void OnCPUClock()
{
if (irq_mode)
{
irq_prescaler++;
if (irq_prescaler == 4)
{
irq_prescaler = 0;
ClockIRQ();
}
}
}
private void ClockIRQ()
{
if (irq_clear)
{
irq_counter = (byte)(irq_reload + 1);
irq_clear = false;
}
else if (irq_counter == 0)
{
irq_counter = irq_reload;
}
else if (--irq_counter == 0 && irq_enabled)
{
NesEmu.IRQFlags |= 8;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_c);
stream.Write(flag_p);
stream.Write(address_8001);
for (int i = 0; i < chr_reg.Length; i++)
{
stream.Write(chr_reg[i]);
}
for (int j = 0; j < prg_reg.Length; j++)
{
stream.Write(prg_reg[j]);
}
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(irq_reload);
stream.Write(irq_clear);
stream.Write(irq_prescaler);
stream.Write(irq_mode);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_c = stream.ReadBoolean();
flag_p = stream.ReadBoolean();
address_8001 = stream.ReadInt32();
for (int i = 0; i < chr_reg.Length; i++)
{
chr_reg[i] = stream.ReadInt32();
}
for (int j = 0; j < prg_reg.Length; j++)
{
prg_reg[j] = stream.ReadInt32();
}
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadByte();
irq_reload = stream.ReadByte();
irq_clear = stream.ReadBoolean();
irq_prescaler = stream.ReadInt32();
irq_mode = stream.ReadBoolean();
}
}

185
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper065.cs
View File

@ -1,94 +1,93 @@
namespace MyNes.Core
{
[BoardInfo("Irem H-3001", 65)]
internal class Mapper065 : Board
{
private bool irq_enable;
private int irq_reload;
private int irq_counter;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(0, PRGArea.Area8000);
Switch08KPRG(1, PRGArea.AreaA000);
Switch08KPRG(254, PRGArea.AreaC000);
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 36865:
Switch01KNMTFromMirroring(((data & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
break;
case 36867:
irq_enable = (data & 0x80) == 128;
NesEmu.IRQFlags &= -9;
break;
case 36868:
irq_counter = irq_reload;
NesEmu.IRQFlags &= -9;
break;
case 36869:
irq_reload = (irq_reload & 0xFF) | (data << 8);
break;
case 36870:
irq_reload = (irq_reload & 0xFF00) | data;
break;
case 40960:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 49152:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 45056:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 45057:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 45058:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 45059:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 45060:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 45061:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 45062:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 45063:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
internal override void OnCPUClock()
{
if (irq_enable)
{
if (irq_counter > 0)
{
irq_counter--;
}
else if (irq_counter == 0)
{
irq_counter = -1;
NesEmu.IRQFlags |= 8;
}
}
}
}
namespace MyNes.Core;
[BoardInfo("Irem H-3001", 65)]
internal class Mapper065 : Board
{
private bool irq_enable;
private int irq_reload;
private int irq_counter;
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(0, PRGArea.Area8000);
Switch08KPRG(1, PRGArea.AreaA000);
Switch08KPRG(254, PRGArea.AreaC000);
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address)
{
case 32768:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 36865:
Switch01KNMTFromMirroring(((data & 0x80) == 128) ? Mirroring.Horz : Mirroring.Vert);
break;
case 36867:
irq_enable = (data & 0x80) == 128;
NesEmu.IRQFlags &= -9;
break;
case 36868:
irq_counter = irq_reload;
NesEmu.IRQFlags &= -9;
break;
case 36869:
irq_reload = (irq_reload & 0xFF) | (data << 8);
break;
case 36870:
irq_reload = (irq_reload & 0xFF00) | data;
break;
case 40960:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 49152:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 45056:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 45057:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 45058:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 45059:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 45060:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 45061:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 45062:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 45063:
Switch01KCHR(data, CHRArea.Area1C00);
break;
}
}
internal override void OnCPUClock()
{
if (irq_enable)
{
if (irq_counter > 0)
{
irq_counter--;
}
else if (irq_counter == 0)
{
irq_counter = -1;
NesEmu.IRQFlags |= 8;
}
}
}
}

21
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper066.cs
View File

@ -1,12 +1,11 @@
namespace MyNes.Core
{
[BoardInfo("GxROM", 66)]
internal class Mapper066 : Board
{
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch32KPRG((data >> 4) & 3, PRGArea.Area8000);
Switch08KCHR(data & 3);
}
}
namespace MyNes.Core;
[BoardInfo("GxROM", 66)]
internal class Mapper066 : Board
{
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch32KPRG((data >> 4) & 3, PRGArea.Area8000);
Switch08KCHR(data & 3);
}
}

213
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper067.cs
View File

@ -1,108 +1,107 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Sunsoft 3", 67)]
internal class Mapper067 : Board
{
private bool irq_enabled;
private int irq_counter;
private bool odd;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
irq_enabled = false;
irq_counter = 65535;
odd = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF800)
{
case 34816:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 38912:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 43008:
Switch02KCHR(data, CHRArea.Area1000);
break;
case 47104:
Switch02KCHR(data, CHRArea.Area1800);
break;
case 51200:
if (!odd)
{
irq_counter = (irq_counter & 0xFF) | (data << 8);
}
else
{
irq_counter = (irq_counter & 0xFF00) | data;
}
odd = !odd;
break;
case 55296:
irq_enabled = (data & 0x10) == 16;
odd = false;
NesEmu.IRQFlags &= -9;
break;
case 59392:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 63488:
Switch16KPRG(data, PRGArea.Area8000);
break;
}
}
internal override void OnCPUClock()
{
if (irq_enabled)
{
irq_counter--;
if (irq_counter == 0)
{
irq_counter = 65535;
NesEmu.IRQFlags |= 8;
irq_enabled = false;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(odd);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadInt32();
odd = stream.ReadBoolean();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Sunsoft 3", 67)]
internal class Mapper067 : Board
{
private bool irq_enabled;
private int irq_counter;
private bool odd;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
irq_enabled = false;
irq_counter = 65535;
odd = false;
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF800)
{
case 34816:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 38912:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 43008:
Switch02KCHR(data, CHRArea.Area1000);
break;
case 47104:
Switch02KCHR(data, CHRArea.Area1800);
break;
case 51200:
if (!odd)
{
irq_counter = (irq_counter & 0xFF) | (data << 8);
}
else
{
irq_counter = (irq_counter & 0xFF00) | data;
}
odd = !odd;
break;
case 55296:
irq_enabled = (data & 0x10) == 16;
odd = false;
NesEmu.IRQFlags &= -9;
break;
case 59392:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 63488:
Switch16KPRG(data, PRGArea.Area8000);
break;
}
}
internal override void OnCPUClock()
{
if (irq_enabled)
{
irq_counter--;
if (irq_counter == 0)
{
irq_counter = 65535;
NesEmu.IRQFlags |= 8;
irq_enabled = false;
}
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(irq_enabled);
stream.Write(irq_counter);
stream.Write(odd);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
irq_enabled = stream.ReadBoolean();
irq_counter = stream.ReadInt32();
odd = stream.ReadBoolean();
}
}

221
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper068.cs
View File

@ -1,112 +1,111 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Sunsoft 4", 68)]
internal class Mapper068 : Board
{
private bool flag_r;
private bool flag_m;
private int nt_reg0;
private int nt_reg1;
private int temp;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF000)
{
case 32768:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 36864:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch02KCHR(data, CHRArea.Area1000);
break;
case 45056:
Switch02KCHR(data, CHRArea.Area1800);
break;
case 49152:
nt_reg0 = (data & 0x7F) | 0x80;
break;
case 53248:
nt_reg1 = (data & 0x7F) | 0x80;
break;
case 57344:
flag_r = (data & 0x10) == 16;
flag_m = (data & 1) == 1;
Switch01KNMTFromMirroring(flag_m ? Mirroring.Horz : Mirroring.Vert);
break;
case 61440:
Switch16KPRG(data, PRGArea.Area8000);
break;
}
}
internal override void ReadNMT(ref ushort address, out byte data)
{
if (!flag_r)
{
data = NMT_RAM[NMT_AREA_BLK_INDEX[(address >> 10) & 3]][address & 0x3FF];
return;
}
switch ((address >> 10) & 3)
{
case 0:
data = CHR_ROM[nt_reg0][address & 0x3FF];
break;
case 1:
data = CHR_ROM[flag_m ? nt_reg0 : nt_reg1][address & 0x3FF];
break;
case 2:
data = CHR_ROM[flag_m ? nt_reg1 : nt_reg0][address & 0x3FF];
break;
case 3:
data = CHR_ROM[nt_reg1][address & 0x3FF];
break;
default:
data = 0;
break;
}
}
internal override void WriteNMT(ref ushort address, ref byte data)
{
if (!flag_r)
{
base.WriteNMT(ref address, ref data);
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_r);
stream.Write(flag_m);
stream.Write(nt_reg0);
stream.Write(nt_reg1);
stream.Write(temp);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_r = stream.ReadBoolean();
flag_m = stream.ReadBoolean();
nt_reg0 = stream.ReadInt32();
nt_reg1 = stream.ReadInt32();
temp = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Sunsoft 4", 68)]
internal class Mapper068 : Board
{
private bool flag_r;
private bool flag_m;
private int nt_reg0;
private int nt_reg1;
private int temp;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xF000)
{
case 32768:
Switch02KCHR(data, CHRArea.Area0000);
break;
case 36864:
Switch02KCHR(data, CHRArea.Area0800);
break;
case 40960:
Switch02KCHR(data, CHRArea.Area1000);
break;
case 45056:
Switch02KCHR(data, CHRArea.Area1800);
break;
case 49152:
nt_reg0 = (data & 0x7F) | 0x80;
break;
case 53248:
nt_reg1 = (data & 0x7F) | 0x80;
break;
case 57344:
flag_r = (data & 0x10) == 16;
flag_m = (data & 1) == 1;
Switch01KNMTFromMirroring(flag_m ? Mirroring.Horz : Mirroring.Vert);
break;
case 61440:
Switch16KPRG(data, PRGArea.Area8000);
break;
}
}
internal override void ReadNMT(ref ushort address, out byte data)
{
if (!flag_r)
{
data = NMT_RAM[NMT_AREA_BLK_INDEX[(address >> 10) & 3]][address & 0x3FF];
return;
}
switch ((address >> 10) & 3)
{
case 0:
data = CHR_ROM[nt_reg0][address & 0x3FF];
break;
case 1:
data = CHR_ROM[flag_m ? nt_reg0 : nt_reg1][address & 0x3FF];
break;
case 2:
data = CHR_ROM[flag_m ? nt_reg1 : nt_reg0][address & 0x3FF];
break;
case 3:
data = CHR_ROM[nt_reg1][address & 0x3FF];
break;
default:
data = 0;
break;
}
}
internal override void WriteNMT(ref ushort address, ref byte data)
{
if (!flag_r)
{
base.WriteNMT(ref address, ref data);
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(flag_r);
stream.Write(flag_m);
stream.Write(nt_reg0);
stream.Write(nt_reg1);
stream.Write(temp);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
flag_r = stream.ReadBoolean();
flag_m = stream.ReadBoolean();
nt_reg0 = stream.ReadInt32();
nt_reg1 = stream.ReadInt32();
temp = stream.ReadInt32();
}
}

515
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper069.cs
View File

@ -1,259 +1,258 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("FME-7/Sunsoft 5B", 69)]
[WithExternalSound]
internal class Mapper069 : Board
{
private int address_A000;
private int address_E000;
private int irq_counter;
private bool irq_count_enabled;
private bool irq_trigger_enabled;
private Sunsoft5BChnl snd_1;
private Sunsoft5BChnl snd_2;
private Sunsoft5BChnl snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new Sunsoft5BChnl();
snd_2 = new Sunsoft5BChnl();
snd_3 = new Sunsoft5BChnl();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
address_A000 = 0;
irq_counter = 65535;
irq_count_enabled = false;
irq_trigger_enabled = false;
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE000)
{
case 32768:
address_A000 = data & 0xF;
break;
case 40960:
switch (address_A000)
{
case 0:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 1:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 2:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 3:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 4:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 5:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 6:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 7:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 8:
TogglePRGRAMEnable((data & 0x80) == 128);
if ((data & 0x40u) != 0)
{
Toggle08KPRG_RAM(ram: true, PRGArea.Area6000);
Switch08KPRG(data & 0x3F & PRG_RAM_08KB_Mask, PRGArea.Area6000);
}
else
{
Toggle08KPRG_RAM(ram: false, PRGArea.Area6000);
Switch08KPRG(data & 0x3F, PRGArea.Area6000);
}
break;
case 9:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 10:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 11:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 12:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 13:
irq_count_enabled = (data & 0x80) == 128;
irq_trigger_enabled = (data & 1) == 1;
if (!irq_trigger_enabled)
{
NesEmu.IRQFlags &= -9;
}
break;
case 14:
irq_counter = (irq_counter & 0xFF00) | data;
break;
case 15:
irq_counter = (irq_counter & 0xFF) | (data << 8);
break;
}
break;
case 49152:
address_E000 = data & 0xF;
break;
case 57344:
switch (address_E000)
{
case 0:
snd_1.Write0(ref data);
break;
case 1:
snd_1.Write1(ref data);
break;
case 2:
snd_2.Write0(ref data);
break;
case 3:
snd_2.Write1(ref data);
break;
case 4:
snd_3.Write0(ref data);
break;
case 5:
snd_3.Write1(ref data);
break;
case 7:
snd_1.Enabled = (data & 1) == 0;
snd_2.Enabled = (data & 2) == 0;
snd_3.Enabled = (data & 4) == 0;
break;
case 8:
snd_1.Volume = (byte)(data & 0xFu);
break;
case 9:
snd_2.Volume = (byte)(data & 0xFu);
break;
case 10:
snd_3.Volume = (byte)(data & 0xFu);
break;
case 6:
break;
}
break;
}
}
internal override void OnCPUClock()
{
if (!irq_count_enabled)
{
return;
}
irq_counter--;
if (irq_counter <= 0)
{
irq_counter = 65535;
if (irq_trigger_enabled)
{
NesEmu.IRQFlags |= 8;
}
}
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN3;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(address_A000);
stream.Write(address_E000);
stream.Write(irq_counter);
stream.Write(irq_count_enabled);
stream.Write(irq_trigger_enabled);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
address_A000 = stream.ReadInt32();
address_E000 = stream.ReadInt32();
irq_counter = stream.ReadInt32();
irq_count_enabled = stream.ReadBoolean();
irq_trigger_enabled = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("FME-7/Sunsoft 5B", 69)]
[WithExternalSound]
internal class Mapper069 : Board
{
private int address_A000;
private int address_E000;
private int irq_counter;
private bool irq_count_enabled;
private bool irq_trigger_enabled;
private Sunsoft5BChnl snd_1;
private Sunsoft5BChnl snd_2;
private Sunsoft5BChnl snd_3;
private double[] audio_pulse_table;
private double[] audio_tnd_table;
internal override void Initialize(IRom rom)
{
base.Initialize(rom);
snd_1 = new Sunsoft5BChnl();
snd_2 = new Sunsoft5BChnl();
snd_3 = new Sunsoft5BChnl();
audio_pulse_table = new double[32];
for (int i = 0; i < 32; i++)
{
audio_pulse_table[i] = 95.52 / (8128.0 / (double)i + 100.0);
}
audio_tnd_table = new double[204];
for (int j = 0; j < 204; j++)
{
audio_tnd_table[j] = 163.67 / (24329.0 / (double)j + 100.0);
}
}
internal override void HardReset()
{
base.HardReset();
Switch08KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaE000);
address_A000 = 0;
irq_counter = 65535;
irq_count_enabled = false;
irq_trigger_enabled = false;
APUApplyChannelsSettings();
snd_1.HardReset();
snd_2.HardReset();
snd_3.HardReset();
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch (address & 0xE000)
{
case 32768:
address_A000 = data & 0xF;
break;
case 40960:
switch (address_A000)
{
case 0:
Switch01KCHR(data, CHRArea.Area0000);
break;
case 1:
Switch01KCHR(data, CHRArea.Area0400);
break;
case 2:
Switch01KCHR(data, CHRArea.Area0800);
break;
case 3:
Switch01KCHR(data, CHRArea.Area0C00);
break;
case 4:
Switch01KCHR(data, CHRArea.Area1000);
break;
case 5:
Switch01KCHR(data, CHRArea.Area1400);
break;
case 6:
Switch01KCHR(data, CHRArea.Area1800);
break;
case 7:
Switch01KCHR(data, CHRArea.Area1C00);
break;
case 8:
TogglePRGRAMEnable((data & 0x80) == 128);
if ((data & 0x40u) != 0)
{
Toggle08KPRG_RAM(ram: true, PRGArea.Area6000);
Switch08KPRG(data & 0x3F & PRG_RAM_08KB_Mask, PRGArea.Area6000);
}
else
{
Toggle08KPRG_RAM(ram: false, PRGArea.Area6000);
Switch08KPRG(data & 0x3F, PRGArea.Area6000);
}
break;
case 9:
Switch08KPRG(data, PRGArea.Area8000);
break;
case 10:
Switch08KPRG(data, PRGArea.AreaA000);
break;
case 11:
Switch08KPRG(data, PRGArea.AreaC000);
break;
case 12:
switch (data & 3)
{
case 0:
Switch01KNMTFromMirroring(Mirroring.Vert);
break;
case 1:
Switch01KNMTFromMirroring(Mirroring.Horz);
break;
case 2:
Switch01KNMTFromMirroring(Mirroring.OneScA);
break;
case 3:
Switch01KNMTFromMirroring(Mirroring.OneScB);
break;
}
break;
case 13:
irq_count_enabled = (data & 0x80) == 128;
irq_trigger_enabled = (data & 1) == 1;
if (!irq_trigger_enabled)
{
NesEmu.IRQFlags &= -9;
}
break;
case 14:
irq_counter = (irq_counter & 0xFF00) | data;
break;
case 15:
irq_counter = (irq_counter & 0xFF) | (data << 8);
break;
}
break;
case 49152:
address_E000 = data & 0xF;
break;
case 57344:
switch (address_E000)
{
case 0:
snd_1.Write0(ref data);
break;
case 1:
snd_1.Write1(ref data);
break;
case 2:
snd_2.Write0(ref data);
break;
case 3:
snd_2.Write1(ref data);
break;
case 4:
snd_3.Write0(ref data);
break;
case 5:
snd_3.Write1(ref data);
break;
case 7:
snd_1.Enabled = (data & 1) == 0;
snd_2.Enabled = (data & 2) == 0;
snd_3.Enabled = (data & 4) == 0;
break;
case 8:
snd_1.Volume = (byte)(data & 0xFu);
break;
case 9:
snd_2.Volume = (byte)(data & 0xFu);
break;
case 10:
snd_3.Volume = (byte)(data & 0xFu);
break;
case 6:
break;
}
break;
}
}
internal override void OnCPUClock()
{
if (!irq_count_enabled)
{
return;
}
irq_counter--;
if (irq_counter <= 0)
{
irq_counter = 65535;
if (irq_trigger_enabled)
{
NesEmu.IRQFlags |= 8;
}
}
}
internal override double APUGetSample()
{
return audio_pulse_table[snd_1.output + snd_2.output] + audio_tnd_table[snd_3.output];
}
internal override void OnAPUClockSingle()
{
base.OnAPUClockSingle();
snd_1.ClockSingle();
snd_2.ClockSingle();
snd_3.ClockSingle();
}
internal override void APUApplyChannelsSettings()
{
base.APUApplyChannelsSettings();
snd_1.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN1;
snd_2.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN2;
snd_3.Outputable = MyNesMain.RendererSettings.Audio_ChannelEnabled_SUN3;
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(address_A000);
stream.Write(address_E000);
stream.Write(irq_counter);
stream.Write(irq_count_enabled);
stream.Write(irq_trigger_enabled);
snd_1.SaveState(ref stream);
snd_2.SaveState(ref stream);
snd_3.SaveState(ref stream);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
address_A000 = stream.ReadInt32();
address_E000 = stream.ReadInt32();
irq_counter = stream.ReadInt32();
irq_count_enabled = stream.ReadBoolean();
irq_trigger_enabled = stream.ReadBoolean();
snd_1.LoadState(ref stream);
snd_2.LoadState(ref stream);
snd_3.LoadState(ref stream);
}
}

33
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper070.cs
View File

@ -1,18 +1,17 @@
namespace MyNes.Core
{
[BoardInfo("Bandai", 70)]
internal class Mapper070 : Board
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch16KPRG((data >> 4) & 0xF, PRGArea.Area8000);
Switch08KCHR(data & 0xF);
}
}
namespace MyNes.Core;
[BoardInfo("Bandai", 70)]
internal class Mapper070 : Board
{
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_08KB_Mask, PRGArea.AreaC000);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
Switch16KPRG((data >> 4) & 0xF, PRGArea.Area8000);
Switch08KCHR(data & 0xF);
}
}

57
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper071.cs
View File

@ -1,30 +1,29 @@
namespace MyNes.Core
{
[BoardInfo("Camerica", 71)]
internal class Mapper071 : Board
{
private bool fireHawk;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
fireHawk = SHA1.ToUpper() == "334781C830F135CF30A33E392D8AAA4AFDC223F9";
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
if (addr < 40960)
{
if (fireHawk)
{
Switch01KNMTFromMirroring(((val & 0x10) == 16) ? Mirroring.OneScB : Mirroring.OneScA);
}
}
else if (addr >= 49152)
{
Switch16KPRG(val, PRGArea.Area8000);
}
}
}
namespace MyNes.Core;
[BoardInfo("Camerica", 71)]
internal class Mapper071 : Board
{
private bool fireHawk;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
fireHawk = SHA1.ToUpper() == "334781C830F135CF30A33E392D8AAA4AFDC223F9";
}
internal override void WritePRG(ref ushort addr, ref byte val)
{
if (addr < 40960)
{
if (fireHawk)
{
Switch01KNMTFromMirroring(((val & 0x10) == 16) ? Mirroring.OneScB : Mirroring.OneScA);
}
}
else if (addr >= 49152)
{
Switch16KPRG(val, PRGArea.Area8000);
}
}
}

103
AxibugEmuOnline.Client/Assets/MyNes.Core/Mapper072.cs
View File

@ -1,53 +1,52 @@
using System.IO;
namespace MyNes.Core
{
[BoardInfo("Jaleco Early Mapper 0", 72)]
internal class Mapper072 : Board
{
private byte writeData;
private int chr_reg;
private int prg_reg;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
writeData = 0;
chr_reg = (prg_reg = 0);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch ((data >> 6) & 3)
{
case 0:
Switch08KCHR(chr_reg);
Switch16KPRG(prg_reg, PRGArea.Area8000);
break;
case 1:
chr_reg = data & 0xF;
break;
case 2:
prg_reg = data & 0xF;
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_reg);
stream.Write(prg_reg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_reg = stream.ReadInt32();
prg_reg = stream.ReadInt32();
}
}
using System.IO;
namespace MyNes.Core;
[BoardInfo("Jaleco Early Mapper 0", 72)]
internal class Mapper072 : Board
{
private byte writeData;
private int chr_reg;
private int prg_reg;
internal override void HardReset()
{
base.HardReset();
Switch16KPRG(PRG_ROM_16KB_Mask, PRGArea.AreaC000);
writeData = 0;
chr_reg = (prg_reg = 0);
}
internal override void WritePRG(ref ushort address, ref byte data)
{
switch ((data >> 6) & 3)
{
case 0:
Switch08KCHR(chr_reg);
Switch16KPRG(prg_reg, PRGArea.Area8000);
break;
case 1:
chr_reg = data & 0xF;
break;
case 2:
prg_reg = data & 0xF;
break;
}
}
internal override void WriteStateData(ref BinaryWriter stream)
{
base.WriteStateData(ref stream);
stream.Write(chr_reg);
stream.Write(prg_reg);
}
internal override void ReadStateData(ref BinaryReader stream)
{
base.ReadStateData(ref stream);
chr_reg = stream.ReadInt32();
prg_reg = stream.ReadInt32();
}
}

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