using static VirtualNes.MMU;
using static VirtualNes.Core.CPU;
using INT = System.Int32;
using BYTE = System.Byte;

namespace VirtualNes.Core
{
    public class Mapper248 : Mapper
    {
        BYTE[] reg = new BYTE[8];
        BYTE prg0, prg1;
        BYTE chr01, chr23, chr4, chr5, chr6, chr7;
        BYTE we_sram;

        BYTE irq_enable;
        BYTE irq_counter;
        BYTE irq_latch;
        BYTE irq_request;
        public Mapper248(NES parent) : base(parent)
        {
        }

        public override void Reset()
        {
            for (INT i = 0; i < 8; i++)
            {
                reg[i] = 0x00;
            }

            prg0 = 0;
            prg1 = 1;
            SetBank_CPU();

            chr01 = 0;
            chr23 = 2;
            chr4 = 4;
            chr5 = 5;
            chr6 = 6;
            chr7 = 7;
            SetBank_PPU();

            we_sram = 0;    // Disable
            irq_enable = 0; // Disable
            irq_counter = 0;
            irq_latch = 0;
            irq_request = 0;
        }



        //void Mapper248::WriteLow(WORD addr, BYTE data)
        public override void WriteLow(ushort addr, byte data)
        {
            SetPROM_32K_Bank(2 * data, 2 * data + 1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
        }

        //void Mapper248::Write(WORD addr, BYTE data)
        public override void Write(ushort addr, byte data)
        {
            switch (addr & 0xE001)
            {
                case 0x8000:
                    reg[0] = data;
                    SetBank_CPU();
                    SetBank_PPU();
                    break;
                case 0x8001:
                    reg[1] = data;

                    switch (reg[0] & 0x07)
                    {
                        case 0x00:
                            chr01 = (byte)(data & 0xFE);
                            SetBank_PPU();
                            break;
                        case 0x01:
                            chr23 = (byte)(data & 0xFE);
                            SetBank_PPU();
                            break;
                        case 0x02:
                            chr4 = data;
                            SetBank_PPU();
                            break;
                        case 0x03:
                            chr5 = data;
                            SetBank_PPU();
                            break;
                        case 0x04:
                            chr6 = data;
                            SetBank_PPU();
                            break;
                        case 0x05:
                            chr7 = data;
                            SetBank_PPU();
                            break;
                        case 0x06:
                            prg0 = data;
                            SetBank_CPU();
                            break;
                        case 0x07:
                            prg1 = data;
                            SetBank_CPU();
                            break;
                    }
                    break;
                case 0xA000:
                    reg[2] = data;
                    if (!nes.rom.Is4SCREEN())
                    {
                        if ((data & 0x01) != 0)
                        {
                            SetVRAM_Mirror(VRAM_HMIRROR);
                        }
                        else
                        {
                            SetVRAM_Mirror(VRAM_VMIRROR);
                        }
                    }
                    break;
                case 0xC000:
                    irq_enable = 0;
                    irq_latch = 0xBE;
                    irq_counter = 0xBE;
                    nes.cpu.ClrIRQ(IRQ_MAPPER);
                    break;
                case 0xC001:
                    irq_enable = 1;
                    irq_latch = 0xBE;
                    irq_counter = 0xBE;
                    break;
            }

        }

        //void Mapper248::HSync(INT scanline)
        public override void HSync(int scanline)
        {
            if ((scanline >= 0 && scanline <= 239))
            {
                if (nes.ppu.IsDispON())
                {
                    if (irq_enable != 0)
                    {
                        if ((irq_counter--) == 0)
                        {
                            irq_counter = irq_latch;
                            //					nes->cpu->IRQ_NotPending();
                            nes.cpu.SetIRQ(IRQ_MAPPER);
                        }
                    }
                }
            }
        }

        void SetBank_CPU()
        {
            if ((reg[0] & 0x40) != 0)
            {
                SetPROM_32K_Bank(PROM_8K_SIZE - 2, prg1, prg0, PROM_8K_SIZE - 1);
            }
            else
            {
                SetPROM_32K_Bank(prg0, prg1, PROM_8K_SIZE - 2, PROM_8K_SIZE - 1);
            }
        }


        void SetBank_PPU()
        {
            if (VROM_1K_SIZE != 0)
            {
                if ((reg[0] & 0x80) != 0)
                {
                    SetVROM_8K_Bank(chr4, chr5, chr6, chr7,
                             chr01, chr01 + 1, chr23, chr23 + 1);
                }
                else
                {
                    SetVROM_8K_Bank(chr01, chr01 + 1, chr23, chr23 + 1,
                             chr4, chr5, chr6, chr7);
                }
            }
        }

        public override bool IsStateSave()
        {
            return true;
        }

        //void Mapper248::SaveState(LPBYTE p)
        public override void SaveState(byte[] p)
        {
            //for (INT i = 0; i < 8; i++)
            //{
            //    p[i] = reg[i];
            //}
            //p[8] = prg0;
            //p[9] = prg1;
            //p[10] = chr01;
            //p[11] = chr23;
            //p[12] = chr4;
            //p[13] = chr5;
            //p[14] = chr6;
            //p[15] = chr7;
            //p[16] = irq_enable;
            //p[17] = (BYTE)irq_counter;
            //p[18] = irq_latch;
            //p[19] = irq_request;
        }

        //void Mapper248::LoadState(LPBYTE p)
        public override void LoadState(byte[] p)
        {
            //for (INT i = 0; i < 8; i++)
            //{
            //    reg[i] = p[i];
            //}
            //prg0 = p[8];
            //prg1 = p[9];
            //chr01 = p[10];
            //chr23 = p[11];
            //chr4 = p[12];
            //chr5 = p[13];
            //chr6 = p[14];
            //chr7 = p[15];
            //irq_enable = p[16];
            //irq_counter = (INT)p[17];
            //irq_latch = p[18];
            //irq_request = p[19];
        }
    }
}